D1U54P-W-1200-12-HxxPC Series
54mm 1U Front End AC-DC
Power Supply Converter
D1U54P-W-1200-12-HxxPC.B05
Page 3 of 9
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STATUS INDICATORS AND CONTROL SIGNALS GREEN AMBER
Standby - ON; Main output - OFF; AC PRESENT
Standby - ON; Main output - ON Solid green Off
Main output overcurrent, undervoltage, overvoltage Off On
FAN_FAULT; overtemperature; standby overcurrent, undervoltage
No AC Power Off Off
Power Supply Warning Event Off Blinking
STATUS AND CONTROL SIGNALS
I/O
ACOK
(AC Source) Output
The signal output is driven high when input source is available and within acceptable
limits. The output is driven low to indicate loss of input power.
Pulled up internally via 10K to VDD4
A logic high >2.0Vdc
A logic low <0.8Vdc
Driven low by internal CMOS buffer (open drain output).
PWOK (Output
OK) Output
The signal is asserted, driven high, by the power supply to indicate that all outputs
are valid. If any of the outputs fail then this output will be hi-Z or driven low. The
output is driven low to indicate that the Main output is outside of lower limit of
regulation (11.4Vdc).
Pulled up internally via 10K to VDD4
A logic high >2.0Vdc
A logic low <0.8Vdc
Driven low by internal CMOS buffer (open drain output).
SMB_ALERT
(FAULT/
WARNING)
Output
The signal output is driven low to indicate that the power supply has detected a
warning or fault and is intended to alert the system. This output must be driven
high when the power is operating correctly (within specified limits).
The signal will revert to a high level when the warning/fault stimulus (that caused
the alert) is removed.
Pulled up internally via 10K to VDD4
A logic high >2.0Vdc
A logic low <0.8Vdc
Driven low by internal CMOS buffer (open drain output).
PRESENT_L
(Power Supply
Absent)
Output
The signal is used to detect the presence (installed) of a PSU by the host system.
The signal is connected to PSU logic SGND within the power module.
Passive connection to +VSB_Return.
A logic low <0.8Vdc
PS_ON
(Power Supply
Enable/Disable
Input
This signal is pulled up internally to the internal housekeeping supply (within the
power supply). The power supply main 12Vdc output will be enabled when this
signal is pulled low to +VSB_Return.
In the low state the signal input shall not source more than 1mA of current. The
12Vdc output will be disabled when the input is driven higher than 2.4V, or
open circuited. Cycling this signal shall clear latched fault conditions.
Pulled up internally via 10K to VDD4
PSKILL Input
This signal is used during hot swap to disable the main output during hot swap
extraction. The input is pulled up internally to the internal housekeeping supply
(within the power supply).
The signal is provided on a short (lagging pin) and should be connected to +VSB_
Return.
A logic high >2.0Vdc
APS (Address
Select)
Input
An analog input that is used to set the address of the internal slave devices (EEPROM
and microprocessor) used for digital communications.
Connection of a suitable resistor, to +VSB_Return, in conjunction with an
internal resistor divider chain, will configure the required address.
DC voltage between the limits of 0 and VDD4
SCL (Serial
Clock) Both
A serial clock line compatible with PMBusTM Power Systems Management Protocol
Part 1 – General Requirements Rev 1.1.
No additional internal capacitance is added that would affect the speed of the bus.
The signal is provided with a series isolator device to disconnect the internal power
supply bus in the event that the power module is unpowered.
VIL is 0.8V maximum
VOL is 0.4V maximum when sinking 3mA
VIH is 2.1V minimum
SDA (Serial
Data) Both
A serial data line compatible with PMBusTM Power Systems Management Protocol
Part 1 – General Requirements Rev 1.1.
The signal is provided with a series isolator device to disconnect the internal power
supply bus in the event that the power module is unpowered.
VIL is 0.8V maximum
VOL is 0.4V maximum when sinking 3mA
VIH is 2.1V minimum
4VDD is an internal voltage rail derived from VSB and an internal housekeeping rail (“diode ORed” together) and is compatible with the voltage tolerances of VSB).