19-4325; Rev 2; 10/94 Quad, High-Side MOSFET Drivers General Description The MAX620/MAX621 incorporate four MOSFET drivers and a charge-pump high-side power supply to power high-side switching and contro! circuits. The charge pump delivers a regulated output voltage 11V greater than Vcc to the drivers, which then transiate a TTL/CMOS input signal to a noninverted output that swings from ground to the high-side voltage. The out- puts drive N-channel FETs in high-side or low-side switching applications, including a wide range of line- and battery-powered applications. The MAX620/MAX621 are microprocessor compatible and feature undervoltage lockout capability. This lockout feature inhibits the FET driver outputs until the high-side voltage reaches the proper level, as indicated by a Power-Ready output. The MAX620 requires three inexpensive charge-pump capacitors. The MAX621 has internal capacitorsno external components are needed. Applications Portable Computer Battery Load Management High-Side Power, N-Channel MOSFET Switching Low-Side Switching from Low Supply Voltages Quad-Latching Level Translators H-Bridge Motor Drivers Stepper Motor Drivers MA AMAL/VI Features @ Wide Operating Voltage Range @ Minimum Component Count @ Output Voltage Regulated to Vcc Plus 11V (Typ) @ Low Quiescent Current 70uA (Typ) @ Undervoltage Lockout @ Power-Ready Output Internal Quad Latch Ordering Information PART TEMP.RANGE PIN-PACKAGE | MAX620CPN OC to+70C_ 18 Plastic OP | MAX620CWN OC Io +70" WideSO_ | MAX620C/D OC to +70C Dice* MAX620EPN -40C to +85C 18 Plastic DIP MIAXGSOEWN -a0'Cw x88C 1@Wide SO | MAX62ICPN OC to 470C 18 Plastic DIP MAX621EPN 40C 10 +85C 1B Plastic DIP Contact factory for dice specifications. Typical Operating Circuit +5V ts Pin Configurations ak ~ Voc Ve (8 + 4 9 +5V pq Ct+ Cas fF 7 TOP VIEW aout = AXED =~ 02 | MF | 19 cH. co. [8 0,047 0F = ZS pat Pouca ound [1] la) OUTI ouTa [1] lig} OUT isfin Sounds OUTS ly] OUT2 OUTS [2] Hr] our2 el a = a _ J IN3 is} IN2 13 By Fe] IN2 oa TO LOAD IN4 Hf accion js! int N4 en ascaan [2 IN pS fIN2 OuT2 417 T ce [8] axezo [is] 1c cE (S] MAx62t fis} 1 T0LOAD PR 113] C2- PR [ef hs] Voc Lis GND 2 Veo GND fiz) Cts > fins jours fe yy vs [a] fa} Cle 624 hi) C14 ae ne TOLOAD 02+ [2 no] C1- cr BI lio} C1+ >) 4 [ina ours | 1 DIP/SO DIP a 5 6 CE yy PRE TT NOTE MAX621 CONTAINS C1, C2 = AND C3 INTERNALLY SVIA KI svi Maxim Integrated Products 1 IAA AISI is aregistered trademark of Maxim Integrated Products. LEOXVW/OCOXVNMAX620/MAX621 Quad, High-Side MOSFET Drivers ABSOLUTE MAXIMUM RATINGS Voc V+ to GND Inputs and Driver Outputs PR Output Continuous Driver Output Current 2.0.0.0... V+ Output Current (MAX620 Only) (GND-0.3V) to (V+ + 0.3V) _... (GND-0.3V) to (Vcc + 0.3V) 30V . ve. 25MA . J... 25mA MAX62 _C __ MAX62 _E _ _ Storage Temperature Range Continuous Power Dissipation (TA = +70C) Plastic DIP (derate 8mW/"C above +70C) Wide SO (derate 9.52mW/C above +70C) Operating Temperature Ranges: Lead Temperature (Soldering, 10 sec) .. O'C to +70C -40C to +85'C -65'C to +160C +300C Stresses beyond those listed under Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (Vcc = +5V, TA = TMIN to Tmax, unless otherw ise noted.) . ___ PARAMETER | SYMBOL | CONDITIONS MIN TYP MAX | UNITS | Supply Voltage Vcc | 45 16.5 [ Vv lout = 0. Vec = 4.5V C1 = C2 = 0.047nF, C3 = 1pF 45 155 176 lout = 0, Vec = 16.5V 265 275 29.5 High-Side Voltage (Note 1) V+ Ct = C2 = 0.01HF, C3 = 1nF (Note 2) Vv lout = 250HA, Voc = 5V, C1 =C2 = 0.047nF, C3 = uF 15 16 18 lout = 500HA, Voc = 16.5V, Ct = C2 = 0.01uF, C3 = 1pF (Note 2) 7.5 275 295 | Power-Ready Threshold PRT {ouT = 100pA Sink (Notes 3, 4) 12.0 13.5 145 Vv Power-Ready Output High PROH ISOURCE = 100nA (Note 4) 3.8 47 5.0 Vv Power-Ready Output Low PRoL ISINK = 1mMA (Note 4) 0.1 04 | Vv | Switching Frequency fo lout = 0, Ta = +25C _ 70 kHz Voc = 5, MAX620 | C1 = C2 = 0.047uF, C3 = 1pF _ | Ta= +28C. lour = 0 we 800 Quiescent Supply Current la MAX621_ | Veo = SV. Ta= 425C. lour=9 | _ LA Vec = 16.5V, | MAX620 | C1 = C2 = 0.01uF, C3 = 1pF, 50 350 Ta = +25C, lout = 0 (Note 5) MAX621 | Voc = 16.5V, Ta = +25C, lout = 0 MIA XKISZVIQuad, High-Side MOSFET Drivers ELECTRICAL CHARACTERISTICS (continued) (Vcc = +5V, TA = TIN to TMAX., unless otherwise noted.) | PARAMETER | SYMBOL | CONDITIONS MIN TYP MAX | UNITS HIGH-SIDE DRIVERS Input Threshold Low VTL | os | Vv | |_Input Threshold High VTH 24 7 | Vv | Input Bias Current IB OV < VIN < 5V {| 7100, 100 nA Chip Enable Threshold Low CELo og fv | Chip Enable Threshold High CEH 24 fy | Minimum GE Pulse Duration | Toe / 100 50 ns | Pull-Down Current ICE 10 - wa Data-Hold Time | Tor | t0 0. | Data Set-Up Time Tsu ) 50 100 ns Data-Delay Time Too | Vee =0V,C, = 12pF 150 [ns Driver Output Rise Time TR CL = 1000pF 47 | ps |_ Driver Output Fall Time [Te | Cu = 1000F LL 25 Te Note 1: High-Side Voltage (V+) is available only on the MAX620 and is measured with respect to GND. V+ on the MAX621 is measured at an unloaded output. Capacitor values listed in the test conditions apply to the MAX620 only Note 2: For Vcc > +13V, on the MAX620 only, use C1 = C2 = O.01pF, C3 = 1pF. Note 3: Power-Ready Threshold is the voltage with respect to GND at V+ when PR switches high (PROH = Vcc). Note 4: For the MAX621, the Power-Ready levels are tested at wafer sort only. Note 5: The MAX620 is tested for quiescent current at +16.5V using C1 = C2 = 0.047uF to minimize test time. In normal operation above +13V, C1 and C2 must not exceed 0.01pF. Typical Operating Characteristics MAX621 MAXIMUM SWITCHING RATE MAX620 MAXIMUM SWITCHING MAX620 QUIESCENT SUPPLY vs. Vcc SYNCHRONOUSLY DRIVING RATE vs. Vcc SYNCHRONOUSLY CURRENT vs. C3 CAPACITANCE ALL FOUR INPUTS DRIVING ALL FOUR INPUTS MrT TT Ty TT Tee tga 125.6. | i Ta-#25C 2- = Vec +5V | = ~ | = CLoap - 1500pF C1 = C2 - 0.047 uF 3 250 Pet 02 = 0.047uF Tan = 4 LKeH DAVES) | = 4g | (EACHORIVER) feo | cl=+ ws = ong Ny LC1-C2=0.01uE z | So =z | Ae 0022QuF 3 J it] S 30 [ 3 x pct | = 160 } Veo = 12Vv_] 5 5 Cl-C2- 0.01pF & | | 01 = 62 -0047y6 5 5 0 C3 tt 2 100 | ot] a 1 3 1 ty 2 on aes = NOTE: THE MAXIMUM SWITCH- = NOTe: THE MAXIMUM SWITCH 8 Ta=+25C = ING RATE OCCURS JUST BELOW = ING RATE OCCURS JUST BELOW B59 lout =0 = 10 THEPOINT WHERE DRIVER = 10 t THE POINT WHERE DRIVER a ALL INPUTS = 0 = / OUTPUT AND V+ LOADING = OUTPUT AND Vi LOADING ; ALL DRIVERS UNLOADED 0 PULLS V+ TOPRT (Voc +8 5) 0 PULLS V+ TO PRT (Voc + 85) 123 4 5 6 7 8 9 10 305 7 9 1 7 306 7 9 1 1895 WP 3 CAPACITANCE (uF} Vee (V) Vee () MAXKISVI 3 LEOXVIN/OCOXVNMAX620/MAX621 Quad, High-Side MOSFET Drivers Typical Operating Characteristics (continued) MAX620 QUIESCENT SUPPLY CURRENT 400 vs. C3 CAPACITOR VALUE MAX620 V+ vs. louT MAX620 V+ vs. louT C* = 0.01pF Voc = 112V Vee. SV = a H Vcc = +5V, lout = 9, C3 = 1QuF 03 - 10uF 3 Ta= 425C, C1 =C2=C Ta=+25C Ta=125C ee we = 499 C* = 0.022uF s C* - 0.033uF S 250 a C1-C2= x 200 0.047 uF yn | | 5 * C1-C2- S150 =0.1uF 0.022 uF g C* - 0.068uF S 100 C1 =02- C* =0.047pF 0.01pF > 50 123 45 6 7 8 9 10 0 02 04 060810121416 18 20 C3 CAPACITOR VALUE (UF) lout (mA) MAXIMUM SWITCHING RATE MAX620/MAX621 DRIVER RISE MAX621 DRIVER OUTPUT vs. CLoAD SINGLE DRIVER AND FALL TIME vs. CLoap 15 RIPPLE vs. Vcc 400 7 Ta-w5c.vec- ov | | ETT] Veo = 45V alt DeIGER = 350 TNOTE: THE MAXIMUM SWITCH- Ta= 125C 1.25 OUTPUTS UNLOADED = ING RATE OCCURS JUST _ Ss wt 300 BELOW THE POINT WHERE g o z DRIVER OUTPUT LOADING = FALL = | Se 250 PULLS V+ TO PRT (Vcc + 8.5V) w = S 200 MAX620, te = RISE TIME 2 075 = C1 = 02-0.047uF, x 5 2 150 C3 = TWF. V+ UNLOADED om Z 2 tu S 05b 4 3 INS 2 2 /~ = 100 : I rr x = A tte Ss aod f 2 4 MAX621 +t pI SS 0.25 1 M1 pH 0 Jt ii u 0 04 1 10 04 1 10 305 7 9 NW 13 15 17 CLOAD (nF) Croan (nF) Voc (V) Vcc TO POWER-READY MAX621 QUIESCENT SUPPLY MAX620 MAXIMUM lout vs. C1 = C2 HIGH DELAY vs. Vcc 1p CURRENT vs. Vcc 1.0 a0 T T T a | voo=+5 | T= _ | ALL INPUTS - OV Tnaa28 Ta- 425C Zp | __ALL DRIVER 4 = = 4 = OUTPUTS UNLOADED 08 ALL DRIVER 5 1 Tas 25 C =< 07 INPUTS = OV 4 Q ea . E a E = 8 ; 5 06 B 3 oa = > = 05 a cr U > ge 06 F 7 = 04 = a z | s BS 04 = 03 t = 3 02 |NOTE, MAXIMUM Jour IS THE LOAD |] Z CURRENT AT THE POINT WHERE V+ 5 02 : | 0.1 [BEGINS TOLOSEREGULATION = S | | 0 | ) 0 I I 001 a4 3.95 7 9 11 138 15 17 C1 C2 CAPACITANCE (uF) Voc (V) 4 SVIA AI sviMAX620 QUIESCENT SUPPLY CURRENT vs. Vcc =o = Ta=+25C S}01 = C2 -0.01uF QUIESCENT SUPPLY CURRENT (mA) =C2=0.047uF - DRIVER OUTPUT SWITCHING WAVEFORM Voc - +12V Ta-+25C Cioan = 1500pF SVidiv OV Sus/div AVIA KISVI MAX620/621 QUIESCENT SUPPLY CURRENT vs. TEMPERATURE 120 lout = 0 z 110 a 100 ea 5 90 Voc = +5V > a 80 = Voc = +16.5V 2 70 a Q 60 B 50 40 -75 -50 -2 0 25 50 75 100 125 TEMPERATURE (C) DRIVER OUTPUT SWITCHING WAVEFORM Voc = +5V Ta = +25C CLOAo = 1500pF ov/div ov Sus/div MAXIMUM SWITCHING RATE (kHz) Quad, High-Side MOSFET Drivers Typical Operating Characteristics (continued) MAX620 MAXIMUM SWITCHING RATE vs. ADDITIONAL V+ LOAD CURRENT (IOUT) TOU set tt Croan = 1500p Voc = +15 (EACH DRIVER) 30 [Let c2-oorl Lt LL Sati TIN Veo = 412V Ci =02=0.047uF 03 = ink 20 os, = 15 N CC ci_-c2-o.047me | | YT C3 = 1 pF LI 10 F 10 100 1000 10000 lout (WA) NOTE: THE MAXIMUM SWITCHING RATE OCCURS JUST BELOW THE POINT WHERE DRIVER OUTPUT AND V+ LOADING PULLS V+ TQ PRT (VCC + 8.5V) DRIVER OUTPUT SWITCHING WAVEFORM Vcc = +15V Ta -+25C Coap - 1500pF 5V/div ov Sps/div LZ9XVIN/OC9OXUWNMAX620/MAX621 Quad, High-Side MOSFET Drivers Pin Description PIN NAME FUNCTION MAX620 | MAX621 1 1 OUT4 Driver Output 4 2 2 OUT3 Driver Output 3 3 3 IN3 TTIL/CMOS Compatible Input to Driver 3. Connect to GND if unused. 4 4 IN4 TTL/CMOS Compatible Input to Driver 4. Connect to GND if unused. / | Chip Enable. Logic high inhibits input data. Logic low transfers input data to the quad latch and 5 5 CE driver outouts. CE pulse must be at least 100ns. Connect to GND for direct data transfer to driver outputs. 6 | 6 PR Power-Ready Output is a logic high equal to Vcc when V+ 2 (Vcc plus 8.5V} 7 7 GND Ground 8 V+ High-side voltage out. Equal to approximately Vcc plus 11V. 8 C2+ Internally connected to secondary charge-pump Capacitor. Make no connection to this pin. 9 C24 Positive terminal to secondary charge-pump capacitor, Connect to 0.047uF capacitor. : For Voc > 18V, connect to 0.01 UF. 9 C1- Internallly connected to primary charge-pump capacitor. Make no connection to this pin. 10 C1 Negative terminal to primary charge-pump capacitor. Connect to 0.047uF capacitor For Voc > 13V, connect to 0.01pF. 10-12 Cl+ Internally connected to primary charge-pump capacitor. Make no connection to these pins. 7 Cte Positive terminal to primary charge-pump capacitor. Connect to 0.047pF capacitor. For Vcc > 13V, connect to 0.01uF. 12 13 Voc Supply Voltage. Connect to positive supply. - | 13 : C2- Negative terminal to secondary charge-pump capacitor. Connect to 0.047uF capacitor. For Vcc > 13V, connect to 0.01pF. 14 14 LC. Internal Connection. Make no connection to this pin. 15 15 IN1 TTLICMOS Compatible Input to Driver 1. Connect to GND if unused, - 16 16 IN2 TTL/CMOS Compatible Input to Driver 2. Connect to GND if unused. 17 17 OuT2 | Driver Output2 18 18 out1 | Driver Output 1 | MVIA KI sviQuad, High-Side MOSFET Drivers TTL/CMOS INPUT LEVEL TRANSLATOR DRIVER INPUT QUAD LATCH | . OUT! ids ~ ouT2 q Le on - QUADLATCH | % ~ INHIBIT 4 == _TTLACMOS CE LEVEL oR cE TRANSLATOR wine IN2 TTL/CMOS TTL/CMOS IN3 J IN4 TTL/CMOS | | bockour CHARGE RUMPS AND TA ilies 3] 4. iwi ct qAoe 7 Figure 1. MAX620/MAX621 Functional Diagram Detailed Description Figure 1 shows the MAX620/MAX621 functional diagram. Aregulated multi-stage charge pump supplies four MOS- FET drivers with Vcc plus 11V for driving external MOS- FETS (Figure 2). The logic inputs to the four drivers are stored ina quad latch. Data is latched by pulling CE high. An undervoltage lockout feature prevents the driver out- puts from going high until V+ reaches the power-ready threshold (PRT) voltage (Vcc plus 8.5V) and Vcc is greater than +3V. The Dual Charge Pump The high-side voltage of approximately 11V above Vcc is generated by a multi-stage charge pump (Figure 2). Although the charge pump is capable of multiplying Vcc by up to four times, the output is regulated to VCC plus 11V by an internal feedback circuit. The charge pump typically operates at 7OkHz, but regulates by pulse-skip- ping. When V+ exceeds Vcc plus 11V, the charge pump shuts off. As V+ falls below Vcc plus 11V, the charge pump turns on. The MOSFET Drivers The four MOSFET drivers level shift TTL/CMOS input signals to output levels that switch between ground and Vcc plus 11V. These outputs can drive N-channel power MOSFETs in either high-side or low-side switching ap- RC OSCILLATOR + CONTROL LOGIC + C3 25 POWER-READY COMPARATOR OVERVOLTAGE COMPARATOR Ci $52 e | S1 ( - | Voc PR PR DRIVER GND _v TWO-STAGE CHARGE PUMP Figure 2. MAX620/MAX621 Charge Pump Block Diagram MIA Kivi LZOXVW/OZ9XVINMAX620/MAX621 Quad, High-Side MOSFET Drivers plications (a bridge arrangement would contain two high- side and two low-side N-channel MOSFET switches- see Figure 4). Data Input Latch The driver outputs are separated from the data inputs by a quad latch. When CE is pulled low, the latch becomes transparent and data transfers directly to the outputs. When CE goes high, the latch enters hold mode and new input data is not transferred to the driver outputs. Input data must be valid typically 100ns before the rising edge of CE, and held for 10ns (max over temp). The minimum CE pulse width is 100ns (Figure 3). If latched operation is not required, connect CE to GND. tsu (oH DATA (IN1-IN4) top. | ORIVER OUTPUTS Figure 3. Digital Interface Timing Diagram Undervoltage Latch Inhibit If Voc falls below +3V due to a power failure or while powering down, or V+ falls below Vcc plus 8.5V, the quad latch immediately resets, forcing the driver outputs low. The quad latch remains reset until Vcc rises above +3V with the high-side voltage present. This prevents the latch from being corrupted with erroneous data in a momentary power failure by ensuring that it will be reset. Undervoltage Detector The MAX620/MAX621 each contain an undervoltage detector, which forces all driver outputs low when the high-side voltage (V+) is less than the PRT or when Vcc is less than +3V. This ensures that the external N-channel MOSFET power transistors have sufficient gate drive to operate without dissipating excessive power. On power- up, the quad latch remains reset until the charge pump boosts the high-side voltage to the PRT. As soon as V+ reaches the PRT, the undervoltage lockout disables, the quad latch is enabled, and Power Ready (PR) goes high. The undervoltage lockout feature also forces the driver outputs low if V+ is pulled below PRT, e.g., if the driver output(s) or V+ are overloaded. Power-Ready Output The MAX620/MAX621s PR output is a direct extension of the undervoltage lockout feature. When power is applied, PR remains a logic low until V+ reaches the PRT and Vcc exceeds +3V. The PR output high level is Vcc. Capacitor Selection for the MAX620 Capacitor type is not critical for the MAX620. However, if operation with Vcc exceeding +13V is expected, C1 and C2 must be no greater than 0.01uF. Larger value capacitors, with Vcc above +13V, dissipate excessive energy in the internal switches during charge-pump cycles. Sourcing Current From V+ (MAX620 Only) Asmall amount of current may be sourced from V+ (pin 8) to drive other circuitry. The amount of current is a function of Vcc, the gate capacitance of all MOSFETs being driven, and the driver switching rate ("MAX620 Maximum Switching Rate vs. Additional V+ Load Current," Typical Operating Characteristics). The MAX620 V+ output is not internally short-circuit protected. In applications where V+ is susceptible to short circuiting, external output short-circuit protection must be provided. Accomplish this by connecting a resistor between V+ and the load to limit the V+ current to less than 25mA. The resistor value is determined by the following formula: Vcc 25mA Application Information Data Input Transition Time The MAX620/MAX621 are microprocessor compatible and easy to interface. However, the driver input voltage must not remain between ViL and VIH for more than 500ns. In clocked data-bus systems, this is most easily accomplished by setting data on the driver input lines before clocking CE low. However, most CMOS and TTL gates meet the 500ns transition speed requirement. Connect unused driver inputs to GND. RCL 2 Maximum Driver Switching Rate The maximum driver switching rate occurs when loading causes V+ to fall to the PRT (Vcc plus 8.5V) and the driver outputs go low. It is a function of the total gate capacitance of all MOSFETs being driven and the maxi- mum available charge-pump output current at a given MAXI SvIQuad, High-Side MOSFET Drivers supply voltage. For example, for Vcc = +5V with no external load on V+, the maximum switching rate while driving four 1500pF loads is 15kHz for the MAX620 (C1 = C2 = 0.047uF) and 14kHz for the MAX621 ("Maxi- mum Switching Rate vs. Vcc," Typical Operating Characteristics). Typical Application Circuits H-Bridge Motor Driver Figure 4 shows a MAX620 driving an H-bridge switch that controls the direction of a +5V DC motor. By toggling between the FORWARD and REVERSE inputs as shown, each MOSFET driver-output pair turns on its associated MOSFET pair, which passes current through the motor, causing rotation in the desired direction. In order to prevent all four MOSFETs from switching on at once, the FORWARD/REVERSE inputs should be updated before clocking CE low. Of course, FORWARD and REVERSE must not be asserted simultaneously. Do not use a supply voltage that will cause the gate drive to exceed the absolute maximum gate-to-source voltage of the low-side switch. Stepper Motor Driver A MAX620, clock source, pulse control network, and translator logic form a complete stepper motor driver (Figure 5). TTL/CMOS signals from the logic network are translated to high-side levels that drive four N-channel power MOSFETs, supplying current to each of four step- per motor phases. Diodes provide a discharge current path for the stepper motor windings. Logic-Controlied, +5V Regulated Power Distribution A MAX620, LM10 reference and op-amp combination, and an IRFZ40 N-channel MOSFET comprise an ultra-low dropout +5V regulator that supplies power to four IRFZ40 high-side switches (Figure 6). When the power switch, Sp, is closed, V+ quickly pumps up to Vcc plus 11V. PR remains low and holds the output of the +5V regulator near zero until V+ has reached the PRT, (Vcc plus 8.5V--4ms typ). At the same time, the undervoltage lockout feature of the MAX620 forces the driver outputs low until the PRT is reached. Capacitor C4 suppresses load-switching transients. Its size depends on the largest load being switched. With C4 = 1000pF, the peak transient for a 1A switched load is less than 150mV. The circuit provides a single continuous +5V output and four switched +5V supply lines. The regulator is capable of supplying several amps with a typical dropout voltage of 28mV at 1A (Q1=IRFZ40). C 0.047 | 10] 01 AN020 o 13! __? CERAMIC = 2 fee tL veo y,f8_l* 11 9 Ci+ C2+ 1_L |r 2 = 8 047uF 15,1 an 18 FORWARD @ is fine | out 417 3 x3 outs 2 REVERSE + 4 on Al a GND 71 iN4 ouT4 J +5V _ IRF240 (RFZ40 | IRFZ40 i Figure 4. H-Bridge DC Motor Controller MIA KI svi LEOXVW/OCOXVNMAX620/MAX621 Quad, High-Side MOSFET Drivers L lower | SUPPLY 5 WL 03 12 + pF Ve yf & SOURCE yew cal? a aL MAAXIAA c2 00a7HE TT 49 7 MAX620 oe y | ae IRF240 = ci 15 INt ours hen I | INg14 16 "> ouTaft7 He | CONTROL TRANSLATOR ay = SIGNALS occ | Ns ourahe L__., [ __IRFZ40 | 4h ina OUT4Et am Lm J ot INS14 \ Ye oun Pe Th - Figure 5. Four-Phase Stepper Motor Drive System 10 SVIA KI sviQuad, High-Side MOSFET Drivers IRFZ40 we OV + 4 to] ,,, MAX620 4 Vcc PR MAAXIAA Int | > our | C2 13, | 0047uF 2- T to00uF < | IN914 IRFZ40 8 bm eV SW pe ina ouT2f iy _ are we SV swe 3] IN OuT3 | 2 ; Ld IRFZ40 wa 4] ina ourTa 4 ae HV CHIP ENABLE "PCE au I 7 nee pe +5V Figure 6. Logic-Controlled, +5V Regulated Power Distribution System SVIAKIVY 11 LEOXVIN/OCOXVUNMAX620/MAX621 Quad, High-Side MOSFET Drivers Chip Topography IN4 CE PR GND __ 0.084 {2.134 mm) NOTE: Connect substrate to V+ MAX620 transistor count: 303 Package Information an mon hse max ~ LEAD #1 0.030 ~ 0.110 pp 0.250 + 0.005. (0.762 - 2.794) 16.350 0.127) 0.060 + 0.005. (1.524 +0127) 0.300 - 0.320 a 0.020 (7.620 - 8.128) ee 0127) 2080 yp (0.508) | 1.016) 7 ae P| +e iw hf 0 wy ay, rons oe eject he et st a pean 0258 {a.256 2535) 18 Lead Plastic DIP Oja = 130C/W 8jc = 60C/W LEAD #1 Pa LHRH AE AH i O.291-0.299 0.344 - 0.364 0.394 -0.419 (3.391 - 7.595) (8.738- 9.246) (70.008 - 10.643) HbOEE EE 0.050 0.014-0.019 Ha ziny 8S O14-0.01 il i356 0487) 9.092 0.104 (2.337 -2.642) ams 0.462 NI 0.015. (Fi 735) MAX. (0.381) a: e\ 3-8" > 0.053 MIN. te 79.088 0.096. 8 346) 0.009 - 0.012. 0.030 mn |< g.os0. Tags MAK. 0 0,003 - 0.011 2 450) (0.076 0.279) ) (0.229 0.305) 18 Lead Smail Gutline, Wide By = 60 C/W Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied Maxim reserves the right lo change the circuitry and specifications without notice at any time 12 1991 Maxim Integrated Products Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 Printed USA