LM4802B, LM4802BLQBD
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SNAS243D –MAY 2004–REVISED MAY 2013
LM4802B Boomer Audio Power Amplifier Series Audio Power Amplifier with Boost
Converter to Drive Ceramic Speakers
Check for Samples: LM4802B,LM4802BLQBD
1FEATURES DESCRIPTION
The LM4802B integrates a Boost Converter with an
2• Pop & Click Circuitry Eliminates Noise During Audio Power Amplifier to drive Ceramic Speakers in
Turn-On and Turn-Off Transitions portable applications. When powered by a 3V supply,
• Low, 2μA (Max) Shutdown Current it is capable of forcing 12Vp-p across a 2μF + 30Ω
• Low, 12mA (Typ) Quiescent Current bridge-tied-load (BTL) with less than 1% THD+N.
• 12Vp-p Mono BTL Output, Load = 2μF + 30Ω,Boomer audio power amplifiers were designed
VDD = 3V specifically to provide high quality output power with a
minimal amount of external components. The
• Short Circuit Protection LM4802B does not require bootstrap capacitors, or
• Unity-Gain Stable snubber circuits. Therefore it is ideally suited for
• External Gain Configuration Capability portable applications requiring high output voltage
and minimal size.
APPLICATIONS The LM4802B features a low-power consumption
• Cellphone shutdown mode. Additionally, the LM4802B features
an internal thermal shutdown protection mechanism.
• PDA The LM4802B contains advanced pop & click circuitry
KEY SPECIFICATIONS that eliminates noises which would otherwise occur
during turn-on and turn-off transitions.
• Quiescent Power Supply Current: 12mA (Typ) The LM4802B is unity-gain stable. Its gain is set by
• BTL Voltage Swing (2μF + 30ΩLoad, 1% external resistors.
THD+N, VDD = 3V): 12Vp-p (typ)
• Shutdown Current: 2μA (max)
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2004–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
NC 1
NC 2
NC 3
VDD 4
NC 5
Shutdown 1 6
GND 7
IN+21
GND20
Bypass19
Shutdown 218
Vo217
NC16
NC15
FB
NC
NC
SW
GND
NC
NC
8 9 10 11 12 13 14
28 27 26 25 24 23 22
NC
NC
V1
Vo1
NC
NC
IN-
LM4802B, LM4802BLQBD
SNAS243D –MAY 2004–REVISED MAY 2013
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Connection Diagram
Figure 1. LM4802BLQ (5x5)
Top View
See Package Number NJB0028A
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S/D1
GND2
12
6
GND1
7
114
SW
VDD
L1
10 PH
FB 8
Cf1
470 pF
R2
15k
R1
56k
S/D
S/D2
18
Cs1
4.7 PF
Co
4.7 PF
V1 26
Cs2
4.7 PF
GND3 20
Cb
1.0 PF
Bypass
19
15
VO2 17
15
VO1 25 2 PF
Ceramic
Battery
VDD
20k
-IN
22
0.1 PF
Ci
Audio In
Rf
200k
82 pF
Cf2
+IN
21
V1 = VFB (1 + R1/R2)
D1
Ri
Ro1
Ro2
LM4802B, LM4802BLQBD
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SNAS243D –MAY 2004–REVISED MAY 2013
Typical Application
Figure 2. Typical Audio Amplifier Application Circuit
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Absolute Maximum Ratings(1)(2)
Supply Voltage (VDD) 6.0V
Supply Voltage (V1) 6.5V
Storage Temperature −65°C to +150°C
Input Voltage −0.3V to VDD + 0.3V
Power Dissipation(3) Internally limited
ESD Susceptibility(4) 2000V
ESD Susceptibility(5) 200V
Junction Temperature 125°C
Thermal Resistance θJA (WQFN) 59°C/W
See AN-1187 (SNOA401) 'WQFN Packaging (WQFN).'
(1) All voltages are measured with respect to the GND pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX,θJA, and the ambient temperature,
TA. The maximum allowable power dissipation is PDMAX = (TJMAX −TA) / θJA or the given in Absolute Maximum Ratings, whichever is
lower.
(4) Human body model, 100pF discharged through a 1.5kΩresistor.
(5) Machine Model, 220pF–240pF discharged through all pins.
Operating Ratings
Temperature Range TMIN ≤TA≤TMAX −40°C ≤TA≤+85°C
Supply Voltage (VDD) 2.7V ≤VDD ≤5.5V
Supply Voltage (V1) 2.7V ≤V1≤6.1V
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Electrical Characteristics VDD = 4.2V(1)(2)
The following specifications apply for VDD = 4.2V, AV-BTL = 26dB, ZL= 2µF+30Ω, CB= 1.0µF, R1= 56kΩ, R2= 15kΩunless
otherwise specified. Limits apply for TA= 25°C. See Figure 2.
Symbol Parameter Conditions LM4802B Units
(Limits)
Typical(3) Limit(4)(5)
IDD Quiescent Power Supply Current VIN = 0, RLOAD =∞12 22 mA (max)
ISD Shutdown Current VSHUTDOWN = GND(6) (7) 0.1 2 µA (max)
VSDIH Shutdown Voltage Input High SD1 1.5 V (min)
SD2 1.4
VSDIL Shutdown Voltage Input Low SD1 0.5 V (max)
SD2 0.4
TWU Wake-up Time CB= 1.0µF 80 110 msec (max)
VOS Output Offset Voltage 5 40 mV (max)
TSD Thermal Shutdown Temperature 125 °C (min)
THD = 1% (max), f = 1kHz,
VOUT Output Voltage Swing 12 11 Vpp (min)
Mono BTL
THD+N Total Harmomic Distortion + Noise VOUT = 10Vp-p, f = 1kHz 0.05 1 %
εOS Output Noise A-Weighted Filter, VIN = 0V 105 µV
PSRR Power Supply Rejection Ratio VRIPPLE = 200mVp-p, f = 100Hz 66 dB
VFB Feedback Pin Reference Voltage See(8) 1.23 V
(1) All voltages are measured with respect to the GND pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Typicals are measured at 25°C and represent the parametric norm.
(4) Limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level).
(5) Datasheet min/max specification limits are specified by design, test, or statistical analysis.
(6) Shutdown current is measured at an ambient temperature of 25°C. The Shutdown pin should be driven as close as possible to Vin for
minimum shutdown current.
(7) Shutdown current is measured with components R1 and R2 removed.
(8) Feedback pin reference voltage is measured with the Audio Amplifier's V1 (pin 26) floating and no addition load connected to the
cathode of D1 (see Figure 2).
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Electrical Characteristics VDD = 3.0V(1)(2)
The following specifications apply for VDD = 3.0V, AV-BTL = 26dB, ZL= 2µF+30Ω, CB= 1.0µF, R1= 56kΩ, R2= 15kΩunless
otherwise specified. Limits apply for TA= 25°C.
Symbol Parameter Conditions LM4802B Units
(Limits)
Typical(3) Limit(4)(5)
IDD Quiescent Power Supply Current VDD = 3.2V, VIN = 0, RLOAD =∞15 25 mA (max)
ISD Shutdown Current VSHUTDOWN = GND(6) (7) 0.1 2 µA (max)
VSDIH Shutdown Voltage Input High SD1 1.5 V (min)
SD2 1.4
VSDIL Shutdown Voltage Input Low SD1 0.5 V (max)
SD2 0.4
TWU Wake-up Time CB= 1.0µF 80 110 msec (max)
VOS Output Offset Voltage 5 40 mV (max)
TSD Thermal Shutdown Temperature 125 °C (min))
THD = 1% (max), f = 1kHz,
VOUT Output Voltage Swing 12 11 Vpp (min)
Mono BTL
THD+N Total Harmomic Distortion + Noise VOUT = 10Vp-p, fIN = 1kHz 0.05 1 % (max)
εOS Output Noise A-Weighted Filter, VIN = 0V 105 µV
PSRR Power Supply Rejection Ratio VRIPPLE = 200mVp-p, f = 100Hz 66 dB (min)
VFB Feedback Pin Reference Voltage See(8) 1.23 1.205 V (max)
1.255 V (min)
(1) All voltages are measured with respect to the GND pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Typicals are measured at 25°C and represent the parametric norm.
(4) Limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level).
(5) Datasheet min/max specification limits are specified by design, test, or statistical analysis.
(6) Shutdown current is measured at an ambient temperature of 25°C. The Shutdown pin should be driven as close as possible to Vin for
minimum shutdown current.
(7) Shutdown current is measured with components R1 and R2 removed.
(8) Feedback pin reference voltage is measured with the Audio Amplifier's V1 (pin 26) floating and no addition load connected to the
cathode of D1 (see Figure 2).
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0.001
0.01
0.1
1
10
THD + N (%)
5.10 7.35 9.62 11.88 14.14
OUTPUT VOLTAGE (VP-P)
2.83
0.002
0.02
0.2
2
0.005
0.05
0.5
5
f = 10 kHz
f = 1 kHz
f = 200 Hz
0.001
0.01
0.1
1
10
THD + N (%)
5.10 7.35 9.62 11.88 14.14
OUTPUT VOLTAGE (VP-P)
2.83
0.002
0.02
0.2
2
0.005
0.05
0.5
5
f = 10 kHz
f = 1 kHz
f = 200 Hz
0.001
0.01
0.1
1
10
THD + N (%)
4.81 6.79 8.77 10.75 12.73
OUTPUT VOLTAGE (VP-P)
2.83
0.002
0.02
0.2
2
0.005
0.05
0.5
5
f = 10 kHz
f = 1 kHz
f = 200 Hz
0.001
0.01
0.1
1
10
THD + N (%)
4.81 6.79 8.77 10.75 12.73
OUTPUT VOLTAGE (Vp-p)
2.83
0.002
0.02
0.2
2
0.005
0.05
0.5
5
f = 10 kHz
f = 1 kHz
f = 200 Hz
20 20k
FREQUENCY (Hz)
0.001
10
THD + N (%)
10k1k 2k 5k50 100 200 500
0.01
0.1
1
0.002
20
0.02
0.2
2
0.005
0.05
0.5
5
20 20k
FREQUENCY (Hz)
0.001
10
THD + N (%)
10k1k 2k 5k50 100 200 500
0.01
0.1
1
0.002
20
0.02
0.2
2
0.005
0.05
0.5
5
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Typical Performance Characteristics
THD+N vs Frequency THD+N vs Frequency
VDD = 3V, ZL= 2μF + 30Ω, VOUT = 10VP-P VDD = 4.2V, ZL= 2μF + 30Ω, VOUT = 10VP-P
Figure 3. Figure 4.
THD+N vs Output Voltage THD+N vs Output Voltage
VDD = 3V, ZL= 2μF + 30Ω, V1= 5.0V VDD = 4.2V, ZL= 2μF + 30Ω, V1= 5.0V
Figure 5. Figure 6.
THD+N vs Output Voltage THD+N vs Output Voltage
VDD = 3V, ZL= 2μF + 30Ω, V1= 5.8V VDD = 4.2V, ZL= 2μF + 30Ω, V1= 5.8V
Figure 7. Figure 8.
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20 20k
FREQUENCY (Hz)
-100
+0
PSRR (dB)
10k1k 2k 5k50 100 200 500
-90
-80
-70
-60
-50
-40
-30
-20
-10
-95
-85
-75
-65
-55
-45
-35
-25
-15
-5
20 20k
FREQUENCY (Hz)
-100
+0
PSRR (dB)
10k1k 2k 5k50 100 200 500
-90
-80
-70
-60
-50
-40
-30
-20
-10
-95
-85
-75
-65
-55
-45
-35
-25
-15
-5
01_ 2_ 3_ 4_ 5_ 6
VDD (V)
0_
200_
400_
600_
800_
1000
1200
LOAD CURRENT (mA)
V1= 5.8V
V1= 5.0V
V1= 6.1V
2.5 3 3.5 4 4.5 5 5.5
SUPPLY VOLTAGE (V)
0
5
10
15
20
25
SUPPLY CURRENT (mA)
2
V1= 6.1V
V1= 5.8V
V1= 5.0V
0.001
0.01
0.1
1
10
THD + N (%)
5.10 7.35 9.62 11.88 14.14
OUTPUT VOLTAGE (VP-P)
2.83
0.002
0.02
0.2
2
0.005
0.05
0.5
5
f = 10 kHz
f = 1 kHz
f = 200 Hz
0.001
0.01
0.1
1
10
THD + N (%)
5.10 7.35 9.62 11.88 14.14
OUTPUT VOLTAGE (VP-P)
2.83
0.002
0.02
0.2
2
0.005
0.05
0.5
5
f = 10 kHz
f = 1 kHz
f = 200 Hz
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Typical Performance Characteristics (continued)
THD+N vs Output Voltage THD+N vs Output Voltage
VDD = 3V, ZL= 2μF + 30Ω, V1= 6.1V VDD = 4.2V, ZL= 2μF + 30Ω, V1= 6.1V
Figure 9. Figure 10.
Supply Voltage vs Supply Current
Load Current vs VDD ZL= 2µF + 30Ω, VIN = 0V
Figure 11. Figure 12.
PSRR vs Frequency PSRR vs Frequency
V1= 5.0V, ZL= 2μF + 30Ω, V1= 5.8V, ZL= 2μF + 30Ω,
Vripple = 200mVpp, AV-BTL = 26dB Vripple = 200mVpp, AV-BTL = 26dB
Figure 13. Figure 14.
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1 2 3 4 4.5
OUTPUT VOLTAGE (Vrms)
0
20
40
60
80
100
120
140
160
POWER DISSIPATION (mW)
0.5
0 20 40 60 80 100 120 140 160
AMBIENT TEMPERATURE (C)
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
0.16
POWER DISSIPATION (W)
1 2 3 4 5
OUTPUT VOLTAGE (Vrms)
0
50
100
150
200
POWER DISSIPATION (mW)
0
VI= 6.1V
VI= 5.8V
VI= 5.0V
0 20 40 60 80 100 120 140 160
AMBIENT TEMPERATURE (C)
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
0.16
POWER DISSIPATION (W)
20 20k
FREQUENCY (Hz)
-100
+0
PSRR (dB)
10k1k 2k 5k50 100 200 500
-90
-80
-70
-60
-50
-40
-30
-20
-10
-95
-85
-75
-65
-55
-45
-35
-25
-15
-5
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Typical Performance Characteristics (continued)
PSRR vs Frequency Power Derating Curve - WQFN
V1= 6.1V, ZL= 2μF + 30Ω, PDMAX = 150mW
Vripple = 200mVpp, AV-BTL = 26dB VDD = 3.0V, ZL= 2μF + 30Ω
Figure 15. Figure 16.
Power Derating Curve - WQFN
PDMAX = 136mW Power Dissipation vs Output Voltage
VDD = 4.2V, ZL= 2μF + 30ΩVDD = 3.0V, ZL= 2μF + 30Ω
Figure 17. Figure 18.
Power Dissipation vs Output Voltage
VDD = 4.2V, ZL= 2μF + 30ΩAmplifier Open Loop
From top to bottom: V1= 6.1V, V1= 5.8V, V1= 5.0V Frequency Response
Figure 19. Figure 20.
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MAX DUTY CYCLE (%)
92.1
92.2
92.3
92.4
92.5
92.6
92.7
92.8
92.9
93
TEMPERATURE (oC)
VIN = 5V
VIN = 3.3V
-50 -25 025 50 75 100 125 150
TEMPERATURE (oC)
FEEDBACK BIAS CURRENT (PA)
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
-50 -25 025 50 75 100 125 150
OSCILLATOR FREQUENCY (MHz)
1.4
1.42
1.44
1.46
1.48
1.5
1.52
1.54
1.56
1.58
TEMPERATURE (oC)
VIN = 5V
VIN = 3.3V
-50 -25 025 50 75 100 125 150
FEEDBACK VOLTAGE (V)
1.222
1.223
1.224
1.225
1.226
1.227
1.228
1.229
1.23
1.231
-40 -25 025 50 75 100 125
TEMPERATURE (oC)
20 30 40 50 60 70 80 90 100
DUTY CYCLE (%) = [1 - EFF*(VIN / VOUT)]
0
500
1000
1500
2000
2500
3000
SW CURRENT LIMIT (mA)
VIN = 5V
VIN = 3.3V
VIN = 2.7V
VIN = 3V
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Typical Performance Characteristics (continued)
Amplifier Frequency Response vs Switch Current Limit vs
Input Capacitor Size Duty Cycle - “X”
Figure 21. Figure 22.
Oscillator Frequency vs Feedback Voltage vs
Temperature - “X” Temperature
Figure 23. Figure 24.
Feedback Bias Current vs Max. Duty Cycle vs
Temperature Temperature - “X”
Figure 25. Figure 26.
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2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5
VIN (V)
0
50
100
150
200
250
300
350
RDS_ON (m:)
RDS(ON) (:)
-40 -25 025 50 75 100 125
TEMPERATURE (oC)
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
Vin = 5V
Vin = 3.3V
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Typical Performance Characteristics (continued)
RDS (ON) vs RDS ( ON ) vs
Temperature VDD
Figure 27. Figure 28.
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APPLICATION INFORMATION
BRIDGE CONFIGURATION EXPLANATION
The Audio Amplifier portion of the LM4802 has two internal amplifiers allowing different amplifier configurations.
The first amplifier’s gain is externally configurable, whereas the second amplifier is internally fixed in a unity-gain,
inverting configuration. The closed-loop gain of the first amplifier is set by selecting the ratio of Rf to Ri while the
second amplifier’s gain is fixed by the two internal 20kΩresistors. Figure 2 shows that the output of amplifier one
serves as the input to amplifier two. This results in both amplifiers producing signals identical in magnitude, but
out of phase by 180°. Consequently, the differential gain for the Audio Amplifier is
AVD = 2 *(Rf/Ri) (1)
By driving the load differentially through outputs Vo1 and Vo2, an amplifier configuration commonly referred to as
“bridged mode” is established. Bridged mode operation is different from the classic single-ended amplifier
configuration where one side of the load is connected to ground.
A bridge amplifier design has a few distinct advantages over the single-ended configuration. It provides
differential drive to the load, thus doubling the output swing for a specified supply voltage. Four times the output
power is possible as compared to a single-ended amplifier under the same conditions. This increase in attainable
output power assumes that the amplifier is not current limited or clipped. In order to choose an amplifier’s closed-
loop gain without causing excessive clipping, please refer to the Audio Power Amplifier Design section.
The bridge configuration also creates a second advantage over single-ended amplifiers. Since the differential
outputs, Vo1 and Vo2, are biased at half-supply, no net DC voltage exists across the load. This eliminates the
need for an output coupling capacitor which is required in a single supply, single-ended amplifier configuration.
Without an output coupling capacitor, the half-supply bias across the load would result in both increased internal
IC power dissipation and also possible loudspeaker damage.
AMPLIFIER POWER DISSIPATION
Power dissipation is a major concern when designing a successful amplifier, whether the amplifier is bridged or
single-ended. A direct consequence of the increased power delivered to the load by a bridge amplifier is an
increase in internal power dissipation. Since the amplifier portion of the LM4802B has two operational amplifiers,
the maximum internal power dissipation is 4 times that of a single-ended amplifier. The maximum power
dissipation for a given BTL application can be derived from Equation 2.
PDMAX(AMP) = 4(VDD)2/ (2π2ZL)
where
• ZL= Ro1 + Ro2 +1/2πfc (2)
BOOST CONVERTER POWER DISSIPATION
At higher duty cycles, the increased ON-time of the switch FET means the maximum output current will be
determined by power dissipation within the LM2731 FET switch. The switch power dissipation from ON-time
conduction is calculated by Equation 3.
PDMAX(SWITCH) = DC x IIND(AVE)2x RDS(ON)
where
• DC is the duty cycle (3)
There will be some switching losses as well, so some derating needs to be applied when calculating IC power
dissipation.
TOTAL POWER DISSIPATION
The total power dissipation for the LM4802B can be calculated by adding Equation 2 and Equation 3 together to
establishEquation 4:
PDMAX(TOTAL) = [4*(VDD)2/2π2ZL] + [DC x IIND(AVE)2xRDS(ON)] (4)
The result from Equation 4 must not be greater than the power dissipation that results from Equation 5:
PDMAX = (TJMAX - TA) / θJA (5)
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For the LQA28A, θJA = 59°C/W. TJMAX = 125°C for the LM4802B. Depending on the ambient temperature, TA, of
the system surroundings, Equation 5 can be used to find the maximum internal power dissipation supported by
the IC packaging. If the result of Equation 4 is greater than that of Equation 5, then either the supply voltage
must be increased, the load impedance increased or TAreduced. For the typical application of a 3V power
supply, with V1 set to 5.8V and a 2uF+30Ωload, the maximum ambient temperature possible without violating
the maximum junction temperature is approximately 116°C provided that device operation is around the
maximum power dissipation point. Thus, for typical applications, power dissipation is not an issue. Power
dissipation is a function of output power and thus, if typical operation is not around the maximum power
dissipation point, the ambient temperature may be increased accordingly. Refer to the Typical Performance
Characteristics curves for power dissipation information for lower output levels.
EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATIONS
The LM4802’s exposed-DAP (die attach paddle) package (LD) provides a low thermal resistance between the
die and the PCB to which the part is mounted and soldered. The low thermal resistance allows rapid heat
transfer from the die to the surrounding PCB copper traces, ground plane, and surrounding air. The LD package
should have its DAP soldered to a copper pad on the PCB. The DAP’s PCB copper pad may be connected to a
large plane of continuous unbroken copper. This plane forms a thermal mass, heat sink, and radiation area.
Further detailed and specific information concerning PCB layout, fabrication, and mounting an LD (LLP) package
is found in Texas Instruments' Package Engineering Group under application note AN1187.
SHUTDOWN FUNCTION
In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry to
provide a quick, smooth transition into shutdown. Another solution is to use a single-pole, single-throw switch,
and a pull-up resistor. One terminal of the switch is connected to GND. The other side is connected to the two
shutdown pins and the terminal of the pull-up resistor. The remaining resistance terminal is connected to VDD. If
the switch is open, then the external pull-up resistor connected to VDD will enable the LM4802. This scheme
ensures that the shutdown pins will not float thus preventing unwanted state changes.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications using integrated power amplifiers, and switching DC-DC
converters, is critical for optimizing device and system performance. Consideration to component values must be
used to maximize overall system quality.
The best capacitors for use with the switching converter portion of the LM4802 are multi-layer ceramic
capacitors. They have the lowest ESR (equivalent series resistance) and highest resonance frequency, which
makes them optimum for high frequency switching converters.
When selecting a ceramic capacitor, only X5R and X7R dielectric types should be used. Other types such as
Z5U and Y5F have such severe loss of capacitance due to effects of temperature variation and applied voltage,
they may provide as little as 20% of rated capacitance in many typical applications. Always consult capacitor
manufacturer’s data curves before selecting a capacitor. High-quality ceramic capacitors can be obtained from
Taiyo-Yuden, AVX, and Murata.
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection. The capacitor location on both V1 and VDD pins should be as close to the device as possible.
SELECTING INPUT CAPACITOR FOR AUDIO AMPLIFIER
One of the major considerations is the closedloop bandwidth of the amplifier. To a large extent, the bandwidth is
dictated by the choice of external components shown in Figure 2. The input coupling capacitor, Ci, forms a first
order high pass filter which limits low frequency response. This value should be chosen based on needed
frequency response for a few distinct reasons.
High value input capacitors are both expensive and space hungry in portable designs. Clearly, a certain value
capacitor is needed to couple in low frequencies without severe attenuation. But ceramic speakers used in
portable systems, whether internal or external, have little ability to reproduce signals below 100Hz to 150Hz.
Thus, using a high value input capacitor may not increase actual system performance.
Copyright © 2004–2013, Texas Instruments Incorporated Submit Documentation Feedback 13
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In addition to system cost and size, click and pop performance is affected by the value of the input coupling
capacitor, Ci. A high value input coupling capacitor requires more charge to reach its quiescent DC voltage
(nominally 1/2 VDD). This charge comes from the output via the feedback and is apt to create pops upon device
enable. Thus, by minimizing the capacitor value based on desired low frequency response, turn-on pops can be
minimized.
SELECTING BYPASS CAPACITOR FOR AUDIO AMPLIFIER
Besides minimizing the input capacitor value, careful consideration should be paid to the bypass capacitor value.
Bypass capacitor, CB, is the most critical component to minimize turn-on pops since it determines how fast the
amplifer turns on. The slower the amplifier’s outputs ramp to their quiescent DC voltage (nominally 1/2 VDD), the
smaller the turn-on pop. Choosing CBequal to 1.0µF along with a small value of Ci(in the range of 0.039µF to
0.39µF), should produce a virtually clickless and popless shutdown function. Although the device will function
properly, (no oscillations or motor-boating), with CBequal to 0.1µF, the device will be much more susceptible to
turn-on clicks and pops. Thus, a value of CBequal to 1.0µF is recommended in all but the most cost sensitive
designs.
SELECTING FEEDBACK CAPACITOR FOR AUDIO AMPLIFIER
The LM4802B is unity-gain stable which gives the designer maximum system flexibility. However, to drive
ceramic speakers, a typical application requires a closed-loop differential gain of 10. In this case a feedback
capacitor (Cf2) will be needed as shown in Figure 29 to bandwidth limit the amplifier.
This feedback capacitor creates a low pass filter that eliminates possible high frequency oscillations. Care should
be taken when calculating the -3dB frequency because an incorrect combination of Rfand Cf2 will cause roll-off
before the desired frequency
SELECTING OUTPUT CAPACITOR (CO) FOR BOOST CONVERTER
A single 4.7µF to 10µF ceramic capacitor will provide sufficient output capacitance for most applications. If larger
amounts of capacitance are desired for improved line support and transient response, tantalum capacitors can
be used. Aluminum electrolytics with ultra low ESR such as Sanyo Oscon can be used, but are usually
prohibitively expensive. Typical AI electrolytic capacitors are not suitable for switching frequencies above 500
kHz because of significant ringing and temperature rise due to self-heating from ripple current. An output
capacitor with excessive ESR can also reduce phase margin and cause instability.
In general, if electrolytics are used, we recommended that they be paralleled with ceramic capacitors to reduce
ringing, switching losses, and output voltage ripple.
SELECTING INPUT CAPACITOR (Cs1) FOR BOOST CONVERTER
An input capacitor is required to serve as an energy reservoir for the current which must flow into the coil each
time the switch turns ON. This capacitor must have extremely low ESR, so ceramic is the best choice. We
recommend a nominal value of 4.7µF, but larger values can be used. Since this capacitor reduces the amount of
voltage ripple seen at the input pin, it also reduces the amount of EMI passed back along that line to other
circuitry.
SETTING THE OUTPUT VOLTAGE (V1) OF BOOST CONVERTER
The output voltage is set using the external resistors R1 and R2 (see Figure 2). A value of approximately 13.3kΩ
is recommended for R2 to establish a divider current of approximately 92µA. R1 is calculated using the formula:
R1 = R2 X (V2/1.23 −1) (6)
FEED-FORWARD COMPENSATION FOR BOOST CONVERTER
Although the LM4802B's internal Boost converter is internally compensated, the external feed-forward capacitor
Cfis required for stability (see Figure 2). Adding this capacitor puts a zero in the loop response of the converter.
The recommended frequency for the zero fz should be approximately 6kHz. Cf1 can be calculated using the
formula:
Cf1 = 1 / (2 X R1 X fz) (7)
14 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: LM4802B LM4802BLQBD
LM4802B, LM4802BLQBD
www.ti.com
SNAS243D –MAY 2004–REVISED MAY 2013
SELECTING DIODES
The external diode used in Figure 2 should be a Schottky diode. A 20V diode such as the MBR0520 is
recommended.
The MBR05XX series of diodes are designed to handle a maximum average current of 0.5A. For applications
exceeding 0.5A average but less than 1A, a Microsemi UPS5817 can be used.
DUTY CYCLE
The maximum duty cycle of the boost converter determines the maximum boost ratio of output-to-input voltage
that the converter can attain in continuous mode of operation. The duty cycle for a given boost application is
defined as:
Duty Cycle = VOUT + VDIODE - VIN/VOUT + VDIODE - VSW
This applies for continuous mode operation.
INDUCTANCE VALUE
The first question we are usually asked is: “How small can I make the inductor.” (because they are the largest
sized component and usually the most costly). The answer is not simple and involves trade-offs in performance.
Larger inductors mean less inductor ripple current, which typically means less output voltage ripple (for a given
size of output capacitor). Larger inductors also mean more load power can be delivered because the energy
stored during each switching cycle is:
E = L/2 X (lp)2 (8)
Where “lp” is the peak inductor current. An important point to observe is that the LM4802B will limit its switch
current based on peak current. This means that since lp(max) is fixed, increasing L will increase the maximum
amount of power available to the load. Conversely, using too little inductance may limit the amount of load
current which can be drawn from the output.
Best performance is usually obtained when the converter is operated in “continuous” mode at the load current
range of interest, typically giving better load regulation and less output ripple. Continuous operation is defined as
not allowing the inductor current to drop to zero during the cycle. It should be noted that all boost converters shift
over to discontinuous operation as the output load is reduced far enough, but a larger inductor stays “continuous”
over a wider load current range.
To better understand these trade-offs, a typical application circuit (5V to 12V boost with a 10µH inductor) will be
analyzed. We will assume:
VIN = 5V, VOUT = 12V, VDIODE = 0.5V, VSW = 0.5V (9)
Since the frequency is 1.6MHz (nominal), the period is approximately 0.625µs. The duty cycle will be 62.5%,
which means the ON-time of the switch is 0.390µs. It should be noted that when the switch is ON, the voltage
across the inductor is approximately 4.5V. Using the equation:
V = L (di/dt) (10)
We can then calculate the di/dt rate of the inductor which is found to be 0.45 A/µs during the ON-time. Using
these facts, we can then show what the inductor current will look like during operation:
Figure 29. 10μH Inductor Current 5V - 12V Boost (LM4802B)
Copyright © 2004–2013, Texas Instruments Incorporated Submit Documentation Feedback 15
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www.ti.com
During the 0.390µs ON-time, the inductor current ramps up 0.176A and ramps down an equal amount during the
OFF-time. This is defined as the inductor “ripple current”. It can also be seen that if the load current drops to
about 33mA, the inductor current will begin touching the zero axis which means it will be in discontinuous mode.
A similar analysis can be performed on any boost converter, to make sure the ripple current is reasonable and
continuous operation will be maintained at the typical load current values.
MAXIMUM SWITCH CURRENT
The maximum FET switch current available before the current limiter cuts in is dependent on duty cycle of the
application. This is illustrated in a graph in the Typical Performance Characteristics section which shows typical
values of switch current as a function of effective (actual) duty cycle.
CALCULATING OUTPUT CURRENT OF BOOST CONVERTER (IAMP)
As shown in Figure 29 which depicts inductor current, the load current is related to the average inductor current
by the relation:
ILOAD = IIND(AVG) x (1 - DC)
where
• "DC" is the duty cycle of the application (11)
The switch current can be found by:
ISW = IIND(AVG) + 1/2 (IRIPPLE) (12)
Inductor ripple current is dependent on inductance, duty cycle, input voltage and frequency:
IRIPPLE = DC x (VIN-VSW) / (f x L) (13)
combining all terms, we can develop an expression which allows the maximum available load current to be
calculated:
ILOAD(max) = (1–DC)x(ISW(max)–DC(VIN-VSW))/fL (14)
The equation shown to calculate maximum load current takes into account the losses in the inductor or turn-OFF
switching losses of the FET and diode.
DESIGN PARAMETERS VSW AND ISW
The value of the FET "ON" voltage (referred to as VSW in Equation 11 thru Equation 14) is dependent on load
current. A good approximation can be obtained by multiplying the "ON Resistance" of the FET times the average
inductor current.
FET on resistance increases at VIN values below 5V, since the internal N-FET has less gate voltage in this input
voltage range (see Typical Performance Characteristics curves). Above VIN = 5V, the FET gate voltage is
internally clamped to 5V.
The maximum peak switch current the device can deliver is dependent on duty cycle. For higher duty cycles, see
Typical Performance Characteristics curves.
INDUCTOR SUPPLIERS
Recommended suppliers of inductors for the LM4802B include, but are not limited to Taiyo-Yuden, Sumida,
Coilcraft, Panasonic, TDK and Murata. When selecting an inductor, make certain that the continuous current
rating is high enough to avoid saturation at peak currents. A suitable core type must be used to minimize core
(switching) losses, and wire power losses must be considered when selecting the current rating.
16 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated
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SNAS243D –MAY 2004–REVISED MAY 2013
PCB LAYOUT GUIDELINES
High frequency boost converters require very careful layout of components in order to get stable operation and
low noise. All components must be as close as possible to the LM4802 device. It is recommended that a 4-layer
PCB be used so that internal ground planes are available.
Some additional guidelines to be observed:
1. Keep the path between L1, D1, and Co extremely short. Parasitic trace inductance in series with D1 and Co
will increase noise and ringing.
2. The feedback components R1, R2 and Cf1 must be kept close to the FB pin of U1 to prevent noise injection
on the FB pin trace.
3. f internal ground planes are available (recommended) use vias to connect directly to ground at pin 2 of U1,
as well as the negative sides of capacitors Cs1 and Co.
GENERAL MIXED-SIGNAL LAYOUT RECOMMENDATION
This section provides practical guidelines for mixed signal PCB layout that involves various digital/analog power
and ground traces. Designers should note that these are only "rule-of-thumb" recommendations and the actual
results will depend heavily on the final layout.
Power and Ground Circuits
For 2 layer mixed signal design, it is important to isolate the digital power and ground trace paths from the
analog power and ground trace paths. Star trace routing techniques (bringing individual traces back to a central
point rather than daisy chaining traces together in a serial manner) can have a major impact on low level signal
performance. Star trace routing refers to using individual traces to feed power and ground to each circuit or even
device. This technique will take require a greater amount of design time but will not increase the final price of the
board. The only extra parts required may be some jumpers.
Single-Point Power / Ground Connection
The analog power traces should be connected to the digital traces through a single point (link). A "Pi-filter" can
be helpful in minimizing high frequency noise coupling between the analog and digital sections. It is further
recommended to place digital and analog power traces over the corresponding digital and analog ground traces
to minimize noise coupling.
Placement of Digital and Analog Components
All digital components and high-speed digital signals traces should be located as far away as possible from
analog components and circuit traces.
Avoiding Typical Design / Layout Problems
Avoid ground loops or running digital and analog traces parallel to each other (side-by-side) on the same PCB
layer. When traces must cross over each other do it at 90 degrees. Running digital and analog traces at 90
degrees to each other from the top to the bottom side as much as possible will minimize capacitive noise
coupling and crosstalk.
Copyright © 2004–2013, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: LM4802B LM4802BLQBD
S/D1
GND2
12
6
GND1
7
114
SW
VDD
L1
10 PH
FB 8
C3
1000 pF
R3
15k
R2
56k
S/D2
18
Cs1
4.7 PF
C2
4.7 PF
V1 26
Cs2
4.7 PF
GND3 20
Cb
1.0 PF
Bypass
19
15:
VO2 17
15:
VO1 25 2 PF
Ceramic
VDD
VDD
20k
-IN
22
0.1 PF
CINA
Audio In
RfA
200k
+IN
21
V1 = VFB (1 + R1/R2)
D2
RINA
LM4802B, LM4802BLQBD
SNAS243D –MAY 2004–REVISED MAY 2013
www.ti.com
Figure 30. Demo Board Reference Schematic
18 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: LM4802B LM4802BLQBD
LM4802B, LM4802BLQBD
www.ti.com
SNAS243D –MAY 2004–REVISED MAY 2013
REVISION HISTORY
Changes from Revision C (May 2013) to Revision D Page
• Changed layout of National Data Sheet to TI format .......................................................................................................... 20
Copyright © 2004–2013, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Links: LM4802B LM4802BLQBD
PACKAGE OPTION ADDENDUM
www.ti.com 15-Aug-2017
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM4802BLQ/NOPB LIFEBUY WQFN NJB 28 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM 4802BLQ
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM4802BLQ/NOPB WQFN NJB 28 1000 178.0 12.4 5.3 5.3 1.3 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 12-Aug-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM4802BLQ/NOPB WQFN NJB 28 1000 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 12-Aug-2013
Pack Materials-Page 2
MECHANICAL DATA
NJB0028A
www.ti.com
LQA28A (REV B)
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