SN54AHC123A, SN74AHC123A
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS
SCLS352F – JULY 1997 – REVISED AUGUST 2000
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
EPIC
(Enhanced-Performance Implanted
CMOS) Process
D
Operating Range 2-V to 5.5-V VCC
D
Schmitt-Trigger Circuitry On A, B, and CLR
Inputs for Slow Input Transition Rates
D
Edge Triggered From Active-High or
Active-Low Gated Logic Inputs
D
Retriggerable for Very Long Output Pulses
D
Overriding Clear Terminates Output Pulse
D
Glitch-Free Power-Up Reset On Outputs
D
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
D
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Very Small-Outline (DGV), Thin
Shrink Small-Outline (PW), and Ceramic
Flat (W) Packages, Ceramic Chip Carriers
(FK), and Standard Plastic (N) and Ceramic
(J) DIPs
description
The ’AHC123A devices are dual retriggerable
monostable multivibrators designed for 2-V to
5.5-V VCC operation.
These edge-triggered multivibrators feature
output pulse-duration control by three methods. In
the first method, the A input is low, and the B input goes high. In the second method, the B input is high, and
the A input goes low . In the third method, the A input is low, the B input is high, and the clear (CLR) input goes
high.
The output pulse
duration
is programmed by selecting external resistance and capacitance values. The external
timing capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor connected
between Rext/Cext and VCC. To obtain variable pulse durations, connect an external variable resistance between
Rext/Cext and VCC. The output pulse duration also can be reduced by taking CLR low.
Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input
pulse. The A, B, and CLR inputs have Schmitt triggers with sufficient hysteresis to handle slow input transition
rates with jitter-free triggering at the outputs.
Once triggered, the basic pulse duration can be extended by retriggering the gated low-level-active (A) or
high-level-active (B) input. Pulse duration can be reduced by taking CLR low . CLR input can be used to override
A or B inputs. The input/output timing diagram illustrates pulse control by retriggering the inputs and early
clearing.
Copyright 2000, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN54AHC123A ...J OR W PACKAGE
SN74AHC123A . . . D, DB, DGV, N, OR PW PACKAGE
(TOP VIEW)
SN54AHC123A . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1A
1B
1CLR
1Q
2Q
2Cext
2Rext/Cext
GND
VCC
1Rext/Cext
1Cext
1Q
2Q
2CLR
2B
2A
3212019
910111213
4
5
6
7
8
18
17
16
15
14
1Cext
1Q
NC
2Q
2CLR
1CLR
1Q
NC
2Q
2Cext
1B
1A
NC
2A
2B V
1R
2R GND
NC CC
NC – No internal connection
ext/Cext
ext/Cext
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
EPIC is a trademark of Texas Instruments Incorporated.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54AHC123A, SN74AHC123A
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS
SCLS352F – JULY 1997 – REVISED AUGUST 2000
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description (continued)
The variance in output pulse duration from device to device typically is less than ±0.5% for given external timing
components. An example of this distribution for the ’AHC123A is shown in Figure 10. V ariations in output pulse
duration versus supply voltage and temperature are shown in Figure 6.
During power up, Q outputs are in the low state, and Q outputs are in the high state. The outputs are glitch free,
without applying a reset pulse.
The SN54AHC123A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74AHC123A is characterized for operation from –40°C to 85°C.
For additional application information on multivibrators, see the application report
Designing With The
SN74AHC123A and SN74AHCT123A
, literature number SCLA014.
FUNCTION TABLE
(each multivibrator)
INPUTS OUTPUTS
CLR A B Q Q
L X X L H
XHXL
†H†
XXLL
†H†
H L ↑
H
#
H
↑L H
†These outputs are based on the
assumption that the indicated
steady-state conditions at the A and
B inputs have been set up long enough to
complete any pulse started before the
setup.
logic symbol‡
R
3
CX
14
41Q
13
RX/CX
15
1
1A 2
1B
&
R
11
CX
6
12 2Q
5
RX/CX
7
9
2A 10
2B
&
1CLR
2CLR
1Cext
2Cext
1Rext/Cext
2Rext/Cext
1Q
2Q
‡This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, DB, DGV, J, N, PW, and W packages.
SN54AHC123A, SN74AHC123A
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS
SCLS352F – JULY 1997 – REVISED AUGUST 2000
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram, each multivibrator (positive logic)
CLR
Cext
Rext/Cext
R
B
A
Q
Q
input/output timing diagram
A
B
CLR
Q
Q
twtwtw + trr
trr
Rext/Cext
SN54AHC123A, SN74AHC123A
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS
SCLS352F – JULY 1997 – REVISED AUGUST 2000
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Supply voltage range, VCC (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 2) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range in high or low state, VO (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . .
Output voltage range in power-off state, VO (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) –20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 3): D package 73°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DB package 82°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 120°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 108°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. Voltage values are with respect to the network ground terminal.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
3. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 4)
SN54AHC123A SN74AHC123A
UNIT
MIN MAX MIN MAX
UNIT
VCC Supply voltage 2 5.5 2 5.5 V
VCC = 2 V 1.5 1.5
VIH High-level input voltage VCC = 3 V 2.1 2.1 V
VCC = 5.5 V 3.85 3.85
VCC = 2 V 0.5 0.5
VIL Low-level input voltage VCC = 3 V 0.9 0.9 V
VCC = 5.5 V 1.65 1.65
VIInput voltage 0 5.5 0 5.5 V
VOOutput voltage 0 VCC 0 VCC V
VCC = 2 V –50 –50
m
A
IOH High-level output current VCC = 3.3 V ± 0.3 V –4 –4
mA
VCC = 5 V ± 0.5 V –8 –8
mA
VCC = 2 V 50 50
m
A
IOL Low-level output current VCC = 3.3 V ± 0.3 V 4 4
mA
VCC = 5 V ± 0.5 V 8 8
mA
Rt
External timing resistance
VCC = 2 V 5k 5k
Ω
R
ext
E
x
ternal
timing
resistance
VCC > 3 V 1k 1k
Ω
∆t/∆VCC Power-up ramp rate 1 1 ms/V
TAOperating free-air temperature –55 125 –40 85 °C
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
SN54AHC123A, SN74AHC123A
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS
SCLS352F – JULY 1997 – REVISED AUGUST 2000
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25°C SN54AHC123A SN74AHC123A
UNIT
PARAMETER
TEST
CONDITIONS
V
CC MIN TYP MAX MIN MAX MIN MAX
UNIT
2 V 1.9 2 1.9 1.9
IOH = –50
m
A3 V 2.9 3 2.9 2.9
VOH 4.5 V 4.4 4.5 4.4 4.4 V
IOH = –4 mA 3 V 2.58 2.48 2.48
IOH = –8 mA 4.5 V 3.94 3.8 3.8
2 V 0.1 0.1 0.1
IOL = 50
m
A3 V 0.1 0.1 0.1
VOL 4.5 V 0.1 0.1 0.1 V
IOL = 4 mA 3 V 0.36 0.5 0.44
IOL = 8 mA 4.5 V 0.36 0.5 0.44
II
Rext/Cext†VI = VCC or GND 5.5 V ±0.25 ±2.5 ±2.5
m
A
I
IA, B, and CLR VI = VCC or GND 0 V to 5.5 V ±0.1 ±1* ±1
m
A
ICC Quiescent VI = VCC or GND, IO = 0 5.5 V 4 40 40
m
A
V V GND
3 V 160 250 280 280
ICC Active state
p
VI = VCC or GND,
Rext/Cext =05V
CC
4.5 V 280 500 650 650
m
A
R
ex
t/C
ex
t
=
0
.
5
VCC
5.5 V 360 750 975 975
CiVI = VCC or GND 5 V 1.9 10 10 pF
* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.
†This test is performed with the terminal in the off-state condition.
timing requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V
(unless otherwise noted) (see Figure 1)
TEST CONDITIONS
TA = 25°C SN54AHC123A SN74AHC123A
UNIT
TEST
CONDITIONS
MIN TYP MAX MIN MAX MIN MAX
UNIT
t
Pulse CLR 5 5 5
ns
t
wduration A or B trigger 5 5 5
ns
t
Pulse retrigger time
Rext = 1 kΩ, Cext = 100 pF ‡76 ‡ ‡ ns
t
rr
P
u
l
se re
t
r
i
gger
ti
me Rext = 1 kΩ, Cext = 0.01
m
F‡1.8 ‡ ‡
m
s
‡See retriggering data in the
application information
section.
timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V
(unless otherwise noted) (see Figure 1)
TEST CONDITIONS
TA = 25°C SN54AHC123A SN74AHC123A
UNIT
TEST
CONDITIONS
MIN TYP MAX MIN MAX MIN MAX
UNIT
t
Pulse CLR 5 5 5
ns
t
wduration A or B trigger 5 5 5
ns
t
Pulse retrigger time
Rext = 1 kΩ, Cext = 100 pF ‡59 ‡ ‡ ns
t
rr
P
u
l
se re
t
r
i
gger
ti
me Rext = 1 kΩ, Cext = 0.01
m
F‡1.5 ‡ ‡
m
s
‡See retriggering data in the
application information
section.
SN54AHC123A, SN74AHC123A
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS
SCLS352F – JULY 1997 – REVISED AUGUST 2000
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ±0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM TO TEST TA = 25°C SN54AHC123A SN74AHC123A
UNIT
PARAMETER
(INPUT) (OUTPUT) CONDITIONS MIN TYP MAX MIN MAX MIN MAX
UNIT
tPLH
A or B
QorQ
CL=15
p
F
9.5* 20.6* 1* 24* 1 24
ns
tPHL
A
or
B
Q
or
Q
C
L =
15
pF
10.2* 20.6* 1* 24* 1 24
ns
tPLH
CLR
QorQ
CL=15
p
F
7.5* 15.8* 1* 18.5* 1 18.5
ns
tPHL
CLR
Q
or
Q
C
L =
15
pF
9.3* 15.8* 1* 18.5* 1 18.5
ns
tPLH
CLR trigger
QorQ
CL=15
p
F
10* 22.4* 1* 26* 1 26
ns
tPHL
CLR
tr
i
gger
Q
or
Q
C
L =
15
pF
10.6* 22.4* 1* 26* 1 26
ns
tPLH
A or B
QorQ
CL=50
p
F
10.5 24.1 1 27.5 1 27.5
ns
tPHL
A
or
B
Q
or
Q
C
L =
50
pF
11.8 24.1 1 27.5 1 27.5
ns
tPLH
CLR
QorQ
CL=50
p
F
8.9 19.3 1 22 1 22
ns
tPHL
CLR
Q
or
Q
C
L =
50
pF
10.5 19.3 1 22 1 22
ns
tPLH
CLR trigger
QorQ
CL=50
p
F
11 25.9 1 29.5 1 29.5
ns
tPHL
CLR
tr
i
gger
Q
or
Q
C
L =
50
pF
12.3 25.9 1 29.5 1 29.5
ns
†
CL = 50 pF,
Cext = 28 pF,
Rext = 2 kΩ182 240 300 300 ns
tw
†
Q or Q CL = 50 pF,
Cext = 0.01 µF,
Rext = 10 kΩ90 100 110 90 110 90 110
m
s
CL = 50 pF,
Cext = 0.1 µF,
Rext = 10 kΩ0.9 1 1.1 0.9 1.1 0.9 1.1 ms
∆tw‡±1 %
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
†tw = Pulse duration at Q and Q outputs
‡∆tw = Output pulse-duration variation (Q and Q) between circuits in same package
SN54AHC123A, SN74AHC123A
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS
SCLS352F – JULY 1997 – REVISED AUGUST 2000
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ±0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM TO TEST TA = 25°C SN54AHC123A SN74AHC123A
UNIT
PARAMETER
(NPUT) (OUTPUT) CONDITIONS MIN TYP MAX MIN MAX MIN MAX
UNIT
tPLH
A or B
QorQ
CL=15
p
F
6.5* 12* 1* 14* 1 14
ns
tPHL
A
or
B
Q
or
Q
C
L =
15
pF
7.1* 12* 1* 14* 1 14
ns
tPLH
CLR
QorQ
CL=15
p
F
5.3* 9.4* 1* 11* 111
ns
tPHL
CLR
Q
or
Q
C
L =
15
pF
6.5* 9.4* 1* 11* 111
ns
tPLH
CLR trigger
QorQ
CL=15
p
F
6.9* 12.9* 1* 15* 1 15
ns
tPHL
CLR
tr
i
gger
Q
or
Q
C
L =
15
pF
7.4* 12.9* 1* 15* 1 15
ns
tPLH
A or B
QorQ
CL=50
p
F
7.3 14 1 16 1 16
ns
tPHL
A
or
B
Q
or
Q
C
L =
50
pF
8.3 14 1 16 1 16
ns
tPLH
CLR
QorQ
CL=50
p
F
6.3 11.4 1 13 1 13
ns
tPHL
CLR
Q
or
Q
C
L =
50
pF
7.4 11.4 1 13 1 13
ns
tPLH
CLR trigger
QorQ
CL=50
p
F
7.6 14.9 1 17 1 17
ns
tPHL
CLR
tr
i
gger
Q
or
Q
C
L =
50
pF
8.7 14.9 1 17 1 17
ns
†
CL = 50 pF,
Cext = 28 pF,
Rext = 2 kΩ167 200 240 240 ns
tw
†
Q or Q CL = 50 pF,
Cext = 0.01 µF,
Rext = 10 kΩ90 100 110 90 110 90 110
m
s
CL = 50 pF,
Cext = 0.1 µF,
Rext = 10 kΩ0.9 1 1.1 0.9 1.1 0.9 1.1 ms
∆tw‡±1 %
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
†tw = Pulse duration at Q and Q outputs
‡∆tw = Output pulse-duration variation (Q and Q) between circuits in same package
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance No load 29 pF
SN54AHC123A, SN74AHC123A
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS
SCLS352F – JULY 1997 – REVISED AUGUST 2000
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: ZO = 50 Ω, tr
+
3 ns, tf
+
3 ns.
C. The outputs are measured one at a time with one input transition per measurement.
50% VCC
tPLH
tPHL
VOH
VOL
VCC
50% VCC
50% VCC
VCC
Input A
(see Note B) 50% VCC 0 V
0 V
In-Phase
Output
Out-of-Phase
Output
VOLTAGE WAVEFORMS
DELAY TIMES
Input B
(see Note B)
VOL
VOH
LOAD CIRCUIT
Test
Point
CL
(see Note A)
From Output
Under Test
50% VCC
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
VCC
0 V
50% VCC
Input CLR
(see Note B)
Out-of-Phase
Output
In-Phase
Output
VOLTAGE WAVEFORMS
DELAY TIMES
50% VCC
50% VCC
50% VCC 50% VCC
VCC
0 V
tw
VOLTAGE WAVEFORMS
PULSE DURATION
Inputs or
Outputs 50% VCC
50% VCC
Figure 1. Load Circuit and Voltage Waveforms
SN54AHC123A, SN74AHC123A
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS
SCLS352F – JULY 1997 – REVISED AUGUST 2000
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
caution in use
To prevent malfunctions due to noise, connect a high-frequency capacitor between VCC and GND, and keep
the wiring between the external components and Cext and Rext/Cext terminals as short as possible.
power-down considerations
Large values of Cext can cause problems when powering down the ’AHC123A because of the amount of energy
stored in the capacitor. When a system containing this device is powered down, the capacitor can discharge
from VCC through the protection diodes at pin 2 or pin 14. Current through the input protection diodes must be
limited to 30 mA; therefore, the turn-off time of the VCC power supply must not be faster than
t = VCC × Cext/30 mA. For example, if VCC = 5 V and Cext = 15 pF, the VCC supply must turn off no faster than
t = (5 V) × (15 pF)/30 mA = 2.5 ns. Usually, this is not a problem because power supplies are heavily filtered
and cannot discharge at this rate. When a more rapid decrease of VCC to zero occurs, the ’AHC123A can sustain
damage. To avoid this possibility, use external clamping diodes.
output pulse duration
The output pulse duration, tw, is determined primarily by the values of the external capacitance (CT) and timing
resistance (RT). The timing components are connected as shown in Figure 2.
VCC
RT
CT
To Rext/Cext
Terminal To Cext
Terminal
Figure 2. Timing-Component Connections
The pulse duration is given by:
tw
+
K
RT
CT
if CT is ≥1000 pF, K = 1.0 or
if CT is <1000 pF, K can be determined from Figure 5
where:
tw= pulse duration in ns
RT= external timing resistance in kΩ
CT= external capacitance in pF
K = multiplier factor
Equation 1 and Figure 3 can be used to determine values for pulse duration, external resistance, and external
capacitance.
(1)
SN54AHC123A, SN74AHC123A
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS
SCLS352F – JULY 1997 – REVISED AUGUST 2000
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
retriggering data
The minimum input retriggering time (tMIR) is the minimum time required after the initial signal before retriggering
the input. After tMIR, the device retriggers the output. Experimentally, it also can be shown that to retrigger the
output pulse, the two adjacent input signals should be tMIR apart, where tMIR = 0.30 × tw. The retrigger pulse
duration is calculated as shown in Figure 3.
tMIR
tRT
tPLH tw
Input
Output
tRT = tw + tPLH = (K × RT × CT) + tPLH
Where:
tMIR = Minimum Input Retriggering Time
tPLH = Propagation Delay
tRT = Retrigger Time
tw= Output Pulse Duration Before Retriggering
Figure 3. Retrigger Pulse Duration
The minimum value from the end of the input pulse to the beginning of the retriggered output should be
approximately 15 ns to ensure a retriggered output. This is illustrated in Figure 4.
Input
Output
tMRT= Minimum Time Between the End of the Second Input Pulse and the Beginning of the Retriggered Output
tMRT= 15 ns
tMRT
Figure 4. Input/Output Requirements
SN54AHC123A, SN74AHC123A
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS
SCLS352F – JULY 1997 – REVISED AUGUST 2000
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION†
11010
2103104105106107
1.00E+00
1.00E+01
1.00E+02
1.00E+03
1.00E+04
1.00E+05
1.00E+06
1.00E+07
1.00E+08
1.00E+09
RT = 1k Ω
RT = 5k Ω
RT = 10k Ω
RT = 80k Ω
RT = 150k Ω
RT = 200k Ω
VCC = 5 V
TA = 25°C
Output Pulse Duration – ns
w
t–
CT – External Timing Capacitance – pF
Figure 5. Output Pulse Duration vs External Timing Capacitance
tw = 866 ns at:
VCC = 5 V
RT = 10 kΩ
CT = 50 pF
TA = 25°C
–60 –40 –20 0 20 40 60 80 100 120 140 160
VCC = 2.5 V
VCC = 3 V
VCC = 3.5 V
VCC = 4 V
VCC = 5 V
VCC = 6 V
VCC = 7 V
180
–6%
–4%
–2%
0%
2%
4%
6%
8%
10%
12%
14%
Temperature – °C
Variation in Output Pulse Duration
Figure 6. Variations in Output Pulse Duration vs Temperature
†Operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied.
SN54AHC123A, SN74AHC123A
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS
SCLS352F – JULY 1997 – REVISED AUGUST 2000
12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION†
Figure 7
MINIMUM TRIGGER TIME
vs
VCC CHARACTERISTICS
RT = 1 kΩ
TA = 25°C
10.00
0
1.00
0.10
0.01 123456
CT = 0.01 µF
CT = 1000 pF
CT = 100 pF
VCC – Supply Voltage – V
Minimum Retrigger Time– µs
rr – t
Figure 8
1.20
1.15
1.10
1.05
1.00
0.95
0.901.5 2 2.5 3 3.5 4 4.5 5 5.5 6
RT = 10 kΩ
TA = 25°C
tW = K ×CT ×RT
VCC – Supply Voltage – V
OUTPUT PULSE-DURATION CONSTANT
vs
SUPPLY VOLTAGE
Output Pulse-Duration Constant – K
CT = 1000 pF
CT = 0.01 µF
CT = 0.1 µF
Figure 9
1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50
0.00001
0.0001
0.001
TA = 25°C
VCC = 5 V
For Capacitor Values of
0.001 µF or Greater,
K = 1.0
(K is Independent of R)
Multiplier Factor – K
EXTERNAL CAPACITANCE
vs
MULTIPLIER FACTOR
CT– External Capacitor V alue – µF
Figure 10
tw – Output Pulse Duration
Relative Frequency of Occurance
DISTRIBUTION OF UNITS
vs
OUTPUT PULSE DURATION
Mean = 856 ns
Median = 856 ns
Std. Dev. = 3.5 ns
VCC = 5 V
TA = 25°C
CT = 50 pF
RT = 10 k
W
–3 Std. Dev. +3 Std. Dev.
Median
99% of Data Units
†Operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied.
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 2000, Texas Instruments Incorporated