©2002 Fairchild Semiconductor Corporation RFD15P05, RFD15P05SM, RFP15P05 Rev. B
RFD15P05, RFD15P05SM, RFP15P05
15A, 50V, 0.150 Ohm, P-Channel Power
MOSFETs
These are P-Channel power MOSFETs manufactured using
the MegaFET process. This process which uses feature
sizes approaching those of LSI integrated circuits, gives
optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers, and relay drivers. These transistors can be operated
directly from integrated circuits.
Formerly developmental type TA09833.
Features
• 15A, 50V
•r
DS(ON)
= 0.150
Ω
• Temperature Compensating PSPICE
®
Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Packaging
Ordering Information
PART NUMBER PACKAGE BRAND
RFD15P05 TO-251AA D15P05
RFD15P05SM TO-252AA D15P05
RFP15P05 TO-220AB RFP15P05
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-252AA variant in the tape and reel, i.e., RFD15P05SM9A.
D
G
S
JEDEC TO-251AA JEDEC TO-252AA
JEDEC TO-220AB
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
DRAIN
(FLANGE)
GATE
SOURCE
DRAIN
(FLANGE)
SOURCE
DRAIN
GATE
Data Sheet January 2002
©2002 Fairchild Semiconductor Corporation RFD15P05, RFD15P05SM, RFP15P05 Rev. B
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
RFD15P05, RFD15P05SM,
RFP15P05 UNITS
Drain Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
-50 V
Drain Gate Voltage (R
G
= 20K
Ω
) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
-50 V
Gate Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
±
20 V
Drain Current Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
DM
-15
Refer to Peak Current Curve
A
Single Pulse Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
AS
Refer to UIS Curve
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
80 W
Derate above 25
o
C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.533 W/
o
C
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
-55 to 175
o
C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
300
260
o
C
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 150
o
C.
Electrical Specifications
T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV
DSS
I
D
= 250
µ
A, V
GS
= 0V (Figure 11) -50 - - V
Gate Threshold Voltage V
GS(TH)
V
GS
= V
DS
, I
D
= 250
µ
A -2.0 - -4.0 V
Zero Gate Voltage Drain Current I
DSS
V
DS
= Rated BV
DSS
---1
µ
A
V
DS
= 0.8 x Rated BV
DSS,
T
C
= 150
o
C--25
µ
A
Gate to Source Leakage Current I
GSS
V
GS
=
±
20V - -
±
100 nA
Drain to Source On Resistance r
DS(ON)
I
D
= 15A, V
GS
= -10V (Figure 9) - - 0.150
Ω
Turn-On Time t
ON
V
DD
= -25V, I
D
≈
7.5A, R
G
= 12.5
Ω
,
R
L
= 3.3
Ω
, V
GS
= -10V
- - 60 ns
Turn-On Delay Time t
D(ON)
-16 - ns
Rise Time t
R
-30 - ns
Turn-Off Delay Time t
D(OFF)
-50 - ns
Fall Time t
F
-20 - ns
Turn-Off Time t
OFF
- - 100 ns
Total Gate Charge Q
G(TOT)
V
GS
= 0V to -20V V
DD
= -40V, I
D
= 15A,
R
L
= 2.67
Ω,
I
G(REF)
= -0.65mA
- - 150 nC
Gate Charge at -10V Q
G(-10)
V
GS
= 0V to -10V - - 75 nC
Threshold Gate Charge Q
G(TH)
V
GS
= 0V to -2V - - 3.5 nC
Input Capacitance C
ISS
V
DS
= -25V, V
GS
= 0V
f = 1MHz (Figure 12)
- 1150 - pF
Output Capacitance C
OSS
- 300 - pF
Reverse Transfer Capacitance C
RSS
-56 - pF
Thermal Resistance Junction to Case R
θ
JC
TO-220AB, TO-251AA, TO-252AA - - 1.875
o
C/W
Thermal Resistance Junction to Ambient R
θ
JA
TO-251AA, TO-252AA - - 100
o
C/W
TO-220AB - - 62.5
o
C/W
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage V
SD
I
SD
= -15A - - -1.5 V
Reverse Recovery Time t
RR
I
SD
= -15A, dI
SD
/dt = -100A/
µ
s - - 125 ns
NOTES:
2. Pulse test: pulse duration
≤
300ms, duty cycle
≤
2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
RFD15P05, RFD15P05SM, RFP15P05
©2002 Fairchild Semiconductor Corporation RFD15P05, RFD15P05SM, RFP15P05 Rev. B
Typical Performance Curves
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. PEAK CURRENT CAPABILITY
TC, CASE TEMPERATURE (oC)
25 50 75 100 125 150 175
0
POWER DISSIPATION MULTIPLIER
0
0
0.2
0.4
0.6
0.8
1.0
1.2
-4
-8
0
25 50 75 100 125 150
ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC)
-12
-16
175
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
PDM
t1
t2
0.01
0.1
1
2
THERMAL IMPEDANCE
ZθJC, NORMALIZED TRANSIENT
t1, RECTANGULAR PULSE DURATION (s)
10-5 10-3 10-2 10-1 100101
10-4
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
0.5
-100
-10
-1
-1 -10 -100
VDS , DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
100µs
1ms
100ms
DC
10ms
TC = 25oC
TJ = MAX RATED
10-5 10-4 10-3 10-2 10-1 100101
-100
t, PULSE WIDTH (s)
IDM, PEAK CURRENT CAPABILITY (A)
VGS = -20V
VGS = -10V
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
-10
-200
FOR TEMPERATURES ABOVE 25oC
DERATE PEAK CURRENT
CAPABILITY AS FOLLOWS:
II
25
175 TC
–
150
---------------------
=
TC = 25oC
RFD15P05, RFD15P05SM, RFP15P05
©2002 Fairchild Semiconductor Corporation RFD15P05, RFD15P05SM, RFP15P05 Rev. B
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY FIGURE 7. SATURATION CHARACTERISTICS
FIGURE 8. TRANSFER CHARACTERISTICS FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
Typical Performance Curves (Continued)
-10
-50
-1
0.1 1 10 100
tAV , TIME IN AVALANCHE (ms)
IAS, AVALANCHE CURRENT (A)
STARTING TJ = 150oC
STARTING TJ = 25oC
If R = 0
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1]
tAV = (L) (IAS) / (1.3RATED BVDSS - VDD)
If R ≠ 0
0
0 -1.5 -3.0 -4.5 -6.0 -7.5
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = -5V
VGS = -6V
VGS = -8V
VGS = -7V
VGS = -10V
-10
-20
-40
VGS = -4.5V
VGS = -20V
-30
PULSE DURATION = 80µs
TC = 25oC
DUTY CYCLE = 0.5% MAX
0-2 -4 -6 -8 -10
VGS , GATE TO SOURCE VOLTAGE (V)
IDS(ON), DRAIN TO SOURCE CURRENT (A)
0
VDD = -15V
PULSE DURATION = 250µs-55oC
175oC
25oC
-8
-16
-32
-24
-40
DUTY CYCLE = 0.5% MAX
2.0
1.5
1.0
0.5
0
-80 -40 0 40 80 120 160
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
2.5
200
ON RESISTANCE
PULSE DURATION = 80µs
VGS = -10V, ID = -15A
DUTY CYCLE = 0.5% MAX
2.0
1.5
1.0
0.5
0
-80 -40 0 40 80 160120
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED GATE
200
THRESHOLD VOLTAGE
VGS = VDS
ID = -250µA
2.0
1.5
1.0
0.5
0
-80 -40 0 40 80 120 160
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
TJ, JUNCTION TEMPERATURE (oC)
200
ID = -250µA
RFD15P05, RFD15P05SM, RFP15P05
©2002 Fairchild Semiconductor Corporation RFD15P05, RFD15P05SM, RFP15P05 Rev. B
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Test Circuits and Waveforms
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
Typical Performance Curves (Continued)
1400
1000
800
400
0
0-5 -10 -15 -20 -25
C, CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
CISS
COSS
CRSS
200
600
1200
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGS
-50
-37.5
-25
-12.5
0
-10.0
-7.5
-5.0
-2.5
0.0
20
IG(REF)
IG(ACT)
80
IG(REF)
IG(ACT)
t, TIME (ms)
VDD = BVDSS VDD = BVDSS
RL = 3.33Ω
IG(REF) = -0.65mA
0.75 BVDSS
0.50 BVDSS
0.25 BVDSS
0.75 BVDSS
0.50 BVDSS
0.25 BVDSS
VDS , DRAIN TO SOURCE VOLTAGE (V)
VGS , GATE TO SOURCE VOLTAGE (V)
VGS = -10V
tP
0.01Ω
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VGS
VDD
VDS
BVDSS
tP
IAS
tAV
0
VGS
RL
RG
DUT
+
-
VDD
td(ON)
tr
90%
10%
VDS 90%
tf
td(OFF)
tOFF
90%
50%
50%
10%
PULSE WIDTH
VGS
tON
10%
0
0
RFD15P05, RFD15P05SM, RFP15P05
©2002 Fairchild Semiconductor Corporation RFD15P05, RFD15P05SM, RFP15P05 Rev. B
FIGURE 18. GATE CHARGE TEST CIRCUIT FIGURE 19. GATE CHARGE WAVEFORMS
Test Circuits and Waveforms (Continued)
RL
VGS
+
-
VDS
VDD
DUT
Ig(REF)
VDD
Qg(TH)
VGS = -2V
Qg(-10)
VGS = -10V
Qg(TOT)
VGS = -20V
VDS
-VGS
Ig(REF)
0
0
RFD15P05, RFD15P05SM, RFP15P05
©2002 Fairchild Semiconductor Corporation RFD15P05, RFD15P05SM, RFP15P05 Rev. B
PSPICE Electrical Model
.SUBCKT RFP15P05 2 1 3 REV 9/06/94
CA 12 8 1.6e-9
CB 15 14 1.47e-9
CIN 6 8 1.09e-9
DBODY 5 7 DBDMOD
DBREAK 7 11 DBKMOD
DPLCAP 10 6 DPLCAPMOD
EBREAK 5 11 17 18 -73.0
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 5 10 8 6 1
EVTO 20 6 8 18 1
IT 8 17 1
LDRAIN 2 5 1e-9
LGATE 1 9 6.73e-9
LSOURCE 3 7 6.69e-9
MOS1 16 6 8 8 MOSMOD M = 0.99
MOS2 16 21 8 8 MOSMOD M = 0.01
RBREAK 17 18 RBKMOD 1
RDRAIN 50 16 RDSMOD 63.6e-3
RGATE 9 20 7.37
RIN 6 8 1e9
RSCL1 5 51 RSCLMOD 1e-6
RSCL2 5 50 1e3
RSOURCE 8 7 RDSMOD 46.5e-3
RVTO 18 19 RVTOMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 -0.65
ESCL 51 50 VALUE = {(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/35,4))}
.MODEL DBDMOD D (IS = 1.27e-13 RS = 1.62e-2 TRS1 = 1.35e-3 TRS2 = -4.33e-6 CJO = 1.25e-9 TT = 7.97e-8)
.MODEL DBKMOD D (RS = 2.54e-1 TRS1 = 4.54e-3 TRS2 = -1.12e-5)
.MODEL DPLCAPMOD D (CJO = 285e-12 IS = 1e-30 N = 10)
.MODEL MOSMOD PMOS (VTO = -3.78 KP = 6.97 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL RBKMOD RES (TC1 = 9.15e-4 TC2 = -4.0e-7)
.MODEL RDSMOD RES (TC1 = 5.47e-3 TC2 = 1.37e-5)
.MODEL RSCLMOD RES (TC1 = 1.9e-3 TC2 = -7.5e-6)
.MODEL RVTOMOD RES (TC1 = -3.71e-3 TC2 = -2.41e-6)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 3.65 VOFF = 1.65)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 1.65 VOFF = 3.65)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.60 VOFF = -4.40)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.40 VOFF = 0.60)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-circuit for the Power MOSFET Featuring
Global Temperature Options; authored by William J. Hepp and C. Frank Wheatley.
MOS1
10
DPLCAP
RDRAIN
DBREAK
LDRAIN
DRAIN
LSOURCE
DBODY
RSOURCE
EBREAK
MOS2
RIN CIN
VTO
ESG
CA
EVTO
RGATE
GATE
LGATE
52
11
21
8
6
16
20
9
1
18
8
6
8
+
-
+
-
+
-
+
-
3
SOURCE
RBREAK
RVTO
VBAT
+
-
19
IT
EDSEGS
S1A S2A
S2BS1B
CB
1817
7
12 15
14
13
13
8
14
13
5
8
+
-
+
-
5
51
RSCL2 RSCL1
ESCL
6
8
17
18
RFD15P05, RFD15P05SM, RFP15P05
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER
FAST
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
Rev. H4
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FACT Quiet Series™
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET
STAR*POWER is used under license
VCX™
