General Description
The MAX9406 high-speed, low-skew, quad differential
input to current-mode logic (CML) translator features
high-speed signal conversion of the DisplayPort™(DP)
to High-Definition Multimedia Interface (HDMI™) technol-
ogy. This device features ultra-low propagation delay of
350ps and channel-to-channel skew of less than 20ps.
The MAX9406 supports typical data rates of 2Gbps.
The MAX9406 provides the level shift for HDMI’s
Display Data Channel (DDC) and hot-plug detection
(HPD), which converts the 5V single-ended logic to
3.3V single-ended logic.
The MAX9406 operates from a 3V to 3.6V core supply
and is specified over the -40°C to +85°C extended tem-
perature range. This device is available in 48-pin, 7mm
x 7mm thin QFN and 32-pin, 5mm x 5mm thin QFN
packages.
Applications
Level Conversion for DP to HDMI
Data and Clock Driver and Buffer
Backplane Data and Clock Distribution
Base Stations
ATE
Features
o500mV Differential HDMI Output at 2Gbps Data Rate
o350ps Propagation Delay
o20ps Channel-to-Channel Skew at 2Gbps
oLow Jitters: DJ = 11psP-P and RJ = 0.5psRMS
oBidirectional Level Shifter of 5V to 3.3V for DDC
Pins
oLevel Shifter of 5V to 3.3V for I/Os
oIntegrated 50ΩInput Terminations and Biasing
o-40°C to +85°C Operating Temperature Range
MAX9406
DisplayPort to DVI™/HDMI Level Shifter
________________________________________________________________
Maxim Integrated Products
1
Pin Configurations
Ordering Information
TOP VIEW
MAX9406
48 TQFN-EP
7mm × 7mm
13
14
15
16
17
18
19
20
21
22
23
24
OUT_D4+
*EP EXPOSED PADDLE. CONNECT EP TO GND.
OUT_D4-
VCC
OUT_D3+
EP*
+
OUT_D3-
GND
OUT_D2+
OUT_D2-
VCC
OUT_D1+
OUT_D1-
GND
48
47
46
45
44
43
42
41
40
39
38
37
12345678910
11 12
IN_D4+
IN_D4-
VCC
IN_D3+
IN_D3-
GND
IN_D2+
IN_D2-
VCC
IN_D1+
IN_D1-
GND
GND
VCC
N.C.
SCL_SRC
SDA_SRC
HPD_SRC
N.C.
GND
N.C.
N.C.
VCC
GND
36 35 34 33 32 31 30 29 28 27 26 25
OE
VCC
GND
SCL_SNK
SDA_SNK
HPD_SNK
GND
DDC_EN
VCC
N.C.
N.C.
GND
19-1024; Rev 0; 10/07
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
+
Denotes a lead-free package.
*
EP = Exposed paddle.
EVALUATION KIT
AVAILABLE
DVI is a trademark of Digital Display Working Group (DDWG).
DisplayPort is a trademark of Video Electronics Standards
Association (VESA).
HDMI is a trademark of HDMI Licensing, LLC.
PART TEMP RANGE PIN-PACKAGE PKG
CODE
MAX9406ETJ+ -40°C to +85°C
32 Thi n QFN - E P *
(5mm x 5mm x
0.8mm)
T3255-4
M AX 9406E TM + -40°C to +85°C
48 Thi n QFN - E P *
(7mm x 7mm x
0.8mm)
T4877-6
MAX9406
32 TQFN-EP
5mm × 5mm
TOP VIEW
29
30
28
27
12
11
13
14
12 4567
2324 22 20 19 18
3
21
31 10
32 9
26 15
25 16
8
17
EP*
+
*EP EXPOSED PADDLE. CONNECT EP TO GND.
OUT_D4+
OUT_D4-
OUT_D3+
OUT_D3-
OUT_D2+
OUT_D2-
OUT_D1+
OUT_D1-
GND
VCC
SCL_SRC
SDA_SRC
HPD_SRC
GND
VCC
GND
IN_D4+
IN_D4-
IN_D3+
IN_D3-
IN_D2+
IN_D2-
IN_D1+
IN_D1-
OE
GND
SCL_SNK
SDA_SNK
HPD_SNK
GND
DDC_EN
VCC
MAX9406
DisplayPort to DVI™/HDMI Level Shifter
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(VCC = 3V to 3.6V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC = 3.3V, TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCC to GND..............................................................-0.3V to +4V
All Pins to GND...........................................-0.3V to (VCC + 0.3V)
Short-Circuit Duration (all outputs).............................Continuous
Continuous Power Dissipation (TA= +70°C)
32-Pin Thin QFN (derate 21.3mW/°C above +70°C) .1702mW
48-Pin Thin QFN (derate 27.8mW/°C above +70°C) .2222mW
Junction-to-Case Thermal Resistance (θJC) (Note 1)
32-Pin Thin QFN........................................................+1.7°C/W
48-Pin Thin QFN........................................................+0.8°C/W
Junction-to-Ambient Thermal Resistance (θJA) (Note 1)
32-Pin Thin QFN.........................................................+29°C/W
48-Pin Thin QFN.........................................................+25°C/W
Operating Temperature Range ..…………………-40°C to +85°C
Junction Temperature ………………………………………+150°C
Storage Temperature Range ……………………-65°C to +150°C
ESD Protection
Human Body Model (RD= 1.5kΩ, CS= 100pF)
IN_D_ and OUT_D_ to GND..........................................±1.5kV
Lead Temperature (soldering, 10s).………………………+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
OE INPUT
Input High Level VIH1 2.4 V
Input Low Level VIL1 0.5 V
Input Current IIN-EN VIN = 0 to VCC 24 µA
DDC_EN INPUT
Input High Level VIH1 2.4 V
Input Low Level VIL1 0.5 V
Input Current IIN-DDC VIN = 0 to VCC 100 µA
HPD INPUT AND OUTPUT
Input High Level VIH2 2.4 5.3 V
Input Low Level VIL2 0.8 V
Input Current IIN2 VIN = 0 to VCC 80 µA
HPD_SNK Pulldown Resistance RHPD 40 60 kΩ
Output High Level VOH-HPDB 2.5 VCC V
Output Low Level VOL-HPDB 0 0.18 0.4 V
DIFFERENTIAL INPUTS (IN_)
Differential Input High Threshold VIDH VID = VIN+ - VIN- 50 mV
Differential Input Low Threshold VIDL VID = VIN+ - VIN- -50 mV
Common Input Voltage VCOM VCOD = DC Avg [(VIN+ + VIN-) / 2] 0 1.43 2 V
Common-Mode AC Tolerance V
C M _A C _P - P VCM_AC_P-P = (VIN+ + VIN-) / 2 - VCOD 100 mV
Differential Input Termination RIN 40 60 Ω
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a 4-layer board.
For detailed information on package thermal considerations, refer to
Application Note 4083
at www.maxim-ic.com/thermal-tutorial.
MAX9406
DisplayPort to DVI™/HDMI Level Shifter
_______________________________________________________________________________________ 3
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC = 3V to 3.6V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC = 3.3V, TA= +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DIFFERENTIAL OUTPUTS (OUT_)
Single-Ended Output Swing VOSW With a 50Ω load to VCC at both pins 450 600 mV
Single-Ended Output High VOH3 With a 50Ω load to VCC at both pins VCC -
10mV
VCC +
10mV mV
Single-Ended Output Low VOL3 With a 50Ω load to VCC at both pins VCC -
600mV
VCC -
400mV V
Single-Ended Output Current in
High-Z IOFF -10 +10 µA
Output Short-Circuit Current IOS Output pins connected to VCC or GND -20 +20 mA
POWER CONSUMPTION
ICC Includes 4 channels CML termination
supply current, OE = 0 77 90
Supply Current
IPD OE = 1 5
mA
AC ELECTRICAL CHARACTERISTICS
(VCC = 3V to 3.6V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC = 3.3V, TA= +25°C.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DIFFERENTIAL SIGNAL
Maximum Data Rate rD1.85 Gbps
Differential Propagation Delay tPD 350 500 ps
Channel-to-Channel Skew tSK 20 50 ps
Output Rise/Fall Time tR/F 180 515 ps
Added Random Jitter tRJ 1GHz clock input 0.5 1 ps
RMS
Added Deterministic Jitter tDJ rD = 2Gbps, 223 - 1 PRBS pattern 11 30 ps
P
-
P
SINGLE-ENDED SIGNAL
CLK Frequency fSCK Supports I2C fast mode 400 kHz
HPD_SRC Rise/Fall Time tRF-HPDB 120ns
HPD Propagation Delay tHPD 200 ns
Note 2: AC parameters are guaranteed by design and characterization.
Typical Operating Characteristics
(VCC = 3.3V, outputs terminated with 50Ω, TA= +25°C, unless otherwise noted.)
MAX9406
DisplayPort to DVI™/HDMI Level Shifter
4 _______________________________________________________________________________________
79
81
80
83
82
84
85
3.0 3.2 3.4 3.6
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX9406 toc01
VCC (V)
ICC (mA)
+85°C
+25°C
-40°C
200ps/div
50mV/div
EYE DIAGRAM
MAX9406 toc02
1.65Gbps PRBS
MAX9406
DisplayPort to DVI™/HDMI Level Shifter
_______________________________________________________________________________________ 5
Pin Description
PIN
32-PIN
TQFN
48-PIN
TQFN
NAME FUNCTION
1, 3, 8, 18,
22
1, 5, 12, 18,
24, 27, 31,
36, 37,43
GND Ground
2, 7, 24
2, 11, 15,
21, 26, 33,
40, 46
VCC Power-Supply Input. Bypass VCC to GND with 0.1µF and 0.01µF capacitors as close to
the supply pins as possible.
—3, 4, 6, 10,
34, 35 N.C. No Connection. Not internally connected; leave unconnected.
4 7 HPD_SRC Hot-Plug Detection at 3.3V Logic
5 8 SDA_SRC Serial Data Line. I2C data line at 3.3V logic.
6 9 SCL_SRC Serial Clock Line. I2C clock line at 3.3V logic.
9 13 OUT_D4+ Differential Output Port 4+
10 14 OUT_D4- Differential Output Port 4-
11 16 OUT_D3+ Differential Output Port 3+
12 17 OUT_D3- Differential Output Port 3-
13 19 OUT_D2+ Differential Output Port 2+
14 20 OUT_D2- Differential Output Port 2-
15 22 OUT_D1+ Differential Output Port 1+
16 23 OUT_D1- Differential Output Port 1-
17 25 OE Output Enable. Drive OE low to enable the outputs. Drive OE high to disable the outputs.
19 28 SCL_SNK Serial Clock Line. I2C clock line at 5V logic.
20 29 SDA_SNK Serial Data Line. I2C data line at 5V logic.
21 30 HPD_SNK Hot-Plug Detection at +5V Logic
23 32 DDC_EN DDC Link Enable
25 38 IN_D1- Differential Input Port 1-
26 39 IN_D1+ Differential Input Port 1+
27 41 IN_D2- Differential Input Port 2-
28 42 IN_D2+ Differential Input Port 2+
29 44 IN_D3- Differential Input Port 3-
30 45 IN_D3+ Differential Input Port 3+
31 47 IN_D4- Differential Input Port 4-
32 48 IN_D4+ Differential Input Port 4+
— — EP Exposed Paddle. Connect EP to ground.
MAX9406
DisplayPort to DVI™/HDMI Level Shifter
6 _______________________________________________________________________________________
Detailed Description
The MAX9406 high-speed, low-skew, quad differential
input to CML translator is designed for high-speed sig-
nal conversion of the DP to HDMI technology. This
device features ultra-low propagation delay of 350ps
and channel-to-channel skew of less than 20ps. The
MAX9406 supports typical data rates of 2Gbps.
The MAX9406 provides the level shift for HDMI’s DDC
and HPD, which converts the 5V single-ended logic to
3.3V single-ended logic.
High-Speed Signal Enables
OE controls the power through the entire length of the
four high-speed signal paths. Setting OE low enables
all of the high-speed signal paths. Setting OE high dis-
ables all high-speed links and disconnects the internal
biasing supply and brings the device to the low-power
state. In the low-power state, however, the DDC and
HPD ports are still functioning.
Display Data Channel (DDC)
The MAX9406 allows the translation between 5V and 3V
of the lower speed DDC lines. Whenever one side is
pulled to GND, the other side follows and vice versa.
DDC_EN controls the gating to the DDC link. Setting
DDC_EN high enables data to pass through the DDC,
while setting DDC_EN low disables the DDC link.
Hot-Plug Detection (HPD)
The MAX9406 translates the HPD 5V logic into 3V logic.
Applications Information
DVI/HDMI Driver
The MAX9406 can be used as the driver for the HDMI
signal on the motherboard. The MAX9406 CML output
provides a > 400mV differential HDMI output and sup-
ports 3.3V pullup at the differential outputs. The level
shifter boosts the differential signal from the graphics
chip to the HDMI connector, located on the edge of the
motherboard.
High-Speed Signal Line Enable/Disable
The MAX9406 allows use of the DDC lines independent
of the state of the high-speed signal lines and the OE
pin. This allows communication through DDC without
any high-speed signals.
Output Termination
Terminate CML outputs through 50Ωto VCC or use an
equivalent Thevinin termination. Terminate both outputs
and use identical terminations on each for the lowest
output-to-output skew.
Power-Supply Bypassing
Adequate power-supply bypassing is necessary to
maximize the performance and noise immunity. Bypass
VCC to GND with high-frequency surface-mount 0.01µF
ceramic capacitors as close to the device as possible.
Use multiple bypass vias for connection to minimize
inductance.
Functional Diagram
MAX9406
IN_D1-
IN_D1+
OUT_D1-
OUT_D1+
VT
50Ω
x2
IN_D2-
IN_D2+
OUT_D2-
OUT_D2+
VT
50Ω
x2
IN_D3-
IN_D3+
OUT_D3-
OUT_D3+
VT
50Ω
x2
IN_D4-
IN_D4+
OUT_D4-
OUT_D4+
SDA_SRC
SCK_SRC
SDA_SNK
SCK_SNK
VT
50Ω
x2
DDC LEVEL SHIFTER
HPD BUFFER
HPD_SRC HPD_SNK
60kΩ
VCC GND OE DDC_EN
MAX9406
DisplayPort to DVI™/HDMI Level Shifter
_______________________________________________________________________________________ 7
Printed-Circuit Board (PCB) Traces
Input and output trace characteristics affect the perfor-
mance of the MAX9406. Connect each of the inputs
and outputs to a 50Ωcharacteristic impedance trace.
Avoid discontinuities in differential impedance and
maximize common-mode noise immunity by maintain-
ing the distance between differential traces, avoiding
sharp corners. Minimize the number of vias to prevent
impedance discontinuities. Reduce reflections by main-
taining the 50Ωcharacteristic impedance through con-
nectors and across cables. Minimize skew by matching
the electrical length of the traces.
Exposed Paddle
The thin QFN packages used for the MAX9406 have
exposed paddles on the bottom. Connect the exposed
paddle to ground using a landing pad large enough to
accommodate the entire exposed paddle. Add vias
from the exposed paddle's land area to a copper poly-
gon on the other side of the PCB to provide lower ther-
mal impedance from the MAX9406 to the ambient air.
Chip Information
PROCESS: BiPolar
MAX9406
DisplayPort to DVI™/HDMI Level Shifter
8 _______________________________________________________________________________________
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
32, 44, 48L QFN.EPS
MAX9406
DisplayPort to DVI™/HDMI Level Shifter
_______________________________________________________________________________________ 9
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
MAX9406
DisplayPort to DVI™/HDMI Level Shifter
10 ______________________________________________________________________________________
QFN THIN.EPS
MAX9406
DisplayPort to DVI™/HDMI Level Shifter
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________
11
© 2007 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
