HCF4094 8-stage shift and store bus register with 3-stage outputs Datasheet - production data Applications Automotive Industrial SO-16 Computer Consumer Features 3- state parallel outputs for connection to common bus Separate serial outputs synchronous to both positive and negative clock edges for cascading Medium speed operation 5 MHz at 10 V Quiescent current specified up to 20 V Standardized symmetrical output characteristics 5 V, 10 V, and 15 V parametric ratings Input leakage current II = 100 nA (max.) at VDD = 18 V, TA = 25 C 100% tested for quiescent current ESD performance - HBM: 1 kV - MM: 200 V - CDM: 1 kV Description The HCF4094 is a monolithic integrated circuit fabricated in metal oxide semiconductor technology available in an SO-16 package. The HCF4094 is an 8-stage, serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs. The parallel outputs may be connected directly to common bus lines. Data are shifted on positive clock transition. The data in each shift register stage are transferred to the storage register when the STROBE input is high. Data in the storage register appear at the outputs whenever the OUTPUT-ENABLE signal is high. Two serial outputs are available for cascading a number of HCF4094 devices. Data are available at the QS serial output terminal on positive clock edges to allow for high speed operation in a cascaded system in which the clock rise time is fast. The same serial information, available at the Q'S terminal on the next negative clock edge, provides a means for cascading HCF4094 devices when the clock rise time is slow. Table 1. Device summary table Order code Temperature range Package HCF4094M013TR -55 C to +125 C SO-16 HCF4094YM013TR(1) -40 C to +125 C SO-16 (automotive grade)(1) Packing Marking HCF4094 Tape & reel HCF4094Y 1. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 and Q002 or equivalent. January 2014 This is information on a product in full production. DocID002069 Rev 5 1/17 www.st.com Contents HCF4094 Contents 1 Pin information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/17 DocID002069 Rev 5 HCF4094 1 Pin information Pin information Figure 1. Pin connections (top view) 6752%( 9'' '$7$ 287387(1$%/( &/2&. 4 4 4 4 4 4 4 4 9 66 46 46 *$06&% Table 2. Pin description Pin no Symbol Name and function 2 DATA Data input 1 STROBE Strobe input 3 CLOCK Clock input 9, 10 QS, Q'S Serial outputs 4, 5, 6, 7, 14, 13, 12, 11 Q1 to Q8 Parallel outputs 15 OUTPUT ENABLE Output enable input 8 VSS Negative supply voltage 16 VDD Positive supply voltage DocID002069 Rev 5 3/17 17 Functional description 2 HCF4094 Functional description Figure 2. Logic diagram &/ 6(5,$/,1 ' 4 ' &/ &/ &/ Q &/ &/ S Q 4 S Q 4 6(5,$/ 287 &/ 75 75 75 75 S Q 75 6752%( S 4 &/ &/ &/ &/ &/ &/2&. ' 4 75 75 67$*(6 /$7&+ 75 75 4 6(5,$/ 287 /$7&+ 75 287387 (1$%/( 9'' 67$7( 67$7( Q S 966 67$7( 9'' 966 $OOXQSXWVSURWHFWHGE\ &26026SURWHFWLRQ QHWZRUN 4 4 4 4 4 4 4 4 *$06&% Table 3. Truth table Clock Parallel outputs Output enable Strobe L X(2) L (2) X Data Serial outputs Q1 Qn QS(1) Q'S X(2) OC(3) OC(3) Q7 No change X(2) OC(3) OC(3) No change Q7 Q7 No change X (2) No change No change H L H H L L Qn-1 Q7 No change H H H H Qn-1 Q7 No change H H H No change No change No change Q7 1. At the positive clock edge, information on the 7th shift register stage is transferred to the 8th register stage and the QS output. 2. Don't care 3. Open circuit 4/17 DocID002069 Rev 5 HCF4094 Functional description Figure 3. Functional diagram '$7$ 4 6 VWDJHVKLIW UHJLVWHU &/2&. 6752%( 287387(1$%/( 6(5,$/2873876 4 6 ELWVWRUDJH UHJLVWHU VWDWH RXWSXWV 9'' 966 3$5$//(/287387644 SLQVUHVSHFWLYHO\ *$06&% Figure 4. Input equivalent circuit 9'' ,1387 966 *$06&% DocID002069 Rev 5 5/17 17 Functional description HCF4094 Figure 5. Timing chart &/2&. '$7$,1 6752%( 287387 (1$%/( ,17(51$/4 67$7( 67$7( 67$7( 67$7( 2873874 ,17(51$/4 2873874 6(5,$/ 28738746 6(5,$/ 28738746 *$06&% 6/17 DocID002069 Rev 5 HCF4094 3 Electrical characteristics Electrical characteristics Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltage values are referred to VSS pin voltage. Table 4. Absolute maximum ratings (AMR) Symbol Parameter Value VDD Supply voltage -0.5 to +22 VI DC input voltage -0.5 to VDD + 0.5 II DC input current 10 Power dissipation per package 500(1) Power dissipation per output transistor 100 Top Operating temperature -55 to +125 Tstg Storage temperature -65 to +150 PD Unit V mA mW C 1. 500 mW at 65 C; lower to 300 mW by 10 mW/C from 65 C to 85 C. Table 5. Recommended operating conditions Symbol Parameter Value VDD Supply voltage 3 to 20 VI Input voltage 0 to VDD Top Operating temperature -55 to 125 DocID002069 Rev 5 Unit V C 7/17 17 Electrical characteristics HCF4094 Table 6. DC specifications(1) Test condition Value TA = 25 C Sym. Parameter VI (V) IL VOH VOL VIH VIL IOH IOL Quiescent current High-level output voltage Low-level output voltage II Input leakage current IOH, IOL 3-state output leakage current CI Input capacitance Min. Typ. Max. -40 to 85 C -55 to 125 C Unit Min. Min. Max. 5 0/10 10 0/15 15 0/20 20 0/5 5 4.95 4.95 4.95 10 9.95 9.95 9.95 0/15 15 14.95 14.95 14.95 5/0 5 0/10 <1 10/0 <1 15/0 0.04 0.08 10 Max. 5 150 150 10 300 300 20 600 600 100 3000 3000 0.05 0.05 V 5 3.5 3.5 3.5 10 7 7 7 1.5/13.5 15 11 11 11 4.5/0.5 5 1.5 1.5 1.5 10 3 3 3 15 4 4 4 1/9 9/1 <1 <1 13.5/1.5 2.5 0/5 4.6 -1.36 -3.2 -1.1 -1.1 -0.44 -1 -0.36 -0.36 10 -1.1 -2.6 -0.9 -0.9 5 <1 0/10 9.5 0/15 13.5 15 -3.0 -6.8 -2.4 -2.4 0/5 0.4 5 0.44 1 0.36 0.36 0/10 0.5 10 1.1 2.6 0.9 0.9 0/15 1.5 15 3.0 6.8 2.4 2.4 0/18 <1 Any input 18 10-5 0.1 1 mA 1 A 0/18 18 10-4 0.4 Any input 5 12 12 7.5 1. The noise margin for both level "1" and "0" is: 1 V min. with VDD = 5 V, 2 V min. with VDD = 10 V, and 2.5 V min. with VDD = 15 V. 8/17 A 0.05 15 0.5/4.5 Low-level input voltage Output sink current |IO| (A) VDD(V) 0/5 High-level input voltage Output drive current VO (V) DocID002069 Rev 5 pF HCF4094 Electrical characteristics Table 7. Dynamic electrical characteristics (Tamb = 25 C, CL = 50 pF, RL = 200 k, tr = tf = 20 ns) Value(1) Test condition Symbol Parameter Unit VDD (V) Propagation delay time (clock to serial output QS) Propagation delay time (clock to serial output Q'S) tPLH, tPHL Propagation delay time (clock to parallel output) Propagation delay time (strobe to parallel output) Propagation delay time (output enable to parallel out: output high to high impedance) tPZL, tPZH Propagation delay time (output enable to parallel out: output low to high impedance) Strobe pulse width tw Clock pulse width ts Data setup time Min. Typ. Max. 5 300 600 10 125 250 15 95 190 5 230 460 10 110 220 15 75 150 5 420 840 10 195 390 15 135 270 5 290 580 10 145 290 15 100 200 5 140 280 10 75 150 15 55 110 5 225 450 10 95 190 15 70 140 5 200 100 10 80 40 15 70 35 5 200 100 10 100 50 15 83 40 5 125 60 10 55 30 15 35 20 0 0 0 5 100 200 10 50 100 15 45 80 ns 5 th Minimum hold time 10 15 tTLH, tTHL Transition time DocID002069 Rev 5 9/17 17 Electrical characteristics HCF4094 Table 7. Dynamic electrical characteristics (Tamb = 25 C, CL = 50 pF, RL = 200 k, tr = tf = 20 ns) (continued) Value(1) Test condition Symbol tr, tf fmax Parameter Unit VDD (V) Min. 5 15 10 5 15 5 5 1.25 2.5 10 2.5 5 15 3 6 Clock input rise or fall time Maximum clock input frequency Typ. Max. s MHz 1. The typical temperature coefficient for all VDD values is 0.3 %/C. Figure 6. Typical application (remote control holding register) 'LJLWDOO\FRQWUROOHG HTXLSPHQW UHTXLUHVFRQWLQXRXV GLJLWDOFRQWURO ' +&&+&) 6WUREH 46 &ORFN 'LJLWDOO\FRQWUROOHG HTXLSPHQW ' +&&+&) 6WUREH 46 &ORFN 'LJLWDOO\FRQWUROOHG HTXLSPHQW ' +&&+&) 6WUREH &ORFN &RQWURO DQGV\QF FLUFXLWU\ 'DWD &ORFN IURPUHPRWHFRQWUROSDQHO 10/17 *$06&% DocID002069 Rev 5 HCF4094 Electrical characteristics Figure 7. Test circuit 9&& 3XOVH JHQHUDWRU 9&& 23(1 *1' 5 '87 &/ 57 *$06&% 1. Legend: CL = 50 pF or equivalent (includes jig and probe capacitance), RL = 200 KRT = ZOUT of pulse generator (typically 50 ) Table 8. Propagation delay time configuration Test Switch tPLH, tPHL Open tPZL, tPZH VCC tPZH, tPHZ GND Figure 8. Waveform 1: Data in to Qn timings (50 % clock duty cycle) QV QV 9'' &/2&. WV 966 WZ WK WZ 9'' '$7$ ,1 W3/+ 966 W3+/ 92+ 92/ 4Q W3/+ W3+/ 92+ 4V 92/ *$06&% DocID002069 Rev 5 11/17 17 Electrical characteristics HCF4094 Figure 9. Waveform 2: Setup and hold times (SI to CLOCK) (f = 1 MHz; 50 % duty cycle) 9'' '$7$,1 966 WV WK 9'' 966 &/2&. WZ 92+ 92/ 6752%( W3/+ W3+/ 92+ 4Q 92/ *$06&% Figure 10. Waveform 3: Setup and hold time (PI to P/S) (f = 1 MHz; 50 % duty cycle) 9'' 287387(1$%/( 966 4Q 92+ 92/ W3/= W3=/ 92+ 92/ 4Q W3=+ W3+= *$06&% 12/17 DocID002069 Rev 5 HCF4094 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. DocID002069 Rev 5 13/17 17 Package information HCF4094 Figure 11. SO-16 package mechanical drawing * / F & $ D E 6 H D E H ( ' 0 ) *$06&% Table 9. SO-16 package mechanical data Dimensions Ref Millimeters Min. Typ. A a1 Max. Min. Typ. 1.75 0.1 0.2 a2 14/17 Inches Max. 0.068 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45 45 D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M 0.62 0.024 S 8 8 DocID002069 Rev 5 HCF4094 Package information Figure 12. SO-16 tape and reel information 1 & ' $ 7 3R %R 3 $R .R *$06&% 1. Drawing is not to scale. Table 10. SO-16 tape and reel information Dimensions Ref Millimeters Min. A Typ. Inches Max. Min. 330 Max. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 13.2 Typ. 0.504 22.4 0.519 0.882 Ao 6.45 6.65 0.254 0.262 Bo 10.3 10.5 0.406 0.414 Ko 2.1 2.3 0.082 0.090 Po 3.9 4.1 0.153 0.161 P 7.9 8.1 0.311 0.319 DocID002069 Rev 5 15/17 17 Ordering information 5 HCF4094 Ordering information Table 11. Order codes Order code Temperature range Package HCF4094M013TR -55 C to +125 C SO-16 HCF4094YM013TR(1) -40 C to +125 C SO-16 (automotive grade)(1) Packing Marking HCF4094 Tape & reel HCF4094Y 1. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 and Q002 or equivalent 6 Revision history Table 12. Document revision history Date 19-Feb-2013 06-Jan-2014 16/17 Revision Changes 4 Document template and layout updated Removed "B" from part number Updated package names (PDIP-16 and SO-16 instead of DIP-16 and SOP-16). Added Applications Added Device summary table Updated symbol names in Table 7 Added Section 5: Ordering information 5 Removed DIP package option Added ESD performance to Features Updated footnote 1 of Table 1: Device summary table Updated footnote 1 of Table 11: Order codes DocID002069 Rev 5 HCF4094 Please Read Carefully: Information in this document is provided solely in connection with ST products. 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