S-1165 Series
www.sii-ic.com
HIGH RIPPLE-REJECTION LOW DROPOUT
CMOS VOLTAGE REGULATOR
© Seiko Instruments Inc., 2002-2010 Rev.4.0_00
Seiko Instruments Inc. 1
The S-1165 Series is a positive voltage regulator with a low dropout voltage, high output voltage accuracy, and
low current consumption developed based on CMOS technology.
A built-in low on-resistance transistor provides a low dropout voltage and large output current, and a built-in
overcurrent protector prevents the load current from exceeding the current capacitance of the output transistor.
An ON/OFF circuit ensures a long battery life, and a small SOT-23-5 package realizes high-density mounting.
Features
Output voltage: 1.5 V to 5.5 V, selectable in 0.1 V steps.
High-accuracy output voltage: ±1.0%
Low dropout voltage: 140 mV typ. (3.0 V output product, IOUT = 200 mA)
Low current consumption: During operation: 35 μA typ., 65 μA max.
During shutdown: 0.1 μA typ., 1.0 μA max.
High peak current capability: 200 mA output is possible (at VIN VOUT(S) + 1.0 V)*1
Built-in ON/OFF circuit: Ensures long battery life.
High ripple rejection: 70 dB typ. (at 1.0 kHz)
Built-in overcurrent protector: Overcurrent of output transistor can be restricted.
Lead-free, Sn 100%, halogen-free*2
*1. Attention should be paid to the power dissipation of the package when the output current is large.
*2. Refer to “ Product Name Structure” for details.
Applications
Power supply for battery-powered devices
Power supply for personal communication devices
Power supply for home electric/electronic appliances
Power supply for cellular phones
Package
SOT-23-5
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1165 Series Rev.4.0_00
Seiko Instruments Inc.
2
Block Diagram
VIN
VSS
VOU T
Overcurrent
protector
Reference
voltage circuit
ON/OFF
*1. Parasitic diode
*1
ON/OFF
circuit
+
Figure 1
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.4.0_00 S-1165 Series
Seiko Instruments Inc. 3
Product Name Structure
The product types and output voltage for the S-1165 Series can be selected at the user’s request. Refer
to the “1. Product name” for the meanings of the characters in the product name, “2. Package
regarding the package drawings and “3. Product name list” for the full product names.
1. Product name
S-1165 x xx MC xxx TF x
Output v oltage
15 to 55
(e.g., when the output voltage is 1.5 V, it i s expressed
as 15.
)
Package name ( abbreviat ion)
MC: SOT-23-5
Envi ronmental code
U: Lead-free (Sn 100%), halogen-free
G: Lead-free (for details, pl ease contact our sales office)
Product type*3
A: ON/OFF pin negative l ogic
B: ON/OFF pin positive logic
IC direction in tape specifications*1
Product name ( abbrevi ati on) *2
*
1. Refer to the tape specifications at the end of this book.
*
2. Refer to the “Product name list”.
*
3. Refer to 3. Shutdown pin (ON/OFF pin) in the “Operation”.
2. Package
Drawing Code
Package Name Package Tape Reel
SOT-23-5 MP005-A-P-SD MP005-A-C-SD MP005-A-R-SD
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1165 Series Rev.4.0_00
Seiko Instruments Inc.
4
3. Product name list
Table 1
Output Voltage Product Name
1.5V±1.0% S-1165B15MC-N6ATFx
1.6V±1.0% S-1165B16MC-N6BTFx
1.7V±1.0% S-1165B17MC-N6CTFx
1.8V±1.0% S-1165B18MC-N6DTFx
1.9V±1.0% S-1165B19MC-N6ETFx
2.0V±1.0% S-1165B20MC-N6FTFx
2.1V±1.0% S-1165B21MC-N6GTFx
2.2V±1.0% S-1165B22MC-N6HTFx
2.3V±1.0% S-1165B23MC-N6ITFx
2.4V±1.0% S-1165B24MC-N6JTFx
2.5V±1.0% S-1165B25MC-N6KTFx
2.6V±1.0% S-1165B26MC-N6LTFx
2.7V±1.0% S-1165B27MC-N6MTFx
2.8V±1.0% S-1165B28MC-N6NTFx
2.9V±1.0% S-1165B29MC-N6OTFx
3.0V±1.0% S-1165B30MC-N6PTFx
3.1V±1.0% S-1165B31MC-N6QTFx
3.2V±1.0% S-1165B32MC-N6RTFx
3.3V±1.0% S-1165B33MC-N6STFx
3.4V±1.0% S-1165B34MC-N6TTFx
3.5V±1.0% S-1165B35MC-N6UTFx
3.6V±1.0% S-1165B36MC-N6VTFx
3.7V±1.0% S-1165B37MC-N6WTFx
3.8V±1.0% S-1165B38MC-N6XTFx
3.9V±1.0% S-1165B39MC-N6YTFx
4.0V±1.0% S-1165B40MC-N6ZTFx
4.1V±1.0% S-1165B41MC-N7ATFx
4.2V±1.0% S-1165B42MC-N7BTFx
4.3V±1.0% S-1165B43MC-N7CTFx
4.4V±1.0% S-1165B44MC-N7DTFx
4.5V±1.0% S-1165B45MC-N7ETFx
4.6V±1.0% S-1165B46MC-N7FTFx
4.7V±1.0% S-1165B47MC-N7GTFx
4.8V±1.0% S-1165B48MC-N7HTFx
4.9V±1.0% S-1165B49MC-N7ITFx
5.0V±1.0% S-1165B50MC-N7JTFx
5.1V±1.0% S-1165B51MC-N7KTFx
5.2V±1.0% S-1165B52MC-N7LTFx
5.3V±1.0% S-1165B53MC-N7MTFx
5.4V±1.0% S-1165B54MC-N7NTFx
5.5V±1.0% S-1165B55MC-N7OTFx
Remark 1. Please contact the SII marketing department for type A products.
2. x: G or U
3. Please select products of environmental code = U for Sn 100%,
halogen-free products.
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.4.0_00 S-1165 Series
Seiko Instruments Inc. 5
Pin Configuration
Table 2
Pin No. Symbol Description
1 VIN Input voltage pin
2 VSS GND pin
3 ON/OFF Shutdown pin
4 NC*1 No connection
5 VOUT Output voltage pin
*1. The NC pin is electrically open.
The NC pin can be connected to VIN or VSS.
5 4
1 3 2
SOT-23-5
Top view
Figure 2
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1165 Series Rev.4.0_00
Seiko Instruments Inc.
6
Absolute Maximum Ratings
Table 3 (Ta = 25°C unless otherwise specified)
Item Symbol Absolute Maximum Rating Unit
Input voltage VIN VSS 0.3 to VSS + 7 V
V
ON/OFF VSS 0.3 to VIN + 0.3
Output voltage VOUT VSS 0.3 to VIN + 0.3
300 (When not mounted on board) mW Power dissipation PD 600*1 mW
Operating ambient temperature Topr 40 to +85 °C
Storage temperature Tstg 40 to +125
*1. When mounted on board
[Mounted on board]
(1) Board size : 114.3 mm × 76.2 mm × t1.6 mm
(2) Board name : JEDEC STANDARD51-7
Caution The absolute maximum ratings are rated values exceeding w hich the product could suffer
physical damage. These values must therefore not be exceeded under any conditions.
050 100 150
600
400
0
Pow er Dissi
p
ation
(
PD
)
[
mW
]
Ambi ent Te m
p
erature
(
Ta
)
[
°C
]
200
100
300
500
700
Figure 3 Power Dissipation of Package (When Mounted on Board)
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.4.0_00 S-1165 Series
Seiko Instruments Inc. 7
Electrical Characteristics
Table 4 (Ta = 25°C unless otherwise specified)
Item Symbol Conditions Min. Typ. Max. Unit
Test
Circuit
Output voltage*1 VOUT(E) VIN
=
VOUT(S)
+
1.0 V, IOUT
=
30 mA VOUT(S)
×
0.99 VOUT(S)
VOUT(S)
×
1.01 V 1
Output current*2 IOUT VIN
VOUT(S)
+
1.0 V 200*5
mA 3
Dropout voltage*3 Vdrop IOUT
=
200 mA 1.5 V
VOUT(S)
2.5 V
0.20 0.30 V
2.6 V
VOUT(S)
5.5 V
0.14 0.20
Line regulation
OUTIN OUT1
VVV
ΔΔ
VOUT(S)
+
0.5 V
VIN
6.5 V,
IOUT
=
30 mA
0.05 0.2 % / V
1
Load regulation
Δ
VOUT2 VIN
=
VOUT(S)
+
1.0 V,
1.0 mA
IOUT
200 mA
20 40 mV
Output voltage
temperature coefficient*4
OUT
OUT
VTa
V
ΔΔ
VIN
=
VOUT(S)
+
1.0 V, IOUT
=
30 mA,
40
°
C
Ta
85
°
C
±
100
ppm
/
°
C
Current consumption
during operation ISS1 VIN
=
VOUT(S)
+
1.0 V, ON/OFF pin
=
ON,
no load
35 65
μ
A 2
Current consumption
during shutdown ISS2 VIN
=
VOUT(S)
+
1.0 V, ON/OFF pin
=
OFF,
no load
0.1 1.0
Input voltage VIN
2.0
6.5 V
Shutdown pin
input voltage “H” VSH VIN
=
VOUT(S)
+
1.0 V, RL
=
1.0 k
Ω
1.5
4
Shutdown pin
input voltage “L” VSL VIN
=
VOUT(S)
+
1.0 V, RL
=
1.0 k
Ω
0.3
Shutdown pin
input current “H” ISH VIN
=
6.5 V, VON/OFF
=
6.5 V
0.1
0.1
μ
A
Shutdown pin
input current “L” ISL VIN
=
6.5 V, VON/OFF = 0 V
0.1
0.1
Ripple rejection
RR
VIN
=
VOUT(S)
+
1.0 V, f
=
1.0 kHz,
Δ
Vrip
=
0.5 Vrms, IOUT
=
30 mA
70
dB 5
Short-circuit current Ishort VIN
=
VOUT(S)
+
1.0 V, ON/OFF pin
=
ON,
VOUT
=
0 V
350
mA 3
*1. VOUT(S): Specified output voltage
VOUT(E): Actual output voltage at the fixed load
The output voltage when fixing IOUT(= 30 mA) and inputting VOUT(S) + 1.0 V
*2. The output current at which the output voltage becomes 95% of VOUT(E) after gradually increasing the output
current.
*3. Vdrop = VIN1 (VOUT3 × 0.98)
V
OUT3 is the output voltage when VIN = VOUT(S) + 1.0 V and IOUT = 200 mA.
VIN1 is the input voltage at which the output voltage becomes 98% of VOUT3 after gradually decreasing
the input voltage.
*4. The change in temperature [mV/°C] is calculated using the following equation.
[] [] []
1000Cppm/
VTaV
VVCmV/
Ta
V OUT
OUT
OUT(S)
OUT ÷°
Δ
Δ
×=°
Δ
Δ3*2**1
*1. The change in temperature of the output voltage
*2. Specified output voltage
*3. Output voltage temperature coefficient
*5. The output current can be at least this value.
Due to restrictions on the package power dissipation, this value may not be satisfied. Attention should be
paid to the power dissipation of the package when the output current is large.
This specification is guaranteed by design.
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1165 Series Rev.4.0_00
Seiko Instruments Inc.
8
Test Circuits
1.
VSS
VOUT
ON/OFF
Set to
power ON
VIN
V
A
+
+
Figure 4
2.
VSS
VOUT
ON/OFF
Set to
VIN or GND
VIN
A
Figure 5
3.
Set to
power ON
VSS
VOUT
ON/OFF
VIN
V
A
+
+
Figure 6
4.
VSS
VOUT
ON/OFF
VIN
A
V RL
+ +
Figure 7
5.
VSS
VOUT
ON/OFF
VIN
V
+
Set to
Power ON
RL
Figure 8
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.4.0_00 S-1165 Series
Seiko Instruments Inc. 9
Standard Circuit
ON/OFF
VSS
VOUTVIN
CIN
*1
CL
*2
Input Output
GND
Single GND
*1. CIN is a capacitor for stabilizing the input.
*2. A tantalum capacitor (2.2 μF or more) can be used.
Figure 9
Caution The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
Application Conditions
Input capacitor (CIN): 1.0 μF or more
Output capacitor (CL): 2.2 μF or more (tantalum capacitor)
Caution A general series regulator may oscillate, depending on the external components selected.
Check that no oscillation occurs with the application using the above capacitor.
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1165 Series Rev.4.0_00
Seiko Instruments Inc.
10
Explanation of Terms
1. Low dropout voltage regulator
The low dropout voltage regulator is a voltage regulator whose dropout voltage is low due to its built-in
low on-resistance transistor.
2. Output voltage (VOUT)
The accuracy of the output voltage is ensured at ±1.0% under the specified conditions of fixed input
voltage*1, fixed output current, and fixed temperature.
*1. Differs depending the product.
Caution If the above conditions change, the output voltage value may vary and exceed the
accuracy range of the output voltage. Please see the electrical characteristics and
attached characteristics data for details.
3.
V ΔV
ΔV
regulation Line OUTIN
OUT1
Indicates the dependency of the output voltage on the input voltage. That is, the value shows how much
the output voltage changes due to a change in the input voltage with the output current remaining
unchanged.
4. Load regulation (ΔVOUT2)
Indicates the dependency of the output voltage on the output current. That is, the value shows how
much the output voltage changes due to a change in the output current with the input voltage remaining
unchanged.
5. Dropout voltage (Vdrop)
Indicates the difference between the input voltage VIN1, which is the input voltage (VIN) at the point where
the output voltage has fallen to 98% of the output voltage value VOUT3 after VIN was gradually decreased
from VIN = VOUT(S) + 1.0 V, and the output voltage at that point (VOUT3 × 0.98).
Vdrop = VIN1 (VOUT3 × 0.98)
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.4.0_00 S-1165 Series
Seiko Instruments Inc. 11
6.
Δ
Δ
OUT
OUT
V TaV
voltage output of tcoefficien eTemperatur
The shadowed area in Figure 10 is the range where VOUT varies in the operating temperature range
when the temperature coefficient of the output voltage is ±100 ppm/°C.
VOUT
(
E
)
*
1
Ex. S- 1165B28 Typ.
40 25
+
0.28 mV / °C
VOUT
[V]
*1. VOUT(E) is the value of the output voltage measured at 25 °C.
85 Ta [°C]
0.28 mV / °C
Figure 10
A change in the temperature of the output voltage [mV/°C] is calculated using the following equation.
[] [] []
1000Cppm/
VTaV
VVCmV/
Ta
V OUT
OUT
OUT(S)
OUT ÷°
Δ
Δ
×=°
Δ
Δ3*2*1*
*1. Change in temperature of output voltage
*2. Specified output voltage
*3. Output voltage temperature coefficient
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1165 Series Rev.4.0_00
Seiko Instruments Inc.
12
Operation
1. Basic operation
Figure 11 shows the block diagram of the S-1165 Series.
The error amplifier compares the reference voltage (Vref) with Vfb, which is the output voltage resistance-
divided by feedback resistors Rs and Rf. It supplies the output transistor with the gate voltage necessary
to ensure a certain output voltage free of any fluctuations of input voltage and temperature.
Reference voltage
circuit
VOUT
*1
*1. Parasitic diode
VSS
VIN
Rs
R
f
Error
amplifier
Current
supply
Vref
+
Vfb
Figure 11
2. Output transistor
The S-1165 Series uses a low on-resistance P-channel MOS FET as the output transistor.
Be sure that VOUT does not exceed VIN + 0.3 V to prevent the voltage regulator from being damaged due
to inverse current flowing from VOUT pin through a parasitic diode to VIN pin.
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.4.0_00 S-1165 Series
Seiko Instruments Inc. 13
3. Shutdown pin (ON/OFF pin)
This pin starts and stops the regulator.
When the ON/OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the built-
in P-channel MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially
reduce the current consumption. The VOUT pin becomes the VSS level due to the internally divided
resistance of several hundreds kΩ between the VOUT pin and VSS pin.
The structure of the ON/OFF pin is as shown in Figure 12. Since the ON/OFF pin is neither pulled down
nor pulled up internally, do not use it in the floating state. In addition, note that the current consumption
increases if a voltage of 0.3 V to VIN – 0.3 V is applied to the ON/OFF pin. When the ON/OFF pin is not
used, connect it to the VSS pin if the logic type is “A” and to the VIN pin if it is “B”.
Table 5
Logic Type ON/OFF Pin Internal Circuits VOUT Pin Voltage Current Consumption
A “L”: Power on Operating Set value ISS1
A “H”: Power off Stopped VSS level ISS2
B “L”: Power off Stopped VSS level ISS2
B “H”: Power on Operating Set value ISS1
VSS
ON/OFF
VIN
Figure 12
Selection of Output Capacitor (CL)
The S-1165 Series performs phase compensation using the internal phase compensator in the IC and the ESR
(Equivalent Series Resistance) of the output capacitor to enable stable operation independent of changes in the
output load. Therefore, always place a capacitor (CL) of 2.2 μF or more between VOUT and VSS pins.
For stable operation of the S-1165 Series, it is essential to employ a capacitor whose ESR is within an optimum
range. Using a capacitor whose ESR is outside the optimum range (approximately 0.5 to 5 Ω), whether larger
or smaller, may cause an unstable output, resulting in oscillation. For this reason, a tantalum electrolytic
capacitor is recommended.
When a ceramic capacitor or an OS capacitor with a low ESR is used, it is necessary to connect an additional
resistor that serves as the ESR in series with the output capacitor. The required resistance value is
approximately 0.5 to 5 Ω, which varies depending on the usage conditions, so perform sufficient evaluation for
selection. Ordinarily, around 1.0 Ω is recommended.
Note that an aluminum electrolytic capacitor may increase the ESR at a low temperature, causing oscillation.
When using this kind of capacitor, perform thorough evaluation, including evaluation of temperature
characteristics.
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1165 Series Rev.4.0_00
Seiko Instruments Inc.
14
Precautions
Wiring patterns for the VIN, VOUT and GND pins should be designed so that the impedance is low.
When mounting an output capacitor between the VOUT and VSS pins (CL) and a capacitor for stabilizing
the input between VIN and VSS pins (CIN), the distance from the capacitors to these pins should be as
short as possible.
Note that the output voltage may increase when a series regulator is used at low load current (1.0 mA or
less).
This IC performs phase compensation by using an internal phase compensator and the ESR of an
output capacitor. Therefore, always place a capacitor of 2.2 μF or more between VOUT and VSS pins.
A tantalum type capacitor is recommended. Moreover, to secure stable operation of the S-1165 Series,
it is necessary to employ a capacitor with an ESR within an optimum range (0.5 to 5 Ω). Using a
capacitor whose ESR is outside the optimum range (approximately 0.5 to 5 Ω), whether larger or
smaller, may cause an unstable output, resulting in oscillation. Perform sufficient evaluation under the
actual usage conditions for selection, including evaluation of temperature characteristics.
The voltage regulator may oscillate when the impedance of the power supply is high and the input
capacitor is small or an input capacitor is not connected.
The application conditions for the input voltage, output voltage, and load current should not exceed the
package power dissipation.
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
In determining the output current, attention should be paid to the output current value specified in Table
4 in the electrical characteristics and footnote *5) of the table.
SII claims no responsibility for any disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.4.0_00 S-1165 Series
Seiko Instruments Inc. 15
Typical Characteristics
(1) Output voltage vs. Output current (when load current increases)
S-1165B15 (Ta = 25°C) S-1165B30 (Ta = 25°C)
VOUT [V]
0
0.5
1
1.5
2
2.5
0 200 400 600 800
VIN = 1.8 V 2.5 V
6.0 V
VOUT [V]
0
0.5
1
1.5
2
2.5
3
3.5
4
0 200 400 600 800
VIN = 3.3 V
4.0 V
6.0 V
IOUT [mA]
IOUT [mA]
S-1165B50 (Ta = 25°C)
VOUT [V]
0
1
2
3
4
5
6
0 200 400 600 800
V
IN
= 5.3
V
6.0
V
IOUT [mA]
(2) Output voltage vs. Input voltage
S-1165B15 (Ta = 25°C) S-1165B30 (Ta = 25°C)
VOUT [V]
VOUT [V]
VIN [V]
VIN [V]
S-1165B50 (Ta = 25°C)
VOUT [V]
VIN [V]
Remark In determining the output current, attention
should be paid to the following.
1) The minimum output current value and
footnote *5 in the electrical characteristics
2) The package power dissipation
1 1.5 2 2.5 3 3.5
30 mA
50 mA
IOUT = 1mA
1.6
1.55
1.5
1.45
1.4 2.5 3 3.5 4 4.5 5
3.05
3
2.95
2.9
2.85
2.8
30 mA
50 mA IOUT = 1mA
4.5 5 5.5 6 6.5 7
5.1
5.08
5.06
5.04
5.02
5
4.98
4.96
4.94
4.92 30 mA 50 mA
IOUT = 1mA
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1165 Series Rev.4.0_00
Seiko Instruments Inc.
16
(3) Dropout voltage vs. Output current
S-1165B15 S-1165B30
Vdrop [V]
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0 50 100 150 200 250
25°C
40°C
85°C
Vdrop [V]
IOUT [mA]
IOUT [mA]
S-1165B50
Vdrop [V]
IOUT [mA]
(4) Dropout voltage vs. Set output voltage
Vdrop [mV]
VOTA [V]
0.2
0.18
0.16
0.14
0.12
0.1
0.08
0.06
0.04
0.02
00 50 100 150 200 250
40°C
25°C
85°C
0.16
0.14
0.12
0.1
0.08
0.06
0.04
0.02
0
0 50 100 150 200 250
25°C
40°C
85°C
300
250
200
150
100
50
0
0 1 2 3 4 5 6 7
200 mA
120 mA
50 mA
30 mA
10 mA
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.4.0_00 S-1165 Series
Seiko Instruments Inc. 17
(5) Output voltage vs. Ambient temperature
S-1165B15 S-1165B30
VOUT [V]
VOUT [V]
Ta [°C]
Ta [°C]
S-1165B50
VOUT [V]
5.1
5.08
5.06
5.04
5.02
5
4.98
4.96
4.94
4.92
4.9
-40 -20 0 20 40 60 80 100
Ta [°C]
(6) Current consumption vs. Input voltage
S-1165B15 S-1165B30
ISS1 [μA]
ISS1 [μA]
VIN [V]
VIN [V]
S-1165B50
ISS1 [μA]
VIN [V]
-40 -20 020 40 60 80 100
3.1
3.05
3
2.95
2.9
40
0 2 4 6 8
-40 -20 0 20 40 60 80 100
1.6
1.55
1.5
1.45
1.4
40
35
30
25
20
15
10
5
0 0 2 4 6 8
85°C
40°C
25°C
40°C
35
30
25
20
15
10
5
00 2 4 6 8
85°C
25°C
40
35
30
25
20
15
10
5
0
40°C
85°C
25°C
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1165 Series Rev.4.0_00
Seiko Instruments Inc.
18
(7) Ripple rejection
S-1165B15 (Ta = 25°C) S-1165B30 (Ta = 25°C)
VIN = 2.5 V, COUT = 2.2 μF VIN = 4.0 V, COUT = 2.2 μF
Ripple Rejection [dB]
Ripple Rejection [dB]
Frequency [Hz]
Frequency [Hz]
S-1165B50 (Ta = 25°C)
VIN = 6.0 V, COUT = 2.2 μF
Ripple Rejection [dB]
Frequency [Hz]
100
80
60
40
20
0 10 100 1 k 10 k 100 k 1 M
IOUT = 1 mA
30 mA
50 mA
100
80
60
40
20
010 100 1 k 10 k 100 k 1 M
IOUT = 1 mA
30 mA
50 mA
100
80
60
40
20
0 10 100 1 k 10 k 100 k 1 M
IOUT = 1 mA
30 mA
50 mA
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.4.0_00 S-1165 Series
Seiko Instruments Inc. 19
Reference Data
(1) Input transient response characteristics
IOUT = 30 mA, tr = tf = 5.0 μs, COUT = 2.2 μF, CIN = 0 μF IOUT = 30 mA, tr = tf = 5.0 μs, COUT = 4.7 μF, CIN = 0 μF
VOUT [V]
-10 0 10 20 30 40 50 60 70 80 90
VIN VOUT
VIN [V]
VOUT [V]
-10 0 10 20 30 40 50 60 70 80 90
VIN VOUT
VIN [V]
t [μs] t [μs]
(2) Load transient response characteristics
VIN = 4.0 V, COUT = 2.2 μF, CIN = 1.0 μF,
IOUT = 50100 mA VIN = 4.0 V, COUT = 4.7 μF, CIN = 1.0 μF,
IOUT = 50100 mA
VOUT [V]
-2024681012141618
VOUT
IOUT
IOUT [mA]
VOUT [V]
-2 0 2 4 6 8 10 12 14 16 18
IOUT
VOUT
IOUT [mA]
t [μs] t [μs]
(3) Shutdown pin transient response characteristics
S-1165B15 (Ta = 25°C) S-1165B30 (Ta = 25°C)
VIN = 2.5 V, COUT = 2.2 μF, CIN = 1.0 μF VIN = 4.0 V, COUT = 2.2 μF, CIN = 1.0 μF
VOUT [V]
-10 0 10 20 30 40 50 60 70 80 90
VON/OFF
VOUT
VON/OFF [V]
VOUT [V]
-10 0 10 20 30 40 50 60 70 80 90
VON/OFF
VOUT
VON/OFF [V]
t [μs] t [μs]
S-1165B50 (Ta = 25°C)
VIN = 6.0 V, COUT = 2.2 μF, CIN = 1.0 μF
VOUT [V]
-10 0 10 20 30 40 50 60 70 80 90
VON/OFF
VOUT
VON/OFF [V]
t [μs]
3.1
3.08
3.06
3.04
3.02
3
2.98
6
5
4
3
2
1
0
3.1
3.08
3.06
3.04
3.02
3
2.98
6
5
4
3
2
1
0
3.4
3.3
3.2
3.1
3
2.9
2.8
150
100
50
0
-50
-100
-150
3.4
3.3
3.2
3.1
3
2.9
2.8
150
100
50
0
-50
-100
-150
2.5
2
1.5
1
0.5
0
-0.5
3
2
1
0
-1
-2
-3
5
4
3
2
1
0
-1
6
4
2
0
-2
-4
-6
7
6
5
4
3
2
1
0
-1
8
6
4
2
0
-2
-4
-6
-8
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
2.9±0.2
1.9±0.2
0.95±0.1
0.4±0.1
0.16 +0.1
-0.06
123
4
5
No. MP005-A-P-SD-1.2
MP005-A-P-SD-1.2
SOT235-A-PKG Dimensions
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
ø1.5 +0.1
-0 2.0±0.05
ø1.0 +0.2
-0 4.0±0.1
1.4±0.2
0.25±0.1
3.2±0.2
123
45
No. MP005-A-C-SD-2.1
MP005-A-C-SD-2.1
SOT235-A-Carrier Tape
Feed direction
4.0±0.1(10 pitches:40.0±0.2)
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
12.5max.
9.0±0.3
ø13±0.2
(60°) (60°)
QTY. 3,000
No. MP005-A-R-SD-1.1
MP005-A-R-SD-1.1
SOT235-A-Reel
Enlarged drawing in the central part
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