Preliminary Data Sheet PD60185-C IR1176 SYNCHRONOUS RECTIFIER DRIVER Features * Provides constant and proper gate drive to power * * * * * * MOSFETs regardless of transformer output Minimizes loss due to power MOSFET body drain diode conduction Stand alone operation - no ties to primary side Schmitt trigger input with double pulse suppression allows operation in noisy environments High peak current drive capability - 4A High speed operation - 2MHz Product Summary Vdd 5Vdc IO+/- (peak) 4A/4A Fmax 2MHz Max lead time 500nsec Adaptable to multiple topologies Description The IR1176 is a high speed CMOS controller designed to drive N-channel power MOSFETs used as synchronous rectifiers in high current, high frequency forward converters with output voltages equal or below 5VDC. Schmitt trigger inputs with double pulse suppression allow the controller to operate in noisy environments. The circuit does not require any ties to the primary side and derives its operating power directly from the secondary. The circuit functions by anticipating transformer output transitions, then turns the power MOSFETs on or off before the transitions of the transformer to minimize body drain diode conduction and reduce associated losses. Turn on/off lead time can be adjusted to accommodate a variety of power MOSFET sizes and circuit conditions. The IR1176 also provides gate drive overlap/dead-time control via external components to further minimize diode conduction by nulling effects of secondary loop and device package inductance. Packages IR1176S 20 Lead Surface Mount (SSOP-20) IR1176SS 20 Lead SOIC (MS-013AC) IR1176 20 Lead PDIP (MS-001AD) IR1176 Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. Symbol Definition Min. Vdd Max. Units Supply voltage -- 7 VDC Iin Input clamp current -- +/- 10 mA DC PD Power dissipation (SSOP-20) -- 400 mW (SOIC) -- -- -- (PDIP) -- -- -- (SSOP-20) junction-to-case -- 28.5 (SOIC) junction-to-case -- 20 (PDIP) junction-to-case -- 28.1 (SSOP-20) junction-to-ambient -- 90.5 (SOIC) junction-to-ambient -- 45 (PDIP) junction-to-ambient RthJC RthJA Thermal resistance Thermal resistance -- 62.4 TJ Junction temperature -- 150 TS Storage temperature -55 150 TL Lead temperature (soldering, 10 seconds) -- 300 C/W C Recommended Operating Conditions Symbol Vdd Definition Max. Units -- 5 -- Ambient temperature -40 -- 85 C Freq Operating frequency 250 -- 500 KHz VDC 34.0 -- K 1.75 -- 2.25 VDC Maximum voltage at X1 and X2 inputs -- -- 5.6 VDC Capacitance at pins DTIN1 and DTIN2 -- -- 100 pF Required bias resistor (+/- 1%) UV Voltage at UVSET pin Xin Cd1/Cd2 2 Typ. TA Rbias Supply voltage operating range Min. -- www.irf.com IR1176 Dynamic Electrical Characteristics Vdd=5V, TA = 25 o C, Rbias = 34.0K unless otherwise specified. Symbol Definition Vdd Supply voltage operating range Iqdd Vdd quiescent current (x1 = x2 = 0V or 5V, Iout = 0) Freq Operating frequency UVSET+ UVSET positive going threshold UVSET- UVSET negative going threshold Vxth+ X1/X2 Input positive going threshold Min. Typ. Max. Units 4.0 -- 5.25 -- 4 5 A 100 -- 2000 KHz 1.10 -- 1.4 V 0.8 -- 1.1 V -- 1.4 -- VDC VDC Vxth- X1/X2 Input negative going threshold -- 1.0 -- VDC Tadv Externally adjustable lead time (advance) -- -- 500 nsec Externally adjustable dead-time for Q1 and Q2 20 -- -- nsec Q1,Q2 output sink current (Vdd=5.0V, -- 4 -- -- 4 -- Td Isink (peak) pulsed, 10 usec) Isource Q1,Q2 output source current (Vdd=5.0V, (peak) A pulsed, 10 usec) VOH Q1, Q2 High level voltage (Iout = 20mA) -- Vdd- 0.20 -- VOL Q1, Q2 Low level voltage (Iout = 20mA) -- 0.10 -- Input to output delay (PLL bypassed, cross coupled -- 20 -- nsec tio V mode) tr Gate turn-on rise time (C1=1000pf, Vdd=5V) -- 20 -- nsec tf Gate turn-off fall time (C1=1000pf, Vdd=5V) -- 20 -- nsec Cross-over voltage (Vdd=5Vdc, DTIN shorted to -- 2.5 -- VDC -- 34.0 -- K -- 1.25 -- VDC -20 -- 20 nsec A DC Vtr DTOUT, C1=1000pf) Fig. 3 Rbias Required bias resistor (1%) Vbias Voltage at Rbias pin Tjitter Phase-lock loop output jitter Ichgpump Charge pump output current (at VFLTR pin) -- 50 -- Vchgpump Charge pump output voltage (at VFLTR pin) 1.3 1.5 1.7 VDC Kvco_dc PLL Vco DC gain (per design) -- 62 -- KHz/ Volt www.irf.com 3 IR1176 Lead Definitions and Assignments Symbol Description AVDD Power - + 5 VDC to MOSFET drivers Q1 Output - gate drive for Q1 power MOSFET DTOUT1 Output - sets dead time for Q1 output - used with DTIN1 DTIN1 Input - sets dead time for Q1 - used with DTOUT1 RADV1 Output - sets lead time (advance) for Q1 VFLTR1 Output - PLL loop filter for Q1 output RVCO1 Output - sets PLL center frequency for Q1 output X1 Input - transformer input for Q1 VDD Power - +5 Vdc for internal logic UVSET Input - sets UVLO+ If this pin is pulled below 1.25VDC externally, then both Q1 and Q2 outputs will be at Vss (disabled) RBIAS Output - connected to 34.0K +/- 1% resistor - sets operating current AVSS Ground for MOSFET driver supply (VDD) X2 Input - transformer input for Q2 RVCO2 Output - sets PLL center frequency for Q2 output VFLTR2 Output - PLL loop filter for Q2 RADV2 Output - sets lead time (advance) for Q2 DTIN2 Input - sets dead time for Q2 - used with DTOUT2 DTOUT2 Output - sets dead time for Q2 - used with DTIN2 VSS Ground for logic supply (AVDD) Q2 Output - gate drive for Q2 power MOSFET 1 *VDD 2 Q1 3 DTOUT2 4 DTIN2 5 RADV1 6 VFLTRI 7 RVCO1 8 X1 9 AVDD 10UVSET 4 Q2 VSS DTOUT1 DTIN1 RADV2 VFLTR2 RVCO2 X2 AVSS RBIAS 20 19 18 17 16 15 14 13 12 11 1 *VDD 2 Q1 3 DTOUT2 4 DTIN2 5 RADV1 6 VFLTRI 7 RVCO1 8 X1 9 AVDD 10UVSET Q2 VSS DTOUT1 DTIN1 RADV2 VFLTR2 RVCO2 X2 AVSS RBIAS 20 19 18 17 16 15 14 13 12 11 1 *VDD 2 Q1 3 DTOUT2 4 DTIN2 5 RADV1 6 VFLTRI 7 RVCO1 8 X1 9 AVDD 10UVSET 20 19 DTOUT1 18 DTIN1 17 RADV2 16 VFLTR2 15 RVCO2 14 X2 13 AVSS 12 RBIAS 11 Q2 VSS IR1176S IR1176SS IR1176 (SSOP-20) SOIC (wide body) PDIP www.irf.com IR1176 Fig. 1 Typical application circuit when supply Vout < 5.0 VDC Fig. 2 Typical application circuit when supply Vout = 5.0 VDC www.irf.com 5 IR1176 Fig. 3 Gate drive characteristics and definitions Phase Lock Loop Design Equations: 1 - Resistor to set VCO Ceter Frequency: Rvco (K) = [1E2 x Vchgpump(VDC) / fvco(KHz)] x Kvco _ dc(KHz/Volt) Example (A): Choose Vchgpump = 1.5V, desired frequency (fvco) = 300KHz Rvco = [1E2 x 1.5 /300] x 62 Hz = 31 K 2 - Small Signal gain for VCO: Kvco_ac (KHz/Volt) = 1E2 x Kvco_dc (KHz/Volt)/Rvco(K) Example (B): Choosing same conditions as in example A: Kvco_ac = 1E2 x 62 / 31 = 200 KHz/volt 6 www.irf.com IR1176 3 -PLL Naturalfrequency: n =2 fn(KHz)= Ichpump(uA) x Kvco_ac(KHz/V) / C(nF) Choose Cfsuchthat Cf=C/16 4 -PLL Damping factorcalculations: P = E-3 x Rf (KOhms) x C(nF) x fn(KHz) TypicalvalueforPis0.707.(Criticallydamped) 5 -Advance tim ing: Tadv(nsec) = RADV (KOhms)*10 + - 10 6 W here RADV isresistancefrom RADV1 orRADV2 to ground. Example C:RADV=10Kohms willresultin Tadv=10*10=90 nsec . +10 6=106 nsec. 6-Dead time calculations: Td(nsec)=0.69*Cdt(pF)*(Rdt(K)+0.15) Vdd=5V) Td(nsec)=0.69*Rdt(KOhms)*Cdt(pF) + 5 (For(For Vdd=5 V) W here Rdt is resistance between pins DTIN1 and DTOUT1 or DTIN2 and DTOUT2.Cdtiscapacitancefrom DTIN1 or DTIN2 to ground. Example D: Rd=2KW and Cdt=100pF will result in Td=148.35nsec. Fig. 4 PLL loop filter component definitions www.irf.com 7 IR1176 IR1176 Fig. 5 IR1176 Block Diagram 8 www.irf.com IR1176 500 500 400 400 time time 300 300 200 200 100 100 0 T_DT (ns)@R=1K T_DT (ns)@R=5K T_DT (ns)@R=10K 0 0 2K 4K 6K 8K 10K -60 -30 resistance 0 30 60 90 120 temperature o Response at 25 C T_DT vs R_DT, C = 100pF Temperature Response T_DT vs R_DT, C = 100pF 500 400 400 300 300 T_ADV T_ADV T_ADV T_ADV time time 500 200 200 100 100 0 (ns)R=5K (ns)R=10K (ns)R=20K (ns)R=45K 0 0 10K 20K 30K resistance Response at 25oC T_ADV vs R_ADV www.irf.com 40K 50K -60 -30 0 30 60 ttemperature emperature 90 120 Temperature Response T_ADV vs R_ADV 9 IR1176 Case Outline 20 Lead Surface Mount (SSOP-20) 10 01-6057 00 01-3078 00 (MS013AC) www.irf.com IR1176 Case Outline 20 Lead SOIC www.irf.com 01-6070 00 01-3080 00 (MS013AC) 11 IR1176 Case Outline 20 Lead PDIP 01-6069 00 01-3079 00 (MS001AD) WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 1/7/2002 12 www.irf.com