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AU5790
Single wire CAN transceiver
Product data
Supersedes data of 2001 Jan 31
IC18 Data Handbook
2001 May 18
INTEGRATED CIRCUITS
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2
2001 May 18 853-2237 26343
FEATURES
Supports in-vehicle class B multiplexing via a single bus line with
ground return
33 kbps CAN bus speed with loading as per J2411
83 kbps high-speed transmission mode
Low RFI due to output waveshaping
Direct battery operation with protection against load dump, jump
start and transients
Bus terminal protected against short-circuits and transients in the
automotive environment
Built-in loss of ground protection
Thermal overload protection
Supports communication between control units even when
network in low-power state
70 µA typical power consumption in sleep mode
8- and 14-pin small outline packages
±8 kV ESD protection on bus and battery pins
DESCRIPTION
The AU5790 is a line transceiver, primarily intended for in-vehicle
multiplex applications. The device provides an interface between a
CAN data link controller and a single wire physical bus line. The
achievable bus speed is primarily a function of the network time
constant and bit timing, e.g., up to 33.3 kbps with a network
including 32 bus nodes. The AU5790 provides advanced
sleep/wake-up functions to minimize power consumption when a
vehicle is parked, while offering the desired control functions of the
network at the same time. Fast transfer of larger blocks of data is
supported using the high-speed data transmission mode.
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
VBAT Operating supply voltage 5.3 13 27 V
Tamb Operating ambient temperature range –40 +125 °C
VBATld Battery voltage load dump; 1s +40 V
VCANHN Bus output voltage 3.65 4.55 V
VTBus input threshold 1.8 2.2 V
tTrN Bus output delay, rising edge 3 6.3 µs
tTfN Bus output delay, falling edge 3 9 µs
tDN Bus input delay 0.3 1µs
IBATS Sleep mode supply current 70 100 µA
ORDERING INFORMATION
DESCRIPTION TEMPERATURE RANGE ORDER CODE DWG #
SO8: 8-pin plastic small outline package –40 °C to +125 °C AU5790D SOT96–1
SO14: 14-pin plastic small outline package –40 °C to +125 °C AU5790D14 SOT108–1
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 3
BLOCK DIAGRAM
SL01199
GND
TxD
MODE
CONTROL
BAT
TEMP.
PROTECTION
OUTPUT
BUFFER
VOLTAGE
REFERENCE
AU5790
8
RxD
BUS
RECEIVER
NSTB
BATTERY (+12V)
CANH
1
3
45
6
7
LOSS OF
PROTECTION
GROUND
EN
(Mode 1)
(Mode 0)
RT
RTH
(LOAD)
(BUS)
Figure 1. Block Diagram
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 4
SO8 PIN CONFIGURATION
SL01198
1
2
3
4
8
7
6
SO8 5
NSTB (Mode 0)
EN (Mode 1)
RxD
GND
TxD
CANH (BUS)
BAT
RTH (Load)
AU5790
SO8 PIN DESCRIPTION
SYM-
BOL PIN DESCRIPTION
TxD 1Transmit data input: high = transmitter passive;
low = transmitter active
NSTB
(Mode 0) 2Stand-by control: high = normal and
high-speed mode; low = sleep and wake-up
mode
EN
(Mode 1) 3Enable control: high = normal and wake-up
mode; low = sleep and high-speed mode
RxD 4Receive data output: low = active bus condition
detected; float/high = passive bus condition
detected
BAT 5Battery supply input (12 V nom.)
RTH
(LOAD) 6Switched ground pin: pulls the load to ground,
except in case the module ground is
disconnected
CANH
(BUS) 7Bus line transmit input/output
GND 8Ground
SO14 PIN CONFIGURATION
SL01251
1
2
3
4
14
13
12
SO14
11
NSTB (Mode 0)
EN (Mode 1)
RxD
GND
TxD N.C.
AU5790
5
6
7
10
9
8
N.C.
GND
CANH (BUS)
BAT
RTH (Load)
GND
N.C.
GND
SO14 PIN DESCRIPTION
SYM-
BOL PIN DESCRIPTION
GND 1Ground
TxD 2Transmit data input: high = transmitter passive;
low = transmitter active
NSTB
(Mode 0) 3Stand-by control: high = normal and
high-speed mode; low = sleep and wake-up
mode
EN
(Mode 1) 4Enable control: high = normal and wake-up
mode; low = sleep and high-speed mode
RxD 5Receive data output: low = active bus condition
detected; float/high = passive bus condition
detected
N.C. 6No connection
GND 7Ground
GND 8Ground
N.C. 9No connection
BAT 10 Battery supply input (12 V nom.)
RTH
(LOAD) 11 Switched ground pin: pulls the load to ground,
except in case the module ground is
disconnected
CANH
(BUS) 12 Bus line transmit input/output
N.C. 13 No connection
GND 14 Ground
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 5
FUNCTIONAL DESCRIPTION
The AU5790 is an integrated line transceiver IC that interfaces a
CAN protocol controller to the vehicle’s multiplexed bus line. It is
primarily intended for automotive “Class B” multiplexing applications
in passenger cars using a single wire bus line with ground return.
The achievable bit rate is primarily a function of the network time
constant and the bit timing parameters. For example, the maximum
bus speed is 33 kpbs with bus loading as specified in J2411 for a full
32 node bus, while 41.6 kbps at is possible with modified bus
loading. The AU5790 also supports low-power sleep mode to help
meet ignition-off current draw requirements.
The protocol controller feeds the transmit data stream to the
transceiver’s TxD input. The AU5790 transceiver converts the TxD
data input to a bus signal with controlled slew rate and waveshaping
to minimize emissions. The bus output signal is transmitted via the
CANH in/output, connected to the physical bus line. If TxD is low,
then a typical voltage of 4 V is output at the CANH pin. If TxD is high
then the CANH output is pulled passive low via the local bus load
resistance RT. To provide protection against a disconnection of the
module ground, the resistor RT is connected to the R TH pin of the
AU5790. By providing this switched ground pin, no current can flow
from the floating module ground to the bus. The bus receiver detects
the data stream on the bus line. The data signal is output at the RxD
pin being connected to a CAN controller. The AU5790 provides
appropriate filtering to ensure low susceptibility against
electromagnetic interference. Further enhancement is possible with
applying an external capacitor between CANH and ground potential.
The device features low bus output leakage current at power supply
failure situations.
If the NSTB and EN control inputs are pulled low or floating, the
AU5790 enters a low-power or “sleep” mode. This mode is
dedicated to minimizing ignition-off current drain, to enhance system
efficiency. In sleep mode, the bus transmit function is disabled, e.g.
the CANH output is inactive even when TxD is pulled low. An
internal network active detector monitors the bus for any occurrence
of signal edges on the bus line. If such edges are detected, this will
be signalled to the CAN controller via the RxD output. Normal
transmission mode will be entered again upon a high level being
applied to the NSTB and EN control inputs. These signals are
typically being provided by a controller device.
Sleeping bus nodes will generally ignore normal communication on
the bus. They should be activated using the dedicated wake-up
mode. When NSTB is low and EN is high the AU5790 enters
wake-up mode i.e. it sends data with an increased signal level. This
will result in an activation of other bus nodes being attached to the
network.
The AU5790 also provides a high-speed transmission mode
supporting bit rates up to 100 kbps. If the NSTB input is pulled high
and the EN input is low, then the internal waveshaping function is
disabled, i.e. the bus driver is turned on and off as fast as possible
to support high-speed transmission of data. Consequently, the EMC
performance is degraded in this mode compared to the normal
transmission mode. In high-speed transmission mode the AU5790
supports the same bus signal level as specified for the CANH output
in normal mode.
The AU5790 features special robustness at its BAT and CANH pins.
Hence the device is well suited for applications in the automotive
environment. The BAT input is protected against 40 V load dump
and jump start condition. The CANH output is protected against
wiring fault conditions, e.g., short circuit to ground or battery voltage,
as well as typical automotive transients. In addition, an
over-temperature shutdown function with hysteresis is incorporated
protecting the device under system fault conditions. In case of the
chip temperature reaching the trip point, the AU5790 will latch-off
the transmit function. The transmit function is available again after a
small decrease of the chip temperature. The AU5790 contains a
power-on reset circuit. For Vbat < 2.5 V, the CANH output drive will
be turned of f, the output will be passive, and RxD will be high. For
2.5 V < Vbat < 5.3 V, the CANH output drive may operate normally or
be turned off.
Table 1. Control Input Summary
NSTB EN TxD Description CANH RxD
0 0 Don’t Care Sleep mode 0 V float (high)
0 1 Tx-data Wake-up transmission mode 0 V, 12 V bus state1
1 0 Tx-data High-speed transmission mode 0 V, 4 V bus state1
1 1 Tx-data Normal transmission mode 0 V, 4 V bus state1
NOTE:
1. RxD outputs the bus state. If the bus level is below the receiver threshold (i.e., all transmitters passive), then RxD will be floating (i.e., high,
considering external pull-up resistance). Otherwise, if the bus level is above the receiver threshold (i.e., at least one transmitter is active),
then RxD will be low.
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 6
ABSOLUTE MAXIMUM RATINGS
According to the IEC 134 Absolute Maximum System: operation is not guaranteed under these conditions; all voltages are referenced to
pin 8 (GND); positive currents flow into the IC, unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VBAT Supply voltage Steady state –0.3 +27 V
VBATld Short-term supply voltage Load dump; ISO7637/1 test pulse 5
(SAE J1113, test pulse 5), T < 1s +40 V
VBATtr2 Transient supply voltage ISO 7637/1 test pulse 2 (SAE J1113,
test pulse 2), with series diode and
bypass cap of 100 nF between BAT and
GND pins, Note 2.
+100 V
VBATtr3 Transient supply voltage ISO 7637/1 pulses 3a and 3b
(SAE J1113 test pulse 3a and 3b),
Note 2.
–150 +100 V
VCANH_1 CANH voltage VBAT > 2 V –10 +18 V
VCANH_0 CANH voltage VBAT < 2 V –16 +18 V
VCANHtr1 Transient bus voltage ISO 7637/1 test pulse 1, Notes 1 and 2 –100 V
VCANHtr2 Transient bus voltage ISO 7637/1 test pulse 2, Notes 1 and 2 +100 V
VCANHtr3 Transient bus voltage ISO 7637/1 test pulses 3a, 3b,
Notes 1 and 2 –150 +100 V
VRTH1 Pin RTH voltage VBAT > 2 V, voltage applied to pin RTH
via a 2 k series resistor –10 +18 V
VRTH0 Pin RTH voltage VBAT < 2 V, voltage applied to pin RTH
via a 2 k series resistor –16 +18 V
VIDC voltage on pins TxD, EN, RxD, NSTB –0.3 +7 V
ESDBAHB ESD capability of pin BAT Direct contact discharge,
R=1.5 k, C=100 pF –8 +8 kV
ESDCHHB ESD capability of pin CANH Direct contact discharge,
R=1.5 k, C=100 pF –8 +8 kV
ESDRTHB ESD capability of pin RTH Direct contact discharge,
R=1.5 k + 3 k, C=100 pF –8 +8 kV
ESDLGHB ESD capability of pins TxD, NSTB, EN, RxD, and
RTH Direct contact discharge,
R=1.5 k , C=100 pF –2 +2 kV
RTmin Bus load resistance RT being connected to pin
RTH 2 k
Tamb Operating ambient temperature –40 +125 °C
Tstg Storage temperature –40 +150 °C
Tvj Junction temperature –40 +150 °C
NOTES:
1. Test pulses are coupled to CANH through a series capacitance of 1 nF.
2. Rise time for test pulse 1: tr < 1 µs; pulse 2: tr < 100 ns; pulses 3a/3b: tr < 5 ns.
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 7
DC CHARACTERISTICS
–40 °C < Tamb < +125 °C; 5.5 V < VBAT < 16 V ; –0.3 V < V TxD < 5.5 V; –0.3 V < VNSTB < 5.5 V; –0.3 V < VEN < 5.5 V; –0.3 V < VRxD < 5.5 V;
–1 V < VCANH < +16 V; bus load resistor at pin RTH: 2 k < RT < 9.2 k; total bus load resistance 270 < RL < 9.2 k;
CL < 13.7 nF; 1µs < RL CL < 4µs; RxD pull-up resistor 2.2 k < Rd < 3.0 k; RxD: loaded with CLR < 30pF to GND;
all voltages are referenced to pin 8 (GND); positive currents flow into the IC;
typical values reflect the approximate average value at VBAT = 13 V and Tamb = 25 °C, unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Pin BAT
VBAT Operating supply voltage Note 1 5.3 13 27 V
VBATL Low battery state Part functional or in undervoltage
lockout state 2.5 5.3 V
VBATLO Supply undervoltage lockout state TxD = 1 or 0; check CANH and
RxD are floating 2.5 V
IBATPN Passive state supply current in
normal mode NSTB = 5 V, EN = 5 V, TxD = 5 V 2 mA
IBATPW Passive state supply current in
wake-up mode NSTB = 0 V, EN = 5 V, TxD = 5 V,
Note 2 3 mA
IBATPH Passive state supply current in
high speed mode NSTB = 5 V, EN = 0 V, TxD = 5 V,
Note 2 4 mA
IBATN Active state supply current in
normal mode NSTB = 5 V, EN = 5 V, TxD = 0 V,
RL = 270 Ω, Tamb = 125 °C35 mA
Tamb = 25 °C, –40 °C 40 mA
IBATW Active state supply current in
wake-up mode NSTB = 0 V, EN = 5 V, TxD = 0 V,
RL = 270 , Note 2,
Tamb = 125 °C
70 mA
Tamb = 25 °C, –40 °C, Note 2 90 mA
IBATH Active state supply current in
high speed mode NSTB = 5 V, EN = 0 V, TxD = 0 V,
RL = 100 , Note 2,
Tamb = 125 °C
70 mA
Tamb = 25 °C, –40 °C, Note 2 85 mA
IBATS Sleep mode supply current NSTB = 0 V, EN = 0 V, TxD = 5 V,
RxD = 5 V, –1 V < VCANH < +1 V,
5.5 V < VBAT < 14 V
–40 °C < Tj < 125 °C
70 100 µA
Pin CANH
VCANHN Bus output voltage in normal
mode NSTB = 5 V, EN = 5 V,
RL > 270; 5.5 V < VBAT < 27 V 3.65 4.1 4.55 V
VCANHW Bus output voltage in wake-up
mode NSTB = 0 V, EN = 5 V,
RL > 270; 11.3 V < VBAT < 16 V 9.80 min
(VBAT, 13) V
VCANHWL Bus output voltage in wake-up
mode, low battery NSTB = 0 V, EN = 5 V,
RL > 27 0; 5.5 V < VBAT < 11.3 V VBAT
1.45 VBAT V
VCANHH Bus output voltage in high-speed
transmission mode NSTB = 5 V, EN = 0 V,
RL > 100; 8 V < VBAT < 16 V 3.65 4.55 V
ICANHRR Recessive state output current,
bus recessive Recessive state or sleep mode,
VCANH = –1 V; 0 V < VBAT < 27 V –10 10 µA
ICANHRD Recessive state output current,
bus dominant Recessive state or sleep mode,
VCANH = 10 V; 0 V < VBAT < 16 V –20 100 µA
ICANHDD Dominant state output current,
bus dominant TxD = 0 V, normal mode,
high-speed mode and sleep mode;
VCANH = 10 V;
0 V < VBAT < 16 V
–20 100 µA
–ICANH_N Bus short circuit current,
normal mode VCANH = –1 V,
TxD = 0 V; NSTB = 5 V; EN = 5 V 30 150 mA
–ICANHW Bus short circuit current,
wake-up mode VCANH = –1 V,
TxD = 0 V; NSTB = 0 V; EN = 5 V 60 190 mA
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 8
SYMBOL UNITMAX.TYP.MIN.CONDITIONSPARAMETER
Pin CANH (continued)
–ICANHH Bus short circuit current in
high-speed mode VCANH = –1 V,
TxD = 0 V; NSTB = 5 V; EN = 0 V;
8 V < VBAT < 16 V
50 190 mA
ICANLG Bus leakage current at loss of
ground
(I_CAN_LG = I_CANH + I_RTH)
0 V < VBAT < 16 V;
see Figure 3 in the test circuits
section
–50 50 µA
Tsd Thermal shutdown Note 2 155 190 °C
Thys Thermal shutdown hysteresis Note 2 5 15 °C
VTBus input threshold 5.8 V < VBAT < 27 V,
all modes except sleep mode 1.8 2.2 V
VTL Bus input threshold, low battery 5.5 V < VBAT < 5.8 V,
all modes except sleep mode 1.5 2.2 V
VTS Bus input threshold in sleep mode NSTB = 0 V, EN = 0 V,
VBAT > 11.3 V 6.15 8.1 V
VTSL Bus input threshold in sleep mode,
low battery NSTB = 0 V, EN = 0 V,
5.5 V < VBAT < 11.3 V VBAT – 4.3 VBAT – 3.25 V
Pin RTH
VRTH1 Voltage on switched ground pin IRTH = 1 mA 0.1 V
VRTH2 Voltage on switched ground pin IRTH = 6 mA 1 V
Pins NSTB, EN
Vih High level input voltage 5.5 V < VBAT < 27 V 3 V
Vil Low level input voltage 5.5 V < VBAT < 27 V 1 V
IiInput current Vi = 1 V and Vi = 5 V 15 50 µA
Pin TxD
Vitxd TxD input threshold 5.5 V < VBAT < 27 V 1 3 V
–Iiltxd TxD low level input current in
normal mode NSTB = 5 V, EN = 5 V, VTxD = 0 V 50 180 µA
–Iihtxd TxD high level input current in
sleep mode NSTB = 0 V, EN = 0 V, VTxD = 5 V –5 10 µA
Pin RxD
Volrxd RxD low level output voltage IRxD = 2.2 mA;
VCANH = 10 V, all modes 0.45 V
Iolrxd RxD low level output current VRxD = 5 V; VCANH = 10 V 3 35 mA
Iohrxd RxD high level leakage VRxD = 5 V; VCANH = 0 V,
all modes –10 +10 µA
NOTES:
1. Operation at battery voltages down to 5.3 volts is guaranteed by design. Operation higher than 18 volts (18 V < VBAT < 27 V) for up to two
minutes is permitted if the thermal design of the board prevents reaching the thermal protection temperature limit, Tsd, otherwise the device
will self protect. Typically these requirements will be encountered during jump start operation at Tamb 85 °C and VBAT < 27 V. Refer to the
“Thermal Characteristics” section of this data sheet, or application note AN2005 for guidance.
2. This parameter is characterized but not subject to production test.
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 9
Dynamic (AC) CHARACTERISTICS for 33 kbps operation
–40 °C < Tamb < +125 °C; 5.5 V < VBAT < 16 V; –0.3 V < VTxD < 5.5 V; –0.3 V < VNSTB < 5.5 V; –0.3 V < VEN < 5.5 V; –0.3 V < VRxD < 5.5 V ;
–1 V < VCANH < +16 V; bus load resistor at pin RTH: 2 k < RT < 9.2 k; total bus load resistance 270 < RL < 9.2 k;
CL < 13.7 nF; 1µs < RL CL < 4µs; RxD pull-up resistor 2.2 k < Rd < 3.0 k; RxD: loaded with CLR < 30pF to GND;
all voltages are referenced to pin 8 (GND); positive currents flow into the IC;
typical values reflect the approximate average value at VBAT = 13 V and Tamb = 25 °C, unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Pin CANH
VdBAMN CANH harmonic content in
normal mode NSTB = 5 V, EN = 5 V;
RL = 270 , CL = 15 nF;
fTxD = 20 kHz, 50% duty cycle;
8 V < VBAT< 16 V;
0.53 MHz < f < 1.7 MHz, Note 2
70 dBµV
VdBAMW CANH harmonic content in
wake-up mode NSTB = 5 V, EN = 0 V;
RL = 270 , CL = 15 nF;
fTxD = 20 kHz, 50% duty cycle;
8 V < VBAT< 16 V;
0.53 MHz < f < 1.7 MHz, Note 2
80 dBµV
Pins NSTB, EN
tNH Normal mode to high-speed mode
delay 30 µs
tHN High-speed mode to normal mode
delay 30 µs
tWN Wake-up mode to normal mode
delay 8 V < VBAT < 16 V 30 µs
tNS Normal mode to sleep mode delay 500 µs
tSN Sleep mode to normal mode delay 50 µs
Pin TxD
tTrN Transmit delay in normal mode,
bus rising edge NSTB = 5 V, EN = 5 V;
RL = 270 , CL = 15 nF;
5.5 V < VBAT < 27 V;
measured from the falling edge on
TxD to VCANH = 3.0 V
3 6.3 µs
tTfN Transmit delay in normal mode,
bus falling edge NSTB = 5 V, EN = 5 V;
RL = 270 , CL = 15 nF;
5.5 V < VBAT< 27 V;
measured from the rising edge on
TxD to VCANH = 1.0 V
3 9 µs
tTrW Transmit delay in wake-up mode,
bus rising edge to normal levels NSTB = 0 V, EN = 5 V;
RL = 270 , CL = 15 nF;
5.5 V < VBAT < 27 V;
measured from the falling edge on
TxD to VCANH = 3.0 V
3 6.3 µs
tTrW-S Transmit delay in wake-up mode,
bus rising edge to wake-up level NSTB = 0 V, EN = 5 V;
RL = 270 , CL = 15 nF;
11.3 V < VBAT < 27 V;
measured from the falling edge on
TxD to VCANH = 8.9 V
3 18 µs
tTfW-3.6 Transmit delay in wake-up mode,
bus falling edge with 3.6 µs time
constant
NSTB = 0 V, EN = 5 V;
RL = 270 , CL = 13.3 nF;
5.5 V < VBAT < 27 V;
measured from the rising edge on
TxD to VCANH = 1 V, Note 2
3 12.7 µs
tTfW-4.0 Transmit delay in wake-up mode,
bus falling edge with 4.0 µs time
constant
NSTB = 0 V, EN = 5 V;
RL = 270 , CL = 15 nF;
5.5 V < VBAT < 27 V;
measured from the rising edge on
TxD to VCANH = 1 V
3 13.7 µs
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 10
SYMBOL UNITMAX.TYP.MIN.CONDITIONSPARAMETER
Pin TxD (continued)
tTrHS Transmit delay in high-speed
mode, bus rising edge NSTB = 5 V, EN = 0 V;
RL = 100 , CL = 15 nF;
8 V < VBAT < 16 V;
measured from the falling edge on
TxD to VCANH = 3.0 V
0.1 1.5 µs
tTfHS Transmit delay in high-speed
mode, bus falling edge NSTB = 5 V, EN = 0 V;
RL = 100 , CL = 15 nF;
8 V < VBAT < 16 V;
measured from the rising edge on
TxD to VCANH = 1.0 V
0.2 3µs
Pin RxD
tDN Receive delay in normal mode,
bus rising and falling edge NSTB = 5 V, EN = 5 V;
5.5 V < VBAT < 27 V;
CANH to RxD time measured from
VCANH = 2.0 V to VRxD = 2.5 V
0.3 1µs
tDW Receive delay in wake-up mode,
bus rising and falling edge NSTB = 0 V, EN = 5 V;
5.5 V < VBAT < 27 V;
CANH to RxD time measured from
VCANH = 2.0 V to VRxD = 2.5 V
0.3 1µs
tDHS Receive delay in high-speed
mode, bus rising and falling edge NSTB = 5 V, EN = 0 V;
8 V < VBAT < 16 V;
CANH to RxD time measured from
VCANH = 2.0 V to VRxD = 2.5 V
0.3 1µs
tDS Receive delay in sleep mode,
bus rising edge NSTB = 0 V, EN = 0 V;
CANH to RxD time, measured from
VCANH = min {(VBAT – 3.78 V),
7.13 V} to VRxD = 2.5 V
10 70 µs
NOTES:
1. Operation at battery voltages down to 5.3 volts is guaranteed by design. Operation higher than 18 volts (18 V < VBAT < 27 V) for up to two
minutes is permitted if the thermal design of the board prevents reaching the thermal protection temperature limit, Tsd, otherwise the device
will self protect. Typically these requirements will be encountered during jump start operation at Tamb 85 °C and VBAT < 27 V. Refer to the
“Thermal Characteristics” section of this data sheet, or application note AN2005 for guidance.
2. This parameter is characterized but not subject to production test.
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 11
SL01255
TxD
50%
CANH
3 V
2 V
1 V
RxD
50%
tTr tTf
tDtD
NOTE:
1. When AU5790 is in normal, high-speed, or wake-up mode, the transmit delay in rising edge tTr may be expressed as tTrN, tTrHS, or tTrW,
respectively; the transmit delay in falling edge tTf may be expressed as tTfN, tTfHS, or tTfW, respectively; and the receive delay tD as tDN,
tDHS, or tDW, respectively. Figure 2. Timing Diagrams: Pin TxD, CANH, and RxD
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 12
TEST CIRCUITS
AU5790
TxD
NSTB
EN
RxD
GND
CANH
RTH
BAT
2.4 k
5.1V
9.1 k
1.5 k 1 µF
S3
VBAT
I_CAN_LG
SL01234
S1
S2
Figure 3. Loss of ground test circuit
NOTES:
Opening S3 simulates loss of module ground.
Check I_CAN_LG with the following switch positions to simulate loss of ground in all modes:
1. S1 = open = S2
2. S1 = open, S2 = closed
3. S1 = closed, S2 = open
4. S1 = closed = S2
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 13
APPLICATION INFORMATION
The information in this section is not part of the IC specification, but is presented for information purposes only. Additional information on single
wire CAN networks, application circuits, and thermal management are included in application note AN2005.
SL01200
CAN BUS LINE
TX0 RX0
TxD RxD
BAT
AU5790
TRANSCEIVER
ENNSTB
CANH
+12V
PORT
GND
PORT
+5V
2.4 to
2.7k
RD
CL
9.1k,
1%
CAN CONTROLLER
(e.g. SJA1000)
Note 1 TX0 should be configured to push-pull operation, active low; e.g., Output Control Register = 1E hex.
Note 2 Recommended range for the load resistor is 3k < RT < 11k.
220 pF
47 µH
RT
RTH
10%
100 nF
1N5060
or equiv.
L
1 to 4.7 µF
Figure 4. Application circuit example for the AU5790
AU5790 transceivers may require additional PCB surface at ground pin(s) as heat conductor(s) in order to meet thermal requirements. See
thermal characteristics section for details.
Table 2. Maximum CAN Bit Rate
MODE MAXIMUM BIT RATE AT 0.35% CLOCK ACCURACY
Normal transmission 33.3 kbps
High-speed transmission 83.3 kbps
Sample point as % of bit time 85%
Bus Time constant, normal mode 1.0 to 4.0 µs
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 14
THERMAL CHARACTERISTICS
The AU5790 provides protection from thermal overload. When the
IC junction temperature reaches the threshold (155 °C), the
AU5790 will disable the transmitter drivers, reducing power
dissipation to protect the device. The transmit function will become
available again after the junction temperature drops. The thermal
shutdown hysteresis is about 5 °C.
In order to avoid this transmit function shutdown, care must be taken
to not overheat the IC during application. The relationships between
junction temperature, ambient temperature, dissipated power, and
thermal resistance can be expressed as:
Tj =Ta + Pd * θja
where: Tj is junction temperature (°C);
Ta is ambient temperature (°C);
Pd is dissipated power (W);
θja is thermal resistance (°C/W).
Thermal Resistance
Thermal resistance is the ability of a packaged IC to dissipate heat
to its environment. In semiconductor applications, it is highly
dependant on the IC package, PCBs, and airflow. Thermal
resistance also varies slightly with input power, the difference
between ambient and junction temperatures, and soldering material.
Figures 5 and 6 show the thermal resistance as the function of the
IC package and the PCB configuration, assuming no airflow.
SL01249
0
50
100
150
200
0 50 100 150 200 250
Thermal resistance (C/W)
Cu area on fused pins (mm2)
very low
conductance
board
low
conductance
board
high
conductance
board
Figure 5. SO-8 Thermal Resistance vs. PCB Configuration, Note 1, 2, 3
SL01250
0
50
100
150
0 100 200 300 400 500
Thermal resistance (C/W)
Cu area on fused pins (mm2)
very low
conductance
board
low
conductance
board
high
conductance
board
Figure 6. SO-14 Thermal Resistance vs. PCB Configuration, Note 1, 2, 3
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 15
Table 3 shows the maximum power dissipation of an AU5790 without tripping the thermal overload protection, for specified combinations of
package, board configuration, and ambient temperature.
Table 3. Maximum power dissipation
ΘJA Ptot
Power Dissipation Max.
Additional Foil Area for Thermal Resistance Ta= 85 °C Ta= 125 °C
Board Type
Additional
Foil
Area
for
Heat Dissipation K/W mW mW
SO-8 on High
Conductance Board
Normal traces 103 631 243
C
on
d
uc
t
ance
B
oar
d
225 Sq. mm of copper
foil attached to pin 8. 82 793 305
SO-8 on Low
Conductance Board
Normal traces 163 399 153
C
on
d
uc
t
ance
B
oar
d
225 Sq. mm of copper
attached to pin 8. 119 546 210
SO-8 on Very Low
Conductance Board
Normal traces 194 335 129
C
on
d
uc
t
ance
B
oar
d
225 Sq. mm of copper
attached to pin 8. 135 481 185
SO-14 on High
Conductance Board
Normal traces 63 1032 397
C
on
d
uc
t
ance
B
oar
d
105 Sq. mm of copper
attached to each of pins
1, 7, 8, & 14.
50 1300 500
SO-14 on Low
Conductance Board
Normal traces 103 631 243
C
on
d
uc
t
ance
B
oar
d
105 Sq. mm of copper
attached to each of pins
1, 7, 8, & 14.
70 929 357
SO-14 on Very Low
Conductance Board
Normal traces 126 516 198
C
on
d
uc
t
ance
B
oar
d
105 Sq. mm of copper
attached to each of pins
1, 7, 8, & 14.
82 793 305
NOTES:
1. The High Conductance board is based on modeling done to EIA/JEDEC Standard JESD51-7. The board emulated contains two one ounce
thick copper ground planes, and top surface copper conductor traces of two ounce (0.071 mm thickness of copper).
2. The Low Conductance board is based on modeling done to EIA/JEDEC Standard EIA/JESD51-3. The board does not contain any ground
planes, and the top surface copper conductor traces of two ounce (0.071 mm thickness of copper).
3. The Very Low Conductance board is based on the EIA/JESD51-3, however the thickness of the surface conductors has been reduced to
0.035 mm (also referred to as 1.0 Ounce copper).
4. The above mentioned JEDEC specifications are available from: http://www.jedec.org/
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 16
Power Dissipation
Power dissipation of an IC is the major factor determining junction
temperature. AU5790 power dissipation in active and passive states
are different. The average power dissipation is:
Ptot = PINT*Dy + PPNINT * (1-Dy)
where: Ptot is total dissipation power;
PINT is dissipation power in an active state;
PPNINT is dissipation power in a passive state;
Dy is duty cycle, which is the percentage of time that TxD
is in an active state during any given time duration.
At passive state there is no current going into the load. So
all of the supply current is dissipated inside the IC.
PPNINT = VBAT * IBATPN
where: VBAT is the battery voltage;
IBATPN is the passive state supply current in normal mode.
In an active state, part of the supply current goes to the
load, and only part of the supply current dissipates inside
the IC, causing an incremental increase in junction
temperature.
PINT = PBATAN – PLOADN
where: PBATAN is active state battery supply power in normal
mode;
PBATAN = VBAT * IBATAN
PLOADN is load power consumption in normal mode.
PLOADN = VCANHN * ILOADN
where: IBATAN is active state supply current in normal mode;
VCANHN is bus output voltage in normal mode;
ILOADN is current going through load in normal mode.
ILOAD = VCANHN/RLOAD
IBATN = ILOAD + IINT
where: IINT is an active state current dissipated within the IC in
normal mode.
IINT will decrease slightly when the node number
decreases. To simplify this analysis, we will assume IINT is
fixed.
IINT = IBATN (32 nodes) – ILOAD (32 nodes)
IBATN (32 nodes) may be found in the DC Characteristics
table.
A power dissipation example follows. The assumed values
are chosen from specification and typical applications.
Assumptions:
VBAT = 13.4 V
RT = 9.1 k
32 nodes
IBATPN = 2 mA
IBATN (32 nodes) = 35 mA
VCANHN = 4.55 V
Duty cycle = 50%
Computations:
RLOAD = 9.1 k/ 32 = 284.4
PPNINT = 13.4 V × 2 mA = 26.8 mW
ILOAD = 4.55 V / 284.4 = 16mA
PLOADN = 4.55 V × 16 mA = 72.8 mW
IINT = 35 mA - 16 mA = 19 mA
PBATAN = 13.4 V × 35 mA = 469 mW
PINT = 469 mW - 72.8 mW = 396.2 mW
Ptot = 396.2 mW × 50% + 26.8 mW × (1-50%) = 211.5 mW
Additional examples with various node counts are shown in Table 4.
Table 4. Representative Power Dissipation Analyses
Nodes RLOAD
()VBAT (V) IBATPN
(mA) PPNINT
(mW) VCANHN
(V) ILOAD
(mA) IBATN
(mA) IINT (mA) PINT
(mW) Dcycle Ptot
(mW)
2 4550 13.4 2 26.8 4.55 1 20 19 263.5 0.5 145.1
10 910 13.4 2 26.8 4.55 5 24 19 298.9 0.5 162.8
20 455 13.4 2 26.8 4.55 10 29 19 343.1 0.5 184.9
32 284.4 13.4 2 26.8 4.55 16 35 19 396.2 0.5 211.5
2 4550 26.5 2 53 4.55 1 20 19 525.5 0.5 289.2
10 910 26.5 2 53 4.55 5 24 19 613.3 0.5 333.1
20 455 26.5 2 53 4.55 10 29 19 723 0.5 388
32 284.4 26.5 2 53 4.55 16 35 19 854.7 0.5 453.8
By knowing the maximum power dissipation, and the operation ambient temperature, the required thermal resistance without tripping the
thermal protection can be calculated, as shown in Figure 7. Then from Figure 5 or 6, a suitable PCB can be selected.
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 17
SL01256
0
50
100
150
200
250
300
350
400
450
500
50 60 70 80 90 100 110 120 130
THERMAL RESISTANCE (C/W)
Ptot = 453.8 mW
(Vbat = 26.5 V, 32 nodes)
Ptot = 333.1 mW
(Vbat = 26.5 V, 10 nodes)
Ptot = 211.5 mW
(Vbat = 13.4 V, 32 nodes)
AMBIENT TEMPERATURE (°C)
Figure 7. Required Thermal Resistance vs. Ambient Temperature and Power Dissipation
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 18
SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 19
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18 20
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may af fect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 2001
All rights reserved. Printed in U.S.A.
Date of release: 05-01
Document order number: 9397 750 08401
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Data sheet status[1]
Objective data
Preliminary data
Product data
Product
status[2]
Development
Qualification
Production
Definitions
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
This data sheet contains data from the preliminary specification. Supplementary data will be
published at a later date. Philips Semiconductors reserves the right to change the specification
without notice, in order to improve the design and supply the best possible product.
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply.
Changes will be communicated according to the Customer Product/Process Change Notification
(CPCN) procedure SNW-SQ-650A.
Data sheet status
[1] Please consult the most recently issued datasheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on
the Internet at URL http://www .semiconductors.philips.com.