PIC18F2420/2520/4420/4520
DS39631A-page 378 Preliminary 2004 Microchip Technology Inc.
H
Hardware Multiplier ... ........... .......... ........... .......... ...............89
Introduction ................................................................89
Operation ...................................................................89
Perform ance Comparis on ..........................................89
High/Lo w -V o ltage Detect .......................... .......... .............243
Applications .. ............................................................246
Associ a te d Re g i sters .......................................... .....247
Characteristics .........................................................339
Curren t Cons u mption ......... .......... ................... .........245
Effects of a Reset .....................................................247
Operation .................................................................244
During Sleep .. ..................................................247
Setup ........................................................................245
Start- u p Time ............... .................. ........... ...............245
Typica l Ap p l ication .............................................. .....246
HLVD. See High/Low-Voltage Detect.
I
I/O Ports ........................ ................... ................... .............105
I2C Mode (MSSP)
Acknowledge Sequence Timing ...............................194
Baud Rate Generator ...............................................187
Bus Collision
During a Repeated Start Condition ..................198
During a Stop Condition ...................................199
Clock Arbitration .......................................................188
Clock Stretching .......................................................180
10-Bit Slave Receive Mode (SEN = 1) .............180
10-Bit Slave Transmit Mode .............................180
7-Bit Slave Receive Mode (SEN = 1) ...............180
7-Bit Slave Transmit Mode ...............................180
Clock Synchronization and the CKP Bit (SEN = 1) ..181
Effects of a Reset .....................................................195
General Call Address Support .................................184
I2C Clock Rate w/BRG .............................................187
Master Mode ............................................................185
Operation .........................................................186
Reception .........................................................191
Repeated Start Condition Timing .....................190
Start Condition Timing ........... ......... .. .... .... .......189
Transmission ....................................................191
Multi-Master Communication, Bus Collision
and Arbitration ............................. .. .. .. .. .. .. .. .......195
Multi-Master Mode ...................................................195
Operation .................................................................174
Read/Write Bit Information (R/W Bit) ...............174, 175
Registers .................................................................. 170
Serial Clock (RC3/SCK/SCL) ...................................175
Slave Mode ..............................................................174
Addressing .......................................................174
Reception .........................................................175
Transmission ....................................................175
Sleep Operation .......................................................195
Stop Condition Timing ................ ..............................194
ID Locations .. ...........................................................249, 266
INCF .................................................................................288
INCFSZ ............................................................................289
In-Circuit Debugger ..........................................................266
In-Circuit Serial Programming (ICSP) ......................249, 266
Indexed Literal Offset Addressing
and Standard PIC18 Instructions . ......... .... .... ...... .....314
Indexed Literal Offset Mode ................................ .... .. .. .....314
Indirect Addressing ............................................................69
INFSNZ ............................................................................ 289
Initialization Conditions for all Registers .................... .. 49–52
Instru ction Cycle ................................................................ 57
Clocking Scheme ....................................................... 57
Instru ction Flow/Pipelining .... ............................................. 57
Instru ction Set .................................................................. 267
ADDLW .................................................................... 273
ADDWF .................................................................... 273
ADDWF (Indexed Literal Offset Mode) .................... 315
ADDWFC ................................................................. 274
ANDLW .................................................................... 274
ANDWF .................................................................... 275
BC ............................................................................ 275
BCF ......................................................................... 276
BN ............................................................................ 276
BNC ......................................................................... 277
BNN ......................................................................... 277
BNOV ...................................................................... 278
BNZ ......................................................................... 278
BOV ......................................................................... 281
BRA ......................................................................... 279
BSF .......................................................................... 279
BSF (Indexed Literal Offset Mode) .......................... 315
BTFSC ..................................................................... 280
BTFSS ..................................................................... 280
BTG ......................................................................... 281
BZ ............................................................................ 282
CALL ........................................................................ 282
CLRF ....................................................................... 283
CLRWDT ................................................................. 283
COMF ...................................................................... 284
CPFSEQ .................................................................. 284
CPFSGT .................................................................. 285
CPFSLT ................................................................... 285
DAW ........................................................................ 286
DCFSNZ .................................................................. 287
DECF ....................................................................... 286
DECFSZ .................................................................. 287
Extended Instruction Set ......................................... 309
General Format .................... ......... .... .... .... ......... .... .. 269
GOTO ...................................................................... 288
INCF ........................................................................ 288
INCFSZ .................................................................... 289
INFSNZ .................................................................... 289
IORLW ..................................................................... 290
IORWF ..................................................................... 290
LFSR ....................................................................... 291
MOVF ...................................................................... 291
MOVFF .................................................................... 292
MOVLB .................................................................... 292
MOVLW ................................................................... 293
MOVWF ................................................................... 293
MULLW .................................................................... 294
MULWF .................................................................... 294
NEGF ....................................................................... 295
NOP ......................................................................... 295
Opcode Field Descriptions ....................................... 268
POP ......................................................................... 296
PUSH ....................................................................... 296
RCALL .....................................................................297
RESET ..................................................................... 297
RETFIE .................................................................... 298
RETLW .................................................................... 298
RETURN .................................................................. 299
RLCF ....................................................................... 299
RLNCF ..................................................................... 300