4 Ω RON, 4-/8-Channel
±15 V/+12 V/±5 V iCMOS Multiplexers
ADG1408/ADG1409
Rev. B
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FEATURES
4.7 Ω maximum on resistance @ 25°C
0.5 Ω on resistance flatness
Up to 190 mA continuous current
Fully specified at ±15 V/+12 V/±5 V
3 V logic-compatible inputs
Rail-to-rail operation
Break-before-make switching action
16-lead TSSOP and 4 mm × 4 mm LFCSP packages
APPLICATIONS
Relay replacement
Audio and video routing
Automatic test equipment
Data acquisition systems
Temperature measurement systems
Avionics
Battery-powered systems
Communication systems
Medical equipment
FUNCTIONAL BLOCK DIAGRAM
ADG1408
S1
S8
D
ADG1409
S1A
S4B
DA
DB
S4A
S1B
1-OF-4
DECODER
1-OF-8
DECODER
A0 A1 ENA0 A1 A2 EN
04861-001
Figure 1.
GENERAL DESCRIPTION
The ADG1408/ADG1409 are monolithic iCMOS® analog multip-
lexers comprising eight single channels and four differential
channels, respectively. The ADG1408 switches one of eight
inputs to a common output, as determined by the 3-bit binary
address lines, A0, A1, and A2. The ADG1409 switches one of
four differential inputs to a common differential output, as
determined by the 2-bit binary address lines, A0 and A1. An EN
input on both devices is used to enable or disable the device.
When disabled, all channels are switched off.
The iCMOS (industrial CMOS) modular manufacturing process
combines high voltage CMOS (complementary metal-oxide
semiconductor) and bipolar technologies. It enables the devel-
opment of a wide range of high performance analog ICs capable
of 33 V operation in a footprint that no other generation of high
voltage parts has been able to achieve. Unlike analog ICs using
conventional CMOS processes, iCMOS components can tolerate
high supply voltages while providing increased performance,
dramatically lower power consumption, and reduced package size.
The ultralow on resistance and on resistance flatness of these
switches make them ideal solutions for data acquisition and
gain switching applications where low distortion is critical.
iCMOS construction ensures ultralow power dissipation,
making the parts ideally suited for portable and battery-
powered instruments.
PRODUCT HIGHLIGHTS
1. 4 Ω on resistance.
2. 0.5 Ω on resistance flatness.
3. 3 V logic compatible digital input, VIH = 2.0 V, VIL = 0.8 V.
4. 16-lead TSSOP and 4 mm × 4 mm LFCSP packages.
Table 1. Related Devices
Part No. Description
ADG1208/ADG1209 Low capacitance, low charge injection,
and low leakage 4-/8-channel ±15 V
multiplexers
ADG1408/ADG1409
Rev. B | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
15 V Dual Supply .......................................................................... 3
12 V Single Supply ........................................................................ 5
5 V Dual Supply ............................................................................ 7
Continuous Current per channel, S or D ...................................8
Absolute Maximum Ratings ............................................................9
Thermal Resistance .......................................................................9
ESD Caution...................................................................................9
Pin Configurations and Function Descriptions ......................... 10
Typical Performance Characteristics ........................................... 12
Terminology .................................................................................... 16
Test Circuits ..................................................................................... 17
Outline Dimensions ....................................................................... 19
Ordering Guide .......................................................................... 20
REVISION HISTORY
3/09—Rev. A to Rev. B
Change to IDD Parameter (Table 2) ................................................. 4
Change to IDD Parameter (Table 3) ................................................. 6
8/08—Rev. 0 to Rev. A
Changes to Features .......................................................................... 1
Added Table 5; Renumbered Sequentially .................................... 8
Changes to Table 6 ............................................................................ 9
Added Exposed Pad Notation to Figure 3 ................................... 10
Added Exposed Pad Notation to Figure 5 ................................... 11
Added Exposed Pad Notation to Outline Dimensions ............. 19
8/06—Revision 0: Initial Version
ADG1408/ADG1409
Rev. B | Page 3 of 20
SPECIFICATIONS
15 V DUAL SUPPLY
VDD = +15 V ± 10%, VSS = −15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 2.
Parameter +25°C
−40°C to
+85°C
−40°C to
+125°C1 Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range VSS to VDD V
On Resistance (RON) 4 Ω typ VS = ±10 V, IS = −10 mA; see Figure 26
4.7 5.7 6.7 Ω max VDD = +13.5 V, VSS = −13.5 V
On Resistance Match Between 0.2 Ω typ VS = ±10 V, IS = −10 mA
Channels (ΔRON) 0.78 0.85 1.1 Ω max
On Resistance Flatness (RFLAT(ON)) 0.5 Ω typ VS = ±10 V, IS = −10 mA
0.72 0.77 0.92 Ω max
LEAKAGE CURRENTS VDD = +16.5 V, VSS −16.5 V =
Source Off Leakage, IS (Off) ±0.04 nA typ VS = ±10 V, VD = 10 V; see טFigure 27
±0.2 ±0.6 ±5 nA max
Drain Off Leakage, ID (Off) ±0.04 nA typ VS = ±10 V, VD = ט10 V; see Figure 27
±0.45 ±2 ±30 nA max
Channel On Leakage, ID, IS (On) ±0.1 nA typ VS = VD = ±10 V; see Figure 28
±1.5 ±3 ±30 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current ±0.005 μA typ VIN = VGND or VDD
±0.1 μA max
Digital Input Capacitance, CIN 4 pF typ
DYNAMIC CHARACTERISTICS2
Transition Time, tTRANSITION 140 ns typ RL = 100 Ω, CL = 35 pF
170 210 240 ns max VS = 10 V, see Figure 29
Break-Before-Make Time Delay, tBBM 50 ns typ RL = 100 Ω, CL = 35 pF
30 ns min VS1 = VS2 = 10 V; see Figure 30
tON (EN) 100 ns typ RL = 100 Ω, CL = 35 pF
120 150 165 ns max VS = 10 V; see Figure 31
tOFF (EN) 100 ns typ RL = 100 Ω, CL = 35 pF
120 150 170 ns max VS = 10 V; see Figure 31
Charge Injection −50 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 32
Off Isolation −70 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 33
Channel-to-Channel Crosstalk −70 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 34
Total Harmonic Distortion, THD + N 0.025 % typ RL = 110 Ω, 15 V p-p, f = 20 Hz to 20 kHz;
see Figure 36
−3 dB Bandwidth RL = 50 Ω, CL = 5 pF; see Figure 35
ADG1408 60 MHz typ
ADG1409 115 MHz typ
Insertion Loss 0.24 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 35
CS (Off) 14 pF typ f = 1 MHz
CD (Off)
ADG1408 80 pF typ f = 1 MHz
ADG1409 40 pF typ f = 1 MHz
CD, CS (On)
ADG1408 135 pF typ f = 1 MHz
ADG1409 90 pF typ f = 1 MHz
ADG1408/ADG1409
Rev. B | Page 4 of 20
Parameter +25°C
−40°C to
+85°C
−40°C to
+125°C1 Unit Test Conditions/Comments
POWER REQUIREMENTS VDD = +16.5 V, VSS = −16.5 V
IDD 0.002 μA typ Digital inputs = 0 V or VDD
1 μA max
220 μA typ Digital inputs = 5 V
380 μA max
ISS 0.002 μA typ Digital inputs = 0 V, 5 V or VDD
1 μA max
VDD/VSS ±4.5/±16.5 V min/max
1 Temperature range: Y version: −40°C to +125°C.
2 Guaranteed by design, not subject to production test.
ADG1408/ADG1409
Rev. B | Page 5 of 20
12 V SINGLE SUPPLY
VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 3.
Parameter +25°C
−40°C to
+85°C
−40°C to
+125°C1 Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 to VDD V
On Resistance (RON) 6 Ω typ VS = 0 V to 10 V, IS = −10 mA; see Figure 26
8 9.5 11.2 Ω max VDD = 10.8 V, VSS = 0 V
On Resistance Match 0.2 Ω typ VS = 0 V to 10 V, IS = −10 mA
Between Channels (ΔRON) 0.82 0.85 1.1 Ω max
On Resistance Flatness (RFLAT(ON)) 1.5 Ω typ VS = 0 V to 10 V, IS = −10 mA
2.5 2.5 2.8 Ω max
LEAKAGE CURRENTS VDD = 13.2 V
Source Off Leakage, IS (Off) ±0.04 nA typ VS = 1 V/10 V, VD = 10 V/1 V; see Figure 27
±0.2 ±0.6 ±5 nA max
Drain Off Leakage, ID (Off) ±0.04 nA typ VS = 1 V/10 V, VD = 10 V/1 V; see Figure 27
±0.45 ±1 ±37 nA max
Channel On Leakage, ID, IS (On) ±0.06 nA typ VS = VD = 1 V or 10 V; see Figure 28
±0.44 ±1.3 ±32 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current ±0.005 μA typ VIN = VGND or VDD
±0.1 μA max
Digital Input Capacitance, CIN 5 pF typ
DYNAMIC CHARACTERISTICS2
Transition Time, tTRANSITION 200 ns typ RL = 100 Ω, CL = 35 pF
260 330 380 ns max VS = 8 V; see Figure 29
Break-Before-Make Time Delay, tBBM 90 ns typ RL = 100 Ω, CL = 35 pF
40 ns min VS1 = VS2 = 8 V; see Figure 30
tON (EN) 160 ns typ RL = 100 Ω, CL = 35 pF
210 250 285 ns max VS = 8 V; see Figure 31
tOFF (EN) 115 ns typ RL = 100 Ω, CL = 35 pF
145 180 200 ns max VS = 8 V; see Figure 31
Charge Injection −12 pC typ VS = 6 V, RS = 0 Ω, CL = 1 nF; see Figure 32
Off Isolation −70 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 33
Channel-to-Channel Crosstalk −70 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 34
−3 dB Bandwidth RL = 50 Ω, CL = 5 pF; see Figure 35
ADG1408 36 MHz typ
ADG1409 72 MHz typ
Insertion Loss 0.5 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 35
CS (Off) 25 pF typ f = 1 MHz
CD (Off)
ADG1408 165 pF typ f = 1 MHz
ADG1409 80 pF typ f = 1 MHz
CD, CS (On)
ADG1408 200 pF typ f = 1 MHz
ADG1409 120 pF typ f = 1 MHz
ADG1408/ADG1409
Rev. B | Page 6 of 20
Parameter +25°C
−40°C to
+85°C
−40°C to
+125°C1 Unit Test Conditions/Comments
POWER REQUIREMENTS VDD = 13.2 V
IDD 0.002 μA typ Digital inputs = 0 V or VDD
1 μA max
220 μA typ Digital inputs = 5 V
380 μA max
VDD 5/16.5 V min/max VSS = 0 V, GND = 0 V
1 Temperature range for Y version: −40°C to +125°C.
2 Guaranteed by design, not subject to production test.
ADG1408/ADG1409
Rev. B | Page 7 of 20
5 V DUAL SUPPLY
VDD = +5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 4.
Parameter +25°C
−40°C to
+85°C
−40°C to
+125°C1 Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range VSS to VDD V
On Resistance (RON) 7 Ω typ VS = ±4.5 V, IS = −10 mA; see Figure 26
9 10.5 12 Ω max VDD = +4.5 V, VSS = −4.5 V
On Resistance Match Between 0.3 Ω typ VS = ±4.5 V, IS = −10 mA
Channels (ΔRON) 0.78 0.91 1.1 Ω max
On Resistance Flatness (RFLAT(ON)) 1.5 Ω typ VS = ±4.5 V; IS = −10 mA
2.5 2.5 3 Ω max
LEAKAGE CURRENTS VDD = +5.5 V, VSS −5.5 V =
Source Off Leakage, IS (Off) ±0.02 nA typ VS = ±4.5 V, VD = 4.5 V; see טFigure 27
±0.2 ±0.6 ±5 nA max
Drain Off Leakage, ID (Off) ±0.02 nA typ VS = ±4.5 V, VD = ט4.5 V; see Figure 27
±0.45 ±0.8 ±20 nA max
Channel On Leakage, ID, IS (On) ±0.04 nA typ VS = VD = ±4.5 V; see Figure 28
±0.3 ±1.1 ±22 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current ±0.005 μA typ VIN = VGND or VDD
±0.1 μA max
Digital Input Capacitance, CIN 5 pF typ
DYNAMIC CHARACTERISTICS2
Transition Time, tTRANSITION 330 ns typ RL = 100 Ω, CL = 35 pF
440 530 550 ns max VS = 5 V; see Figure 29
Break-Before-Make Time Delay, tBBM 100 ns typ RL = 100 Ω, CL = 35 pF
50 ns min VS1 = VS2 = 5 V; see Figure 30
tON (EN) 245 ns typ RL = 100 Ω, CL = 35 pF
330 400 440 ns max VS = 5 V; see Figure 31
tOFF (EN) 215 ns typ RL = 100 Ω, CL = 35 pF
285 335 370 ns max VS = 5 V; see Figure 31
Charge Injection –10 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 32
Off Isolation –70 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 33
Channel-to-Channel Crosstalk –70 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 34
Total Harmonic Distortion, THD + N 0.06 % typ RL = 110 Ω, 5 V p-p, f = 20 Hz to 20 kHz;
see Figure 36
−3 dB Bandwidth RL = 50 Ω, CL = 5 pF; see Figure 35
ADG1408 40 MHz typ
ADG1409 80 MHz typ
Insertion Loss 0.5 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 35
CS (Off) 20 pF typ f = 1 MHz
CD (Off)
ADG1408 130 pF typ f = 1 MHz
ADG1409 65 pF typ f = 1 MHz
CD, CS (On)
ADG1408 180 pF typ f = 1 MHz
ADG1409 120 pF typ f = 1 MHz
ADG1408/ADG1409
Rev. B | Page 8 of 20
Parameter +25°C
−40°C to
+85°C
−40°C to
+125°C1 Unit Test Conditions/Comments
POWER REQUIREMENTS VDD = +5.5 V, VSS = −5.5 V
IDD 0.001 μA typ Digital inputs = 0 V or VDD
1 μA max
ISS 0.001 μA typ Digital inputs = 0 V, 5 V or VDD
1 μA max
VDD/VSS ±4.5/±16.5 V min/max
1 Temperature range for Y version: −40°C to +125°C.
2 Guaranteed by design, not subject to production test.
CONTINUOUS CURRENT PER CHANNEL, S OR D
Table 5.
Parameter 25°C 85°C 125°C Unit Test Conditions/Comments
CONTINUOUS CURRENT, S or D1
15 V Dual Supply VDD = +13.5 V, VSS = −13.5 V
ADG1408 190 105 50 mA max
ADG1409 140 85 45 mA max
12 V Single Supply VDD = 10.8 V, VSS = 0 V
ADG1408 160 95 50 mA max
ADG1409 120 75 40 mA max
5 V Dual Supply VDD = +4.5 V, VSS = −4.5 V
ADG1408 155 90 45 mA max
ADG1409 115 70 40 mA max
1 Guaranteed by design, not subject to production test.
ADG1408/ADG1409
Rev. B | Page 9 of 20
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 6.
Parameter Rating
VDD to VSS 35 V
VDD to GND −0.3 V to +25 V
VSS to GND +0.3 V to −25 V
Analog Inputs, Digital Inputs1 VSS − 0.3 V to VDD + 0.3 V
or 30 mA, whichever
occurs first
Continuous Current, S or D Table 5 data + 10%
Peak Current, S or D (Pulsed at 1 ms,
10% Duty Cycle Maximum)
350 mA
Operating Temperature Range
Industrial (Y Version) −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
Reflow Soldering Peak Temperature
(Pb-Free)
260(+0/−5)°C
1 Overvoltages at A, EN, S, or D are clamped by internal diodes. Current should
be limited to the maximum ratings given.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Only one absolute maximum rating can be applied at any
one time.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 7. Thermal Resistance
Package Type θJA θ
JC Unit
16-Lead TSSOP 150.4 50 °C/W
16-Lead LFCSP 30.4 °C/W
ESD CAUTION
ADG1408/ADG1409
Rev. B | Page 10 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
EN
VSS
S1
S4
S3
S2
A0
A2
GND
VDD
S7
DS
S6
S5
A1
ADG1408
TOP VIEW
(Not to Scale)
8
0
4861-002
Figure 2. ADG1408 Pin Configuration (TSSOP)
PIN 1
INDICATOR
1V
SS
NOTES
1. THE EXPOSED PAD IS
CONNECTED INTERNALLY. FOR
INCREASED RELIABILITY OF THE
SOLDER JOINTS AND MAXIMUM
THERMAL CAPABILITY, IT IS
RECOMMENDED THAT THE PAD BE
SOLDERED TO THE SUBSTRATE, V
SS
.
2S1
3S2
4S3
11 V
DD
12 GND
10 S5
9S6
5
S4
6
D
7
S8
8
S7
15 A0
16 EN
14 A1
13 A2
TOP VIEW
(Not to Scale)
ADG1408
04861-003
Figure 3. ADG1408 Pin Configuration (LFCSP)
Table 8. ADG1408 Pin Function Descriptions
Pin No.
TSSOP LFCSP Mnemonic Description
1 15 A0 Logic Control Input.
2 16 EN Active High Digital Input. When low, the device is disabled and all switches are off. When high,
Ax logic inputs determine on switches.
3 1 VSS Most Negative Power Supply Potential. In single supply applications, it can be connected
to ground.
4 2 S1 Source Terminal 1. Can be an input or an output.
5 3 S2 Source Terminal 2. Can be an input or an output.
6 4 S3 Source Terminal 3. Can be an input or an output.
7 5 S4 Source Terminal 4. Can be an input or an output.
8 6 D Drain Terminal. Can be an input or an output.
9 7 S8 Source Terminal 8. Can be an input or an output.
10 8 S7 Source Terminal 7. Can be an input or an output.
11 9 S6 Source Terminal 6. Can be an input or an output.
12 10 S5 Source Terminal 5. Can be an input or an output.
13 11 VDD Most Positive Power Supply Potential.
14 12 GND Ground (0 V) Reference.
15 13 A2 Logic Control Input.
16 14 A1 Logic Control Input.
EP Exposed Pad
The exposed pad is connected internally. For increased reliability of the solder joints and
maximum thermal capability, it is recommended that the pad be soldered to the substrate, VSS.
Table 9. ADG1408 Truth Table
A2 A1 A0 EN On Switch
X X X 0 None
0 0 0 1 1
0 0 1 1 2
0 1 0 1 3
0 1 1 1 4
1 0 0 1 5
1 0 1 1 6
1 1 0 1 7
1 1 1 1 8
ADG1408/ADG1409
Rev. B | Page 11 of 20
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
EN
V
SS
S1A
S4A
S3A
S2A
A0
GND
V
DD
S1B
S4B
DA DB
S3B
S2B
A1
ADG1409
TOP VIEW
(Not to Scale)
0
4861-004
Figure 4. ADG1409 Pin Configuration (TSSOP)
PIN 1
INDICATOR
1V
SS
2S1A
3S2A
4S3A
11 S1B
12 V
DD
10 S2B
9S3B
5
S4A
6
DA
7
DB
8
S4B
15 A0
16 EN
14 A1
13 GND
TOP VIEW
(Not to Scale)
ADG1409
04861-005
NOTES
1. THE EXPOSED PAD IS
CONNECTED INTERNALLY. FOR
INCREASED RELIABILITY OF THE
SOLDER JOINTS AND MAXIMUM
THERMAL CAPABILITY, IT IS
RECOMMENDED THAT THE PAD BE
SOLDERED TO THE SUBSTRATE,
V
SS
.
Figure 5. ADG1409 Pin Configuration (LFCSP)
Table 10. ADG1409 Pin Function Descriptions
Pin No.
TSSOP LFCSP Mnemonic Description
1 15 A0 Logic Control Input.
2 16 EN Active High Digital Input. When low, the device is disabled and all switches are off. When high,
Ax logic inputs determine on switches.
3 1 VSS Most Negative Power Supply Potential. In single supply applications, it can be connected
to ground.
4 2 S1A Source Terminal 1A. Can be an input or an output.
5 3 S2A Source Terminal 2A. Can be an input or an output.
6 4 S3A Source Terminal 3A. Can be an input or an output.
7 5 S4A Source Terminal 4A. Can be an input or an output.
8 6 DA Drain Terminal A. Can be an input or an output.
9 7 DB Drain Terminal B. Can be an input or an output.
10 8 S4B Source Terminal 4B. Can be an input or an output.
11 9 S3B Source Terminal 3B. Can be an input or an output.
12 10 S2B Source Terminal 2B. Can be an input or an output.
13 11 S1B Source Terminal 1B. Can be an input or an output.
14 12 VDD Most Positive Power Supply Potential.
15 13 GND Ground (0 V) Reference.
16 14 A1 Logic Control Input.
EP Exposed
Pad
The exposed pad is connected internally. For increased reliability of the solder joints and maximum
thermal capability, it is recommended that the pad be soldered to the substrate, VSS.
Table 11. ADG1409 Truth Table
A1 A0 EN On Switch Pair
X X 0 None
0 0 1 1
0 1 1 2
1 0 1 3
1 1 1 4
ADG1408/ADG1409
Rev. B | Page 12 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
5
6
0
–16.5 15.5
SOURCE OR DRAIN VOLTAGE (V)
ON RESISTANCE (Ω)
04861-006
4
3
2
1
–12.5 –8.5 –4.5 –0.5 3.5 7.5 11.5
VDD = +15V, VSS = –15V
VDD = +13.5V, VSS = –13.5V
VDD = +12V, VSS = –12V
VDD = +10V, VSS = –10V
VDD = +16.5V, VSS = –16.5V
TA = 25°C
Figure 6. On Resistance vs. VD, VS; Dual Supply
5
9
6
7
8
0
–7 –4–5–6 7
SOURCE OR DRAIN VOLTAGE (V)
ON RESISTANCE (Ω)
04861-036
4
3
2
1
–3 –2 –1 0 54312 6
VDD = +7V, VSS = –7V
VDD = +5.5V, VSS = –5.5V
VDD = +5V, VSS = –5V
VDD = +4.5V, VSS = –4.5V
TA = 25°C
Figure 7. On Resistance vs. VD, VS; Dual Supply
12
13
0
0
SOURCE OR DRAIN VOLTAGE (V)
ON RESISTANCE (Ω)
04861-007
11
10
9
8
7
6
5
4
3
2
1
12345678910111213
VDD = 12V
VDD = 13.2V
VDD = 10.8V
VDD = 8V
VDD = 5V
TA = 25°C
VSS = 0V
Figure 8. On Resistance vs. VD, VS; Single Supply
7
0
–15
SOURCE OR DRAIN VOLTAGE (V)
ON RESISTANCE (Ω)
04861-008
15
TA = +25°C
TA = +85°C
TA = –40°C
TA = +125°C
VDD = +15V
VSS = –15V
6
5
4
3
2
1
–10 –5 0 5 10
Figure 9. On Resistance vs. VD, VS for Different Temperatures;
15 V Dual Supply
12
0
–5
SOURCE OR DRAIN VOLTAGE (V)
ON RESISTANCE (Ω)
04861-009
5
10
8
6
4
2
–4 –3 –2 –1 0 1 2 3 4
TA = +25°C
TA = +85°C
TA = –40°C
TA = +125°C
VDD = +5V
VSS = –5V
Figure 10. On Resistance vs. VD, VS for Different Temperatures;
5 V Dual Supply
10
0
0
SOURCE OR DRAIN VOLTAGE (V)
ON RESISTANCE (Ω)
04861-010
12
9
8
7
6
5
4
3
2
1
246810
TA = +25°C
TA = +85°C
TA = –40°C
TA = +125°C
VDD = 12V
VSS = 0V
Figure 11. On Resistance vs. VD, VS for Different Temperatures;
12 V Single Supply
ADG1408/ADG1409
Rev. B | Page 13 of 20
1.0
–1.0
0
TEMPERATURE (°C)
LEAKAGE CURRENT (nA)
04861-011
80
IS (OFF) +–
ID (OFF) +–
IS (OFF) –+
ID (OFF) –+
ID, IS (ON) ++
ID, IS (ON) ––
VDD = +15V
VSS = –15V
VBIAS = +10V/–10V
0.8
0.6
0
0.2
0.4
–0.2
–0.4
–0.6
–0.8
10 20 30 40 50 60 70
Figure 12. Leakage Current vs. Temperature;
15 V Dual Supply
14
–4
0
TEMPERATURE (°C)
LEAKAGE CURRENT (nA)
04861-012
120
IS (OFF) +–
ID (OFF) +–
IS (OFF) –+
ID (OFF) –+
ID, IS (ON) ++
ID, IS (ON) ––
VDD = +15V
VSS = –15V
VBIAS = +10V/–10V
8
10
12
4
6
2
0
–2
20 40 60 80 100
Figure 13. Leakage Current vs. Temperature;
15 V Dual Supply
10
–1
0
TEMPERATURE (°C)
LEAKAGE CURRENT (nA)
04861-015
120
IS (OFF) +–
ID (OFF) +–
IS (OFF) –+
ID (OFF) –+
ID, IS (ON) ++
ID, IS (ON) ––
VDD = +5V
VSS = –5V
VBIAS = +4.5V/–4.5V
9
8
7
4
5
6
3
2
1
0
20 40 60 80 100
Figure 14. Leakage Current vs. Temperature;
5 V Dual Supply
18
16
–2
0
TEMPERATURE (°C)
LEAKAGE CURRENT (nA)
04861-013
120
IS (OFF) +–
ID (OFF) +–
IS (OFF) –+
ID (OFF) –+
ID, IS (ON) ++
ID, IS (ON) ––
VDD = 12V
VSS = 0V
VBIAS = 1V/10V
10
12
14
6
8
4
2
0
20 40 60 80 100
Figure 15. Leakage Current vs. Temperature;
12 V Single Supply
70
0
01
LOGIC, AX (V)
IDD (µA)
4
60
50
40
30
20
10
2 4 6 8 10 12
VDD = +15V
VSS = –15V
VDD = +12V
VSS = 0V
VDD = +5V
VSS = –5V
IDD PER CHANNEL
TA = 25°C
04861-034
Figure 16. Positive Supply Current vs. Logic Level
200
–200
–15 15
V
S
(V)
CHARGE INJECTION (pC)
T
A
= 25°C
150
100
50
0
–50
–100
–150
–10 –5 0 5 10
V
DD
= +15V
V
SS
= –15V
V
DD
= +12V
V
SS
= 0V
V
DD
= +5V
V
SS
= –5V
04861-014
Figure 17. Charge Injection vs. Source Voltage
ADG1408/ADG1409
Rev. B | Page 14 of 20
450
0
–40 120
TEMPERATURE (°C)
TIME (ns)
400
350
300
250
200
150
100
50
–20 0 20 40 60 80 100
VDD = +15V
VSS = –15V
VDD = 12V
VSS = 0V
VDD = +5V
VSS = –5V
04861-033
Figure 18. Transition Time vs. Temperature
0
–110
1k 1G
FREQUENCY (Hz)
OFF ISOLATION (dB)
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
10k 100k 1M 10M 100M
VDD = +15V
VSS = –15V
TA = 25°C
04861-016
Figure 19. Off Isolation vs. Frequency
0
–110
1k 1G
FREQUENCY (Hz)
CROSSTALK (dB)
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
10k 100k 1M 10M 100M
VDD = +15V
VSS = –15V
TA = 25°C
04861-017
Figure 20. ADG1408 Crosstalk vs. Frequency
0
–110
1k 1G
FREQUENCY (Hz)
CROSSTALK (dB)
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
10k 100k 1M 10M 100M
VDD = +15V
VSS = –15V
TA = 25°C
ADJACENT
CHANNEL
NONADJACENT
CHANNEL
04861-018
Figure 21. ADG1409 Crosstalk vs. Frequency
0
–4.0
100 100M
FREQUENCY (Hz)
BANDWIDTH (dB)
1k 10k 100k 1M 10M
V
DD
= +15V
V
SS
= –15V
T
A
= 25°C
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
04861-019
Figure 22. ADG1408 On Response vs. Frequency
0
–4.0
100 1G100M
FREQUENCY (Hz)
BANDWIDTH (dB)
1k 10k 100k 1M 10M
V
DD
= +15V
V
SS
= –15V
T
A
= 25°C
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
04861-031
–3.5
Figure 23. ADG1409 On Response vs. Frequency
ADG1408/ADG1409
Rev. B | Page 15 of 20
0
10 100k
FREQUENCY (Hz)
THD + N (%)
0.09
0.10
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
100 1k 10k
LOAD = 110Ω
T
A
= 25°C
V
DD
= +5V, V
SS
= –5V, V
S
= +5V p-p
V
DD
= +15V, V
SS
= –15V, V
S
= +15V p-p
04861-032
Figure 24. Total Harmonic Distortion Plus Noise vs. Frequency
0
–110
100 1k 10M
FREQUENCY (Hz)
ACPSRR (dB)
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
10k 100k 1M
VDD = +15V
VSS = –15V
TA = 25°C
V p-p = 0.63V
04861-035
NO DECOUPLING
CAPACITORS
DECOUPLING
CAPACITORS
ON SUPPLIES
Figure 25. AC Power Supply Rejection Ratio vs. Frequency
ADG1408/ADG1409
Rev. B | Page 16 of 20
TERMINOLOGY
RON
Ohmic resistance between D and S.
ΔRON
Difference between the RON of any two channels.
RFLAT(ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured.
IS (Off)
Source leakage current when the switch is off.
ID (Off)
Drain leakage current when the switch is off.
ID, IS (On)
Channel leakage current when the switch is on.
VD (VS)
Analog voltage on Terminal D and Terminal S.
CS (Off)
Channel input capacitance for off condition.
CD (Off)
Channel output capacitance for off condition.
CD, CS (On)
On switch capacitance.
CIN
Digital input capacitance.
tON (EN)
Delay time between the 50% and 90% points of the digital input
and switch on condition.
tOFF (EN)
Delay time between the 50% and 90% points of the digital input
and switch off condition.
tTRANSITION
Delay time between the 50% and 90% points of the digital
inputs and the switch on condition when switching from one
address state to another.
tBBM
Off time measured between the 80% point of both switches
when switching from one address state to another.
VINL
Maximum input voltage for Logic 0.
VINH
Minimum input voltage for Logic 1.
IINL, IINH
Input current of the digital input.
IDD
Positive supply current.
ISS
Negative supply current.
Off Isolation
A measure of unwanted signal coupling through an off channel.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
Bandwidth
Frequency at which the output is attenuated by 3 dB.
On Response
Frequency response of the on switch.
Total Harmonic Distortion Plus Noise (THD + N)
Ratio of the harmonic amplitude plus noise of the signal to the
fundamental.
AC Power Supply Rejection Ratio (ACPSRR)
A measure of the ability of a part to avoid coupling noise and
spurious signals that appear on the supply voltage pin to the
output of the switch. The dc voltage on the device is modulated
by a sine wave of 0.62 V p-p. The ratio of the amplitude of
signal on the output to the amplitude of the modulation is
the ACPSRR.
ADG1408/ADG1409
Rev. B | Page 17 of 20
TEST CIRCUITS
I
DS
SD
V
S
V
04861-020
Figure 26. On Resistance
SD
V
S
A A
V
D
I
S
(OFF) I
D
(OFF)
04861-021
Figure 27. Off Leakage
SD
A
V
D
I
D
(ON)
NC
NC = NO CONNECT
04861-022
Figure 28. On Leakage
3V
0V
OUTPUT
t
r < 20ns
t
f < 20ns
ADDRESS
DRIVE (VIN)
t
TRANSITION
t
TRANSITION
50% 50%
90%
90%
OUTPUT
ADG1408
1
A0
A1
A2
50Ω
100Ω
GND
S1
S2 TO S7
S8
D
35pF
VIN
2.4V EN
V
DD
V
SS
VDD VSS
VS1
VS8
1SIMILAR CONNECTION FOR ADG1409.
04861-023
Figure 29. Address to Output Switching Times, tTRANSITION
OUTPUT
ADG1408
1
A0
A1
A2
50Ω
100Ω
GND
S1
S2 TO S7
S8
D
35pF
V
IN
2.4V EN
V
DD
V
SS
V
DD
V
SS
V
S
1
SIMILAR CONNECTION FOR ADG1409.
3V
0V
OUTPUT
80% 80%
A
DDRESS
DRIVE (V
IN
)
t
BBM
04861-024
Figure 30. Break-Before-Make Delay, tBBM
OUTPUT
ADG1408
1
A0
A1
A2
50Ω100Ω
GND
S1
S2 TO S8
D
35pF
V
IN
EN
V
DD
V
SS
V
DD
V
SS
V
S
1
SIMILAR CONNECTION FOR ADG1409.
3V
0V
OUTPUT
50% 50%
t
OFF
(EN)
t
ON
(EN)
0.9V
O
0.9V
O
ENABLE
DRIVE (V
IN
)
04861-025
Figure 31. Enable Delay, tON (EN), tOFF (EN)
ADG1408/ADG1409
Rev. B | Page 18 of 20
3V
V
IN
V
OUT
Q
INJ
= C
L
× ΔV
OUT
ΔV
OUT
DS
EN
GND C
L
1nF
V
OUT
V
IN
R
S
V
S
V
DD
V
SS
V
DD
V
SS
A0
A1
A2
ADG1408
1
1
SIMILAR CONNECTION FOR ADG1409.
04861-026
Figure 32. Charge Injection
VOUT
50Ω
NETWORK
ANALYZER
RL
50Ω
S
D
50Ω
OFF ISOLATION = 20 log
VOUT
VS
VS
VDD VSS
0.1µF
V
DD
0.1µF
VSS
GND
04861-027
Figure 33. Off Isolation
CHANNEL-TO-CHANNEL CROSSTALK = 20 log V
OUT
GND
S1
D
S2
V
OUT
NETWORK
ANALYZER
R
L
50Ω
R
50Ω
V
S
V
S
V
DD
V
SS
0.1µF
V
DD
0.1µF
V
SS
04861-028
Figure 34. Channel-to-Channel Crosstalk
V
OUT
50Ω
NETWORK
ANALYZER
R
L
50Ω
S
D
INSERTION LOSS = 20 log
V
OUT
WITH SWITCH
V
OUT
WITHOUT SWITCH
V
S
V
DD
V
SS
0.1µF
V
DD
0.1µF
V
SS
GND
04861-029
Figure 35. Insertion Loss
V
OUT
R
S
AUDIO PRECISION
R
L
10kΩ
IN
V
IN
S
D
V
S
V p-p
V
DD
V
SS
0.1µF
V
DD
0.1µF
V
SS
GND
04861-030
Figure 36. THD + Noise
ADG1408/ADG1409
Rev. B | Page 19 of 20
OUTLINE DIMENSIONS
16 9
81
PIN 1
SEATING
PLANE
8°
0°
4.50
4.40
4.30
6.40
BSC
5.10
5.00
4.90
0.65
BSC
0.15
0.05
1.20
MAX
0.20
0.09 0.75
0.60
0.45
0.30
0.19
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 37. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
COMPLIANT
TO
JEDEC STANDARDS MO-220-VGGC.
1
0.65
BSC
0.60 MAX
PIN 1
INDICATOR
1.95 BCS
0.50
0.40
0.30
0.25 MIN
3.75
BSC SQ
TOP VIEW
12° MAX 0.80 MAX
0.65 TYP
SEATING
PLANE
PIN 1
INDI
C
ATOR
COPLANARITY
0.08
1.00
0.85
0.80
0.30
0.23
0.18
0.05 MAX
0.02 NOM
0.20 REF
4.00
BSC SQ
2.65
2.50 SQ
2.35
16
5
13
8
9
12
4
EXPOSED
PAD
BOTTOM VIEW
031006-A
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
Figure 38. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
4 mm × 4 mm, Very Thin Quad (CP-16-13)
Dimensions shown in millimeters
ADG1408/ADG1409
Rev. B | Page 20 of 20
ORDERING GUIDE
Model Temperature Range Package Description Package Option
ADG1408YRUZ1 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG1408YRUZ-REEL1 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG1408YRUZ-REEL71 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG1408YCPZ-REEL71 −40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] CP-16-13
ADG1409YRUZ1 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG1409YRUZ-REEL1 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG1409YRUZ-REEL71 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG1409YCPZ-REEL71 −40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] CP-16-13
1 Z = RoHS Compliant Part.
©2006–2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04861-0-3/09(B)
