August 1998 NDT3055L N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features 4 A, 60 V. RDS(ON) = 0.100 @ VGS = 10 V, RDS(ON) = 0.120 @ VGS = 4.5 V. These logic level N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance, and withstand high energy pulse in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as DC motor control and DC/DC conversion where fast switching, low in-line power loss, and resistance to transients are needed. SuperSOTTM-3 Low drive requirements allowing operation directly from logic drivers. VGS(TH) < 2V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. SuperSOTTM-8 SuperSOTTM-6 D D SO-8 D D S S D SOT-223 SOIC-16 SOT-223 D G G S SOT-223* G G S (J23Z) Absolute Maximum Ratings TA = 25oC unless otherwise noted Symbol Parameter NDT3055L Units VDSS Drain-Source Voltage 60 V VGSS Gate-Source Voltage - Continuous 20 V ID Maximum Drain Current - Continuous 4 A (Note 1a) - Pulsed PD 25 Maximum Power Dissipation (Note 1a) (Note 1b) (Note 1c) TJ,TSTG Operating and Storage Temperature Range 3 W 1.3 1.1 -65 to 150 C THERMAL CHARACTERISTICS RJA Thermal Resistance, Junction-to-Ambient (Note 1a) 42 C/W RJC Thermal Resistance, Junction-to-Case (Note 1) 12 C/W * Order option J23Z for cropped center drain lead. (c) 1998 Fairchild Semiconductor Corporation NDT3055L Rev.A1 Electrical Characteristics (TA = 25 OC unless otherwise noted ) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 A 60 V BVDSS/TJ Breakdown Voltage Temp. Coefficient ID = 250 A, Referenced to 25 C IDSS Zero Gate Voltage Drain Current VDS = 60 V, VGS = 0 V IGSSF Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS = 0 V -100 nA o mV/o C 55 TJ =125C ON CHARACTERISTICS 1 A 50 A 100 nA (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 A VGS(th)/TJ Gate Threshold Voltage Temp. Coefficient ID = 250 A, Referenced to 25 oC 1 RDS(ON) Static Drain-Source On-Resistance VGS = 10 V, ID = 4 A VGS = 4.5 V, ID = 3.7 A On-State Drain Current VGS = 5 , VDS = 10 V gFS Forward Transconductance VDS = 5 V, ID = 4 A 2 V mV /oC -4 TJ =125C ID(ON) 1.6 0.07 0.1 0.125 0.18 0.103 0.12 10 A 7 S DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25, VGS = 0 V, f = 1.0 MHz 345 pF 110 pF 30 pF SWITCHING CHARACTERISTICS (Note 2) tD(on) Turn - On Delay Time tr Turn - On Rise Time tD(off) Turn - Off Delay Time tf Turn - Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 25, ID = 1 A, VGS = 10 V, RGEN = 6 VDS = 40 V, ID = 4 A, VGS = 10 V 5 20 ns 7.5 20 ns 20 50 ns 7 20 ns 13 20 nC 1.7 nC 3.2 nC DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS Maximum Continuous Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 2.5 A 0.8 (Note 2) 2.5 A 1.2 V Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. a. 42oC/W when mounted on a 1 in2 pad of b. 95oC/W when mounted on a 2oz Cu. pad of 2oz Cu. 0.066 in2 c. 110oC/W when mounted on a 0.00123 in2 pad of 2oz Cu. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0% NDT3055L Rev.A1 Typical Electrical Characteristics 2 VGS= 10V 6.0V 20 R DS(ON) , NORMALIZED 5.0V 4.5V 15 4.0V 10 3.5V 5 3.0V 0 0 1 2 3 4 DRAIN-SOURCE ON-RESISTANCE I D , DRAIN-SOURCE CURRENT (A) 25 1.8 VGS = 4.0V 1.6 4.5V 5.0V 1.4 6.0V 1.2 8.0V 10V 1 0.8 5 0 5 10 15 I D, DRAIN CURRENT (A) VDS , DRAIN-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. 0.28 R DS(ON) , ON-RESISTANCE (OHM) R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE I D = 2A I D = 4.0 A VGS = 10 V 1.4 1.2 1 0.8 0.6 -50 0.24 0.2 0.16 TA = 125C 0.12 0.08 25C 0.04 0 -25 0 25 50 75 100 125 150 2 4 Figure 3. On-Resistance Variation with Temperature. 8 10 Figure 4. On-Resistance Variation with Gate-to- Source Voltage. 10 30 8 IS , REVERSE DRAIN CURRENT (A) TJ = -55C 25C 125C VDS = 5V ID , DRAIN CURRENT (A) 6 V GS , GATE TO SOURCE VOLTAGE (V) TJ , JUNCTION TEMPERATURE (C) 6 4 2 0 25 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.8 1.6 20 1 1.5 2 2.5 3 3.5 4 4.5 VGS , GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 5 10 V GS = 0V 1 TA = 125C 0.1 25C -55C 0.01 0.001 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 V SD , BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Current and Temperature. NDT3055L Rev.A1 Typical Electrical Characteristics (continued) I D = 4A 500 VDS = 10V 30V 8 CAPACITANCE (pF) VGS , GATE-SOURCE VOLTAGE (V) 1000 10 40V 6 4 Ciss 200 Coss 100 50 2 0 Crss f = 1 MHz VGS = 0V 20 0 2 4 6 8 10 12 10 0.1 14 0.3 Qg , GATE CHARGE (nC) Figure 7. Gate Charge Characteristics. 1m 10m 10 1s 10 s DC 0.3 VGS = 10V SINGLE PULSE R JA = 110o C/W TA = 25C 0.2 0.5 0m 0u 30 60 SINGLE PULSE RJA =110C/W TA = 25C s s 60 POWER (W) N) S(O RD 1 s s 40 20 1 2 5 10 30 0 0.001 60 100 0.01 VDS , DRAIN-SOURCE VOLTAGE (V) 0.1 1 10 100 300 SINGLE PULSE TIME (SEC) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE ID , DRAIN CURRENT (A) 10 IT LIM 3 0.01 0.1 10 80 10 0.03 4 Figure 8. Capacitance Characteristics. 50 0.1 1 V DS , DRAIN TO SOURCE VOLTAGE (V) Figure 10. Single Pulse Maximum Power Dissipation. 1 0.5 D = 0.5 0.2 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 R JA (t) = r(t) * R JA R JA = 110 C/W P(pk) 0.01 t1 0.005 Single Pulse 0.002 0.001 0.0001 t2 TJ - TA = P * R JA (t) Duty Cycle, D = t1 / t 2 0.001 0.01 0.1 1 10 100 300 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design. NDT3055L Rev.A1 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 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