5962-9076501M2A - NATIONAL SEMICONDUCTOR

DS96F172M,DS96F174C,DS96F174M

DS96F172M/DS96F174C/DS96F174M EIA-485/EIA-422 Quad Differential Drivers

Literature Number: SNOSC39E

DS96F172M/DS96F174C/

DS96F174M

OBSOLETE

September 22, 2011

EIA-485/EIA-422 Quad Differential Drivers

General Description

The DS96F172 and the DS96F174 are high speed quad dif-

ferential line drivers designed to meet EIA-485 Standards.

The DS96F172 and the DS96F174 offer improved perfor-

mance due to the use of L-FAST bipolar technology. The use

of LFAST technology allows the DS96F172 and DS96F174

to operate at higher speeds while minimizing power con-

sumption.

The DS96F172 and the DS96F174 have TRI-STATE® out-

puts and are optimized for balanced multipoint data bus trans-

mission at rates up to 15 Mbps. The drivers have wide positive

and negative common mode range for multipoint applications

in noisy environments. Positive and negative current-limiting

is provided which protects the drivers from line fault conditions

over a +12V to −7.0V common mode range. A thermal shut-

down feature is also provided. The DS96F172 features an

active high and active low Enable, common to all four drivers.

The DS96F174 features separate active high Enables for

each driver pair.

Features

■Meets EIA-485 and EIA-422 standards

■Monotonic differential output switching

■TRI-STATE outputs

■Designed for multipoint bus transmission

■Common mode output voltage range: −7.0V to +12V

■Operates from single +5.0V supply

■Reduced power consumption

■Thermal shutdown protection

■DS96F172 and DS96F174 are lead and function

compatible with the SN75172/174 or the AM26LS31/

MC3487

■Military temperature range available

■Qualified for MIL-STD-883C

■Standard military drawings available (SMD)

■Available in DIP (J), LCC (E), and Flatpak (W) packages

Logic Diagrams

DS96F172

962514

DS96F174

962515

Function Tables

DS96F172

(Each Driver)

Input Enable Outputs

A E E Y Z

H H X H L

L H X L H

H X L H L

L X L L H

X L H Z Z

DS96F174

Input Enable Outputs

A E Y Z

H H H L

L H L H

X L Z Z

H = High Level

L = Low Level

X = Don't Care

Z = High Impedance (Off)

TRI-STATE® is a registered trademark of National Semiconductor Corporation.

9625 Version 11 Revision 5 Print Date/Time: 2011/09/22 08:31:42

DS96F172M/DS96F174C/DS96F174M EIA-485/EIA-422 Quad Differential Drivers

Absolute Maximum Ratings

COMMERCIAL (Note 2)

Specifications for the 883 version of this product are list-

ed separately on the following pages.

Storage Temperature Range (TSTG)−65°C to +175°C

Lead Temperature (Soldering, 60 sec.) 300°C

Maximum Package Power Dissipation (Note 1) at 25°C

Ceramic DIP (J) 1500 mW

Supply Voltage 7.0V

Enable Input Voltage 5.5V

Recommended Operating

Conditions

Min Typ Max Units

Supply Voltage (VCC)

DS96F174C 4.75 5.0 5.25 V

Common Mode −7.0 +12.0 V

Output Voltage (VOC)

Output Current HIGH (IOH) −60 mA

Output Current LOW (IOL) 60 mA

Operating Temperature (TA)

DS96F174C 0 +70 °C

Note 1: Derate “J” package 10 mW/°C above 25°C.

Electrical Characteristics (Note 3, Note 4)

Over recommended supply voltage and operating temperature range, unless otherwise specified

Symbol Parameter Conditions Min Typ Max Units

(Note 2)

VIH Input Voltage HIGH 2.0 V

VIL Input Voltage LOW TA = 0°C to +70°C 0.8 V

TA = −55°C to +125°C 0.7

VOH Output Voltage HIGH IOH = −33 mA TA = 0°C to +70°C 3.0 V

VOL Output Voltage LOW IOL = 33 mA TA = 0°C to +70°C 2.0 V

VIC Input Clamp Voltage II = −18 mA −1.5 V

|VOD1| Differential Output Voltage IO = 0 mA 6.0 V

|VOD2| Differential Output Voltage RL = 54Ω, Figure 1 TA = −55°C 1.2 2.0

1.5

RL = 100Ω, Figure 1 2.0 2.3

VOD Differential Output Voltage Figure 2 TA = 0°C to +70°C 1.0 V

Δ|VOD|Change in Magnitude of Differential RL = 54Ω or 100Ω, −40°C to +125°C ±0.2 V

Output Voltage (Note 5)Figure 1 −55°C to +125°C ±0.4

VOC Common Mode Output Voltage

(Note 6)

RL = 54Ω or 100Ω, Figure 1 3.0 V

Δ|VOC|Change in Magnitude of Common RL = 54Ω or 100Ω, Figure 1 ±0.2 V

Mode Output Voltage (Note 5)

IOOutput Current with Power Off VCC = 0V, VO = −7.0V to +12V ±50 μA

IOZ High Impedance State Output Current VO = −7.0V to +12V ±20 ±50 μA

IIH Input Current HIGH VI = 2.4V 20 μA

IIL Input Current LOW VI = 0.4V −50 μA

IOS Short Circuit Output Current VO = −7.0V −250

(Note 7)VO = 0V −150 mA

VO = VCC 150

VO = +12V 250

ICC Supply Current (All Drivers) No Load Outputs Enabled 50 mA

ICCX Outputs Disabled 30

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9625 Version 11 Revision 5 Print Date/Time: 2011/09/22 08:31:42

DS96F172M/DS96F174C/DS96F174M

COMMERCIAL

Switching Characteristics

VCC = 5.0V, TA = 25°C

Symbol Parameter Conditions Min Typ Max Units

tDD Differential Output Delay Time RL = 60Ω, Figure 3 15 20 ns

tTD Differential Output Transition Time 15 22 ns

tPLH Propagation Delay Time, RL = 27Ω, Figure 4 12 16 ns

Low-to-High Level Output

tPHL Propagation Delay Time, 12 16 ns

High-to-Low Level Output

tZH Output Enable Time to High Level RL = 110Ω, FIgure 4 25 32 ns

tZL Output Enable Time to Low Level RL = 110Ω, Figure 6 25 32 ns

tHZ Output Disable Time from High Level RL = 110Ω, Figure 5 25 30 ns

tLZ Output Disable Time from Low Level RL = 110Ω, Figure 6 20 25 ns

tLZL Output Disable Time from Low Level Figure 6 300 ns

with Load Resistor to GND (Note 8)

tSKEW Driver Output to Output RL = 60Ω 1.0 4.0 ns

Note 2: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices

should be operated at these limits. The tables of “Electrical Characteristics” provide conditions for actual device operation.

Note 3: Unless otherwise specified min/max limits apply across the 0°C to +70°C range for the DS96F174C. All typicals are given for VCC = 5V and TA = 25°C.

Note 4: All currents into the device pins are positive; all currents out of the device pins are negative. All voltages are reference to ground unless otherwise specified.

Note 5: Δ|VOD| and Δ|VOC| are the changes in magnitude of VOD and VOC respectively, that occur when the input is changed from a high level to a low level.

Note 6: In EIA-422A and EIA-485 standards, VOC, which is the average of the two output voltages with respect to ground, is called output offset voltage, VOS.

Note 7: Only one output at a time should be shorted.

Note 8: For more information see Application Bulletin, contact Product Marketing.

Order Number: DS96F174CJ

DS96F174CN

NS Package Number J16A or N16E

3 www.national.com

9625 Version 11 Revision 5 Print Date/Time: 2011/09/22 08:31:42

DS96F172M/DS96F174C/DS96F174M

Absolute Maximum Ratings

MIL-STD-883C (Note 2)

For complete Military Specifications, refer to the appro-

priate SMD or MDS.

Storage Temperature Range (TSTG)−65°C to +175°C

Lead Temperature (Soldering, 60 sec.) 300°C

Maximum Package Power Dissipation (Note 9) at 25°C

Ceramic LCC (E) 2000 mW

Ceramic DIP (J) 1800 mW

Ceramic Flatpak (W) 1000 mW

Supply Voltage 7.0V

Enable Input Voltage 5.5V

Recommended Operating

Conditions

Min Typ Max Units

Supply Voltage (VCC)

DS96F172M/DS96F174M 4.50 5.0 5.50 V

Common Mode −7.0 +12.0 V

Output Voltage (VOC)

Output Current HIGH (IOH) −60 mA

Output Current LOW (IOL) 60 mA

Operating Temperature (TA)

DS96F172M/DS96F174M −55 +125

Note 9: Above TA = 25°C, derate “E” package 13.4, “J” package 12.5, “W”

package 7.1 mW/°C

Electrical Characteristics (Note 3, Note 4)

Over recommended supply voltage and operating temperature range unless otherwise specified

Symbol Parameter Conditions Min Max Units

VIH Input Voltage HIGH 2.0 V

VIL Input Voltage LOW TA = 25°C 0.8 V

TA = −55°C, or +125°C 0.7

VIC Input Clamp Voltage II = −18 mA −1.5 V

|VOD1| Differential Output Voltage IO = 0 mA 6.0 V

|VOD2| Differential Output Voltage RL = 54Ω, VCC = 4.5V TA = −55°C 1.2

Figure 1 TA = 25°C, or +125°C 1.5 V

RL = 100Ω, VCC = 4.5V, Figure 1 2.0

Δ|VOD|Change in Magnitude of Differential RL = 54Ω or 100Ω, TA = 25°C, or +125°C ±0.2 V

Output Voltage (Note 5)VCC = 4.5V, Figure 1 TA = −55°C ±0.4 V

VOC Common Mode Output Voltage

(Note 6)

RL = 54Ω or 100Ω, Figure 1 3.0 V

Δ|VOC|Change in Magnitude of Common RL = 54Ω or 100Ω, VCC = 4.5V, Figure 1 ±0.2 V

Mode Output Voltage (Note 5)

IOOutput Current with Power Off VCC = 0V, VO = −7.0V to +12V ±50 μA

IOZ High Impedance State Output Current VO = −7.0V to +12V ±50 μA

IIH Input Current HIGH VI = 2.4V 20 μA

IIL Input Current LOW VI = 0.4V −50 μA

IOS Short Circuit Output Current VO = −7.0V −250

(Note 7)VO = 0V −150 mA

VO = VCC 150

VO = +12V 250

ICC Supply Current (All Drivers) No Load Outputs Enabled 50 mA

ICCX Outputs Disabled 30

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9625 Version 11 Revision 5 Print Date/Time: 2011/09/22 08:31:42

DS96F172M/DS96F174C/DS96F174M

MIL-STD-883C

Switching Characteristics

VCC = 5.0V

Symbol Parameter Conditions TA = 25°C TA = 55°C TA = 125°C Units

Typ Max Max Max

tDD Differential Output Delay Time RL = 60Ω, CL = 15 pF, 15 22 30 30 ns

tTD Differential Output Transition Time Figure 3 15 22 40 40 ns

tPLH Propagation Delay Time, RL = 27Ω, CL = 15 pF, 12 16 25 25 ns

Low-to-High Level Output Figure 4

tPHL Propagation Delay Time, 12 16 25 25 ns

High-to-Low Level Output

tZH Output Enable Time to High Level RL = 110Ω, Figure 5 25 32 40 40 ns

tZL Output Enable Time to Low Level RL = 110Ω, Figure 6 25 35 100 100 ns

tHZ Output Disable Time from High Level RL = 110Ω, Figure 5,25 30 80 80 ns

Note 13

tLZ Output Disable Time from Low Level RL = 110Ω, Figure 6 20 25 40 40 ns

tLZL Output Disable Time from Low Level Figure 6 300 ns

with Load Resistor to GND (Note 12)

tSKEW Driver Output to Output RL = 60Ω 1.0 4.0 10 10 ns

SMD Numbers: DS96F172MJ/883 5962-9076501MEA

DS96F174MJ/883 5962-9076502MEA

DS96F172ME/883 5962-9076501M2A

DS96F174MW/883 5962-9076502MFA

DS96F174ME/883 5962-9076502M2A

Order Number: DS96F172MJ/883, DS96F174MJ/883

NS Package Number J16A

DS96F172ME/883, DS96F174ME/883

NS Package Number E20A

DS96F172MW-MIL, DS96F174MW/883

NS Package Number W16A

For Complete Military Product Specifi-

cations, refer to the appropriate SMD or

MDS.

Parameter Measurement Information

962503

FIGURE 1. Differential and Common

Mode Output Voltage

962513

FIGURE 2. Differential Output Voltage with

Varying Common Mode Voltage

962504

962505

FIGURE 3. Differential Output Delay and Transition Times

5 www.national.com

9625 Version 11 Revision 5 Print Date/Time: 2011/09/22 08:31:42

DS96F172M/DS96F174C/DS96F174M

962506

962507

FIGURE 4. Propagation Delay Times

962508

962509

FIGURE 5. tZH and tHZ

962510

962511

FIGURE 6. tZL, tLZ, tLZL

Note 10: The input pulse is supplied by a generator having the following characteristics: f = 1.0 MHz, duty cycle = 50%, tr ≤ 5.0 ns, tf ≤ 5.0 ns, ZO = 50Ω.

Note 11: CL includes probe and jig capacitance.

Note 12: DS96F172 with active high and active low Enables is shown. DS96F174 has active high Enable only.

Note 13: To test the active low Enable E of DS96F172 ground E and apply an inverted waveform to E . DS96F174 has active high Enable only.

Note 14: For more information see Application Bulletin, Contact Product Marketing.

Note 15: Not tested for DS96F172MW-MIL device.

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9625 Version 11 Revision 5 Print Date/Time: 2011/09/22 08:31:42

DS96F172M/DS96F174C/DS96F174M

Typical Application

962512

The line length should be terminated at both ends in its characteristic impedance.

Stub lengths off the main line should be kept as short as possible.

Connection Diagrams

16-Lead Ceramic Dual-In-Line Package

NS Package Number J16A

DS96F172

962501

Top View

DS96F174

962502

Top View

20-Lead Ceramic Leadless Chip Carrier

NS Package Number E20A

962518

NC = No connection

Top View

962519

Top View

7 www.national.com

9625 Version 11 Revision 5 Print Date/Time: 2011/09/22 08:31:42

DS96F172M/DS96F174C/DS96F174M

16-Lead Ceramic Flatpak

NS Package Number W16A

962501

Top View

962502

Top View

Order Numbers are located at the end of the respective Electrical Tables.

www.national.com 8

9625 Version 11 Revision 5 Print Date/Time: 2011/09/22 08:31:42

DS96F172M/DS96F174C/DS96F174M

Physical Dimensions inches (millimeters) unless otherwise noted

20-Lead Ceramic Leadless Chip Carrier (E)

Order Number DS96F172ME/883, DS96F174ME/883

NS Package Number E20A

9 www.national.com

9625 Version 11 Revision 5 Print Date/Time: 2011/09/22 08:31:42

DS96F172M/DS96F174C/DS96F174M

16-Lead Ceramic Dual-In-Line Package (J)

Order Number DS96F172MJ/883,

DS96F174CJ, DS96F174MJ/883

NS Package Number J16A

16-Lead Ceramic Flatpack (W)

Order Number DS96F172MW/883, DS96F174MW/883

NS Package Number W16A

www.national.com 10

9625 Version 11 Revision 5 Print Date/Time: 2011/09/22 08:31:42

DS96F172M/DS96F174C/DS96F174M

Molded Dual-In-Line Package (N)

Order Number DS96F174CN

NS Package Number N16E

11 www.national.com

9625 Version 11 Revision 5 Print Date/Time: 2011/09/22 08:31:42

DS96F172M/DS96F174C/DS96F174M

Notes

DS96F172M/DS96F174C/DS96F174M EIA-485/EIA-422 Quad Differential Drivers

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9625 Version 11 Revision 5 Print Date/Time: 2011/09/22 08:31:43

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