General Description
The AAT3190 charge pump controller provides the
regulated positive and negative voltage biases
required by active matrix thin-film transistor (TFT)
liquid-crystal displays (LCDs), CCD Sensors and
OLEDs. Two low-power charge pumps convert
input supply voltages ranging from 2.7-5.5V into two
independent output voltages.
The dual low-power charge pumps independently
regulate a positive (VPOS) and a negative (VNEG)
output voltage. These outputs use external diode
and capacitor multiplier stages (as many stages as
required) to regulate output voltages up to ±25V.
Built in soft start circuitry prevents excessive in-
rush current during start up. A high switching fre-
quency enables the use of small external capaci-
tors. The device’s shutdown feature disconnects
the load from VIN and reduces the quiescent cur-
rent to less than 1.0 µA.
The AAT3190 is available in MSOP 8 or TSOPJW-
12 packages and is specified over a -40°C to 85°C
operating temperature range
Features
•V
IN Range: 2.7-5.5 Volts
• Adjustable ± dual charge pump
• Positive supply output up to +25V
• Negative supply output down to -25V
• Up to 30mA output current
• 1.0 MHz Switching Frequency
• < 1.0µA Shutdown Current
• Internal power MOSFETs
• Internally controlled Soft-Start
• Fast Transient Response
• Ultra-Thin Solution (No Inductors)
• -40°C to 85°C Temperature Range
• Available in 8-Pin MSOP, 12-pin TSOPJW
Applications
• TFT Active-Matrix LCDs
• Passive-Matrix Displays
• Personal Digital Assistants (PDAs)
• CCD Sensor Voltage Bias
• Organic LEDs (OLED)
AAT3190
Positive/Negative Charge Pump for Voltage Bias
Typical Application
AAT3190
INPUT
NEGATIVE
OUTPUT
POSTIVE
OUTPUT
IN
EN
DRVN
FBN
REF
GND
FBP
DRVP
EN
Preliminary Information
3190.2004.05.0.91 1
ChargePump™
Pin Description
Pin Configuration
MSOP-8 TSOPJW-12
(Top View) (Top View)
1
2
3
4
5
6
12
11
10
9
8
7
VIN
FBN
REF
EN
FBP
N/C
DRVP
GND
GND
GND
GND
DRVN
1 2
DRVN
VIN
GND
DRVP
FBP
EN
REF
FBN
1
2
3
4
8
7
6
5
Pin #
MSOP-8 TSOPJW-12 Symbol Function
1 5 FBP Positive Charge-Pump Feedback Input. Regulates to 1.2V
nominal. Connect feedback resistive divider to analog
ground (GND).
2 4 EN Enable Input. When EN is pulled low, the device shuts off
and draws only 1.0µA. When high, it is in normal opera-
tions. Drive EN through an external resistor.
3 3 REF Internal Reference Bypass Terminal. Connect a 0.1 µF
capacitor from this terminal to analog ground (GND).
External load capability to 50µA. REF is disabled in
shutdown.
4 2 FBN Negative Charge-Pump Regulator Feedback Input.
Regulates to 0V nominal. Connect feedback resistive
divider to the reference (REF).
5 12 DVRP Positive Charge-Pump Driver Output. Output high level is
VIN and low level is PGND.
6 8, 9, 10, 11 GND Ground
7 7 DRVN Negative Charge-Pump Driver Output. Output high level is
VIN, and low level is PGND.
8 1 VIN Input Voltage. 2.7 - 5.5 Volts.
AAT3190
Positive/Negative Charge Pump for Voltage Bias
23190.2004.05.0.91
Absolute Maximum Ratings 1
Note 1: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation
at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum rating should be applied at any
one time.
Thermal Information
Note 2: Mounted on a FR4 board.
Note 3: Derate 6.7mW/°C above 25°C.
Note 4: Derate 6.25mW/°C above 25°C.
Symbol Description Value Units
ΘJA Thermal Resistance (MSOP-8) 2150 °C/W
ΘJA Thermal Resistance (TSOPJW-12) 2160 °C/W
PDMaximum Power Dissipation (MSOP-8) (TA= 25°C) 2, 3 667 mW
PDMaximum Power Dissipation (TSOPJW-12) (TA= 25°C) 2, 4 625 mW
Symbol Description Value Units
VIN Input Voltage -0.3 to 6 V
VEN EN to GND -0.3 to 6 V
VN_CH DRVN to GND -0.3V to (VIN + 0.3V) V
VP_CH DRVP to GND -0.3V to (VIN + 0.3V) V
Other Inputs REF, FBN, FBP to GND -0.3V to (VIN + 0.3V) V
IMAX
Continuous Current into DRVN, DRVP ±200 mA
All Other Pins ±10 mA
TJOperating Junction Temperature Range -40 to 150 °C
TLEAD Maximum Soldering Temperature (at leads, 10 sec) 300 °C
AAT3190
Positive/Negative Charge Pump for Voltage Bias
3190.2004.05.0.91 3
Electrical Characteristics
(VIN= 5.0V, CREF = 0.1µF, TA= -40 to 85°C. Unless otherwise noted, typical values are at TA= 25°C)
Symbol Description Conditions Min Typ Max Units
VIN Input Supply Range 2.7 5.5 V
UVLO Input Under Voltage Threshold VIN rising 1.8 V
VIN Falling, 40 mV hysteresis (typ) 1.6
IIN Input Quiescent Supply Current VFBP = 1.5V, VFBN = -0.2V, 400 800 µA
no load on DRVN and DRVP
ISD Shutdown Supply Current VEN = 0 V 0.1 1.0 µA
FOSC Operating Frequency 0.8 1.0 1.2 MHz
Negative Low-Power Charge Pump
VFBN FBN Regulation Voltage -100 0 +100 mV
IFBN FBN Input Bias Current VFBN = -50mV -100 +100 nA
RDSNCHN DRVN NCH On-Resistance 1.5 5.0 Ω
RDSPCHMIN MIN DRVN PCH On-Resistance VFBN = 100mV, VIN = 4V 1.0 5.0 Ω
RDSPCHMAX MAX DRVN PCH On-Resistance VFBN = -100mV, VIN = 4V 20 kΩ
Positive Low-Power Charge Pump
VFBP FBP Regulation Voltage 1.15 1.2 1.25 V
IFBP FBP Input Bias Current VFBP = 1.5V -60 +100 nA
RDSPCHP DRVP PCH On-Resistance 1.0 5.0 Ω
RDSNCHMIN MIN DRVP NCH On-Resistance VFBP = 1.15V, VIN = 4V 3 15 Ω
RDSNCHMIN MAX DRVP NCH On-Resistance VFBP = 1.25V, VIN = 4V 20 kΩ
Reference
Reference Voltage -2.0 µA < IREF < 50 µA 1.18 1.2 1.22 V
VREF Reference Under Voltage VREF rising 0.8 V
Threshold
Logic Signals
VIL Input Low Voltage 0.5 V
VIH Input High Voltage 1.5 V
IIL Enable Input Low Current VIN = 5.0V, FBP = 1.5V, FBN = -0.2V 1 µA
IIH Enable Input High Current VIN = 5.0V, FBP = 1.5V, FBN = -0.2V 1 µA
Thermal Limit
TSD Over Temp Shutdown Threshold 140 °C
THYST Over Temp Shutdown Hysteresis 15 °C
AAT3190
Positive/Negative Charge Pump for Voltage Bias
43190.2004.05.0.91
Typical Characteristics
Negative Output Voltage vs. Load Current
TA = 25°
°
C
-8
-7.75
-7.5
-7.25
-7
-6.75
-6.5
010203040
INEG (mA)
VNEG (V)
VIN = 5.0V
Positive Output Voltage vs. Load Current
TA = 25°
°
C
IPOS (mA)
VPOS (V)
11.4
11.6
11.8
12
12.2
12.4
0 5 10 15 20 25 30 35 40
VIN = 5.0V
Maximum VOUT vs. VIN
IOUT = 5mA and 15mA
-15
-12.5
-10
-7.5
-5
-2.5
0
2.5
5
7.5
10
12.5
15
2.5 3 3.5 4 4.5 5 5.5
VIN (V)
VOUT (V)
ION = 15mA
IOP = 15mA
ION = 5mA
IOP = 5mA
Reference Voltage vs. Temperature
1.18
1.19
1.2
1.21
1.22
-40 -15 10 35 60 85
Temperature (°C)
Reference Voltage (V)
Switching Frequency vs. Temperature
800
850
900
950
1000
-40 -15 10 35 60 85
Temperature (°
°
C)
Frequency (kHz)
Quiescent Current vs. Temperature
250
270
290
310
330
350
-40 -15 10 35 60 85
Temperature (°C)
Quiescent Current (µA)
VFBP = 1.5V
VFBN = -0.2V
AAT3190
Positive/Negative Charge Pump for Voltage Bias
3190.2004.05.0.91 5
Typical Characteristics
AAT3190-1 Power-Up Sequence
500µ
µ
sec/div
VPOS and VNEG
(bottom traces, V)
Enable
(top trace, V)
Enable
VPOS
VNEG
-12
-8
-4
0
4
8
12
16
20
-12
-10
-8
-6
-4
-2
0
2
4
AAT 3190 Power-Up Sequence
-12
-8
-4
0
4
8
12
16
20
500µ
µ
sec/div
VPOS and VNEG
(bottom traces, V)
-12
-10
-8
-6
-4
-2
0
2
4
Enable
(top trace, V)
Enable
VPOS
VNEG
VNEG Load Transient
-150
-100
-50
0
50
100
150
200
250
50µ
µ
s/div
VNEG (bottom trace)
(50mV/div)
-60
-50
-40
-30
-20
-10
0
10
20
INEG (top trace)
(10mA/div)
VPOS Load Transient
-150
-100
-50
0
50
100
150
200
250
50µ
µ
s/div
VPOS (bottom trace)
(50mV/div)
-60
-50
-40
-30
-20
-10
0
10
20
IPOS (top trace)
(10mA/div)
Negative Output Efficiency vs. Load Current
VIN = 5.0V
20
30
40
50
60
70
80
0 10203040
INEG (mA)
Efficiency (%)
VNEG = -7.3V
25°C
85°C
Positive Output Efficiency vs. Load Current
VIN = 5.0V
20
30
40
50
60
70
80
0 10203040
IPOS (mA)
Efficiency (%)
VPOS = 12.3V 25°C
85°C
AAT3190
Positive/Negative Charge Pump for Voltage Bias
63190.2004.05.0.91
Typical Characteristics
AAT3190 Reference Undervoltage Threshold
(120µF capacitor placed across REF to limit rate of rise
of REF for test purposes only)
500nsec/div
DRVN
(2V/div)
SHDN
(2V/div)
REF
(0.2V/div)
0.5V
Negative Output Voltage vs. Load Current
T = 85°
°
C
-8
-7.75
-7.5
-7.25
-7
-6.75
-6.5
010203040
INEG (mA)
VNEG (V)
VIN = 5.0V
Positive Output Voltage vs. Load Current
T = 85°
°
C
010203040
IPOS (mA)
VPOS (V)
11.4
11.6
11.8
12
12.2
12.4
VIN = 5.0V
Output Ripple
VPOS = 12.3V, IPOS = 5mA, VNEG = 7.2V, INEG = 10mA
500nsec/div
VNEG
(10mV/div)
VPOS
(10mV/div)
AAT3190
Positive/Negative Charge Pump for Voltage Bias
3190.2004.05.0.91 7
AAT3190
Positive/Negative Charge Pump for Voltage Bias
83190.2004.05.0.91
Functional Block Diagram
Control
UVLO
Band
Gap
Ref.
-
+
-
+
Reference
Oscillator
Over
Temperature
Protection
DRVP
DRVN
FBP
REF
FBN
GND
IN
EN
Functional Description
Dual Charge-Pump Regulators
The AAT3190 provides low power regulated output
voltages from two individual charge pumps. Using
a single stage, the first charge pump inverts the
supply voltage (VIN) and provides a regulated neg-
ative output voltage. The second charge pump dou-
bles VIN and provides a regulated positive output
voltage. These outputs use external Schottky
diodes and capacitor multiplier stages (as many as
required) to regulate up to ±25V. A constant switch-
ing frequency of 1MHz minimizes the output ripple
and capacitor size.
Negative Charge Pump
During the first half-cycle, the P-channel MOSFET
turns on, and the flying capacitor C7 charges to VIN
minus a diode drop (figure 1). During the second
half-cycle, the P-channel MOSFET turns off, and
the N-channel MOSFET turns on, level shifting C7.
This connects C7 in parallel with the output reser-
voir capacitor C10. If the voltage across C10
minus a diode drop is less than the voltage across
C7, current flows from C7 to C10 until the diode
turns off.
AAT3190
Positive/Negative Charge Pump for Voltage Bias
3190.2004.05.0.91 9
Positive Charge Pump
During the first half-cycle, the N-channel MOSFET
turns on and charges the flying capacitor C4
(Figure 2).
During the second half-cycle, the N-channel
MOSFET turns off and the P-channel MOSFET
turns on, level shifting C4 by the input voltage.
This connects C4 in parallel with the reservoir
capacitor C5. If the voltage across C5 plus a
diode drop is less that the level shifted flying
capacitor (C4 + VIN), charge is transferred from
C4 to C5 until the diode turns off.
Figure 1: Negative Charge Pump Block Diagram
R1
R2
VREF
FBN
DRVN
GND
1/2 A4
BAT54SDW
C7
C10
OSC CTL
AAT3190
IN
VON
VON = -(R1/R2) x VRE
F
C2
1.2V
Figure 2: Positive Charge Pump Block Diagram
R3
R4
VREF
1.2V
FBP
DRVP
VIN
GND
1/2 A3
BAT54SDW
C4
C5
OSC CTL
AAT3190
IN
VOP
VOP = (1+R3/R4) x VRE
F
AAT3190
Positive/Negative Charge Pump for Voltage Bias
10 3190.2004.05.0.91
Voltage Reference
The voltage reference is a simple band gap with an
output voltage equal to b VBE + K*VT. The band
gap reference amplifier has an additional compen-
sation capacitor from the negative input to the out-
put. This capacitor serves to slow down the circuit
during startup and soft starts the voltage reference,
and the regulator output from overshoot. The refer-
ence circuit amplifier also increases the overall
PSRR of the device. An 80 KΩresistor serves to
isolate and buffer the amplifier from a small internal
filter capacitor and an optional large external filter
capacitor.
Enable and Start-up
The AAT3190 is disabled by pulling the EN pin low.
The threshold levels lie between 0.5V and 1.5V.
Even though the quiescent current of the IC during
shutdown is less than 1µA, the positive output volt-
age (VOP) and any load current associated with it
does not disappear without the complete removal of
the input voltage. This is due to the fact that with no
switching of the DRVP pin, the input voltage simply
forward biases the Schottky diodes associated with
the VOP charge pump, providing a path for load cur-
rent to be drawn from the input voltage.
Depending on the application, the supplies must be
sequenced properly to avoid damage or latch-up.
The AAT3190 start-up sequence ramps up the VOP
output 200µsec after the VON output is present. The
AAT3190-1 ramps up the positive supply before the
negative supply.
Over Temperature Protection
A logic control circuit will shut down both charge
pumps in the case of an over temperature condition.
UVLO (Under voltage lockout)
A UVLO circuit disables the AAT3190 when the
input voltage supply is lower than 1.8V nominal.
Design Procedure and
Component Selection
Output Voltage
The number of charge pump stages required for a
given output varies with the input voltage applied.
The number of stages required can be estimated by
for the positive output and
for the negative output.
When solving for npand nnround up the solution to
the next highest integer to determine the number of
stages required.
VON
The negative output voltage is adjusted by a resis-
tive divider from the output (VON) to the FBN and
REF pin.
The maximum reference voltage current is 50µA
therefore the minimum allowable value for R2 of
figure 1 is 24kΩ. It is best to select the smallest
value possible for R2 as this will keep R1 to a min-
imum. This limits errors due to the FBN input bias
current. The FBN input has a maximum input bias
current of 100nA. Using the full 50µA reference
current for programming VON:
will limit the error due to the input bias current at
FBN to less than 0.2%
IFBN
IPGM
= = 0.2%
0.1µA
50µA
VREF
R2
IPGM = = = 50µ
A
1.2
24.1k
VON
2VF - VIN
nn =
VOP - VIN
VIN - 2VF
np =
AAT3190
Positive/Negative Charge Pump for Voltage Bias
3190.2004.05.0.91 11
With R2 selected R1 can be determined.
VOP
The positive output voltage is set by way of a resis-
tive divider from the output (VOP) to the FBP and
ground pin. Limiting the size of R4 reduces the
effect of the FBP bias current. For less than 0.1%
error limit R4 to less than 12 kΩ.
Once R4 has been determined solve for R3.
Flying and Output Capacitor
The fly capacitor minimum value is limited by the
output power requirement while the maximum
value is set by the bandwidth of the power supply.
If CFLY is too small the output may not be able to
deliver the power demanded, while too large of a
capacitor may limit the bandwidth and time
required to recover from load and line transients. A
0.1µF X7R or X5R ceramic capacitor is typically
used. The voltage rating of the fly and reservoir
output capacitors vary with the number of charge
pump stages. The reservoir output capacitor
should be roughly 10 times the fly capacitor. Use
larger capacitors for reduced output ripple. A 1µF
X7R or X5R type ceramic is typically used.
Positive Output Capacitor Voltage
Ratings
The absolute steady state maximum output voltage
(neglecting the internal RDS(ON) drop of the internal
MOSFETs) for the nth stage is
where VFWD is the estimated forward drop of the
Schottky diode. This is also the voltage rating
required for the nth bulk capacitor in the positive
output charge pump.
The voltage rating for the nth flying capacitor in the
positive stage is
where VBULK(0) is the input voltage.
Table 1. Positive Output Capacitor Voltages
Negative Output Capacitor Voltage
Ratings
The absolute steady state maximum output voltage
(neglecting the internal RDS(ON) drop of the internal
MOSFETs) for the nth stage is
This is also the voltage rating required for the nth
bulk capacitor in the negative output charge pump.
VBULK(n) = -n · VIN + 2 · n · VFW
D
VIN = 5.0V, VFWD = 0.3V
Stages (n) VBULK(n) VFLY(n)
1 9.4V 4.7V
2 13.8V 9.1V
3 18.2V 13.5V
4 22.6V 17.9V
5 27.0V 22.3V
6 31.4V 26.7V
VFLY(n) = VBULK(n + 1) - VFW
D
VBULK(n) = (n + 1) · VIN - 2 · n · VFWD
R3 = R4 · - 1
VO
VREF
IFBP
IPGM
= = 0.1%
0.1µA
100µA
VREF
R4
IPGM = = = 100µ
A
1.2V
12k
VNEG · R2
-VREF
R1 =
AAT3190
Positive/Negative Charge Pump for Voltage Bias
12 3190.2004.05.0.91
The voltage rating for the nth flying capacitor in the
negative stage is
Table 2. Negative Output Capacitor Voltages
Single Output Operation
If only one of the two channels is needed, it is pos-
sible to disable either output. Connect the respec-
tive FB pin to VIN to disable the output, e.g. connect
FBN to VIN in order to disable the negative output.
Input Capacitors
Input Capacitor
The primary function of the input capacitor is to pro-
vide a low impedance loop for the edges of pulsed
current drawn by the IC. A low ESL X7R or X5R type
ceramic capacitor is ideal for this function. The size
required will vary depending on the load, output volt-
age, and input voltage characteristics. Typically the
input capacitor should be 5 to 10 times the fly capac-
itor. If the source impedance of the input supply is
high, a larger capacitor may be required. To mini-
mize stray inductance the capacitor should be
placed as close as possible to the IC. This keeps the
high frequency content of the input current localized,
minimizing radiated and conducted EMI.
Rectifier Diodes
For the rectifiers use Schottky diodes with a volt-
age rating of 1.5 times the input voltage. The max-
imum steady state voltage seen by the rectifier
diodes for both the positive and negative charge
pumps (regardless of the number of stages) is
The BAT54S dual Schottky is offered in a SOT23
package that provides a convenient pin-out for the
voltage doubler configuration. The BAT54SDW
quad Schottky in SOT363 (2x2mm) is a good
choice for multiple-stage charge pump configura-
tion (see evaluation board schematic).
PC Board Layout
The input and reference capacitor should be placed
as close to the IC as possible. Place the program-
ming resistors (R1-R4) close to the IC, minimizing
trace length to FBN and FBP. Figure 3 and 4 display
the evaluation board layout with the TSOPJW-12
package.
VREVERSE = VIN - VF
VIN = 5.0V, VFWD = 0.3V
Stages (n) VBULK(n) VFLY(n)
1 -4.4V 4.7V
2 -8.8V 9.1V
3 -13.2V 13.5V
4 -17.6V 17.9V
5 -22.0V 22.3V
6 -26.4V 26.7V
VFLY(n) = VFWD - VBULK(n
)
Figure 3: AAT3190 Evaluation Board Top Side Figure 4. AAT3190 Evaluation Board Bottom Side
Figure 5: AAT3190 Evaluation Board Schematic (shown with 2 stages)
VOP = 12V, VON = -7V
A3
C8
0.1µF
C7
0.1µF
C9
0.1µF
C10
0.1µF
BAT54SDW
A4
BAT54SDW
C22
1µF
C21
1µFC20
1µF
C19
1µF
R1
139k
R2
24.1k
R4
6.02k
R3
56.2k
R5
205K
C1
4.7µF
C2
0.1µF
VOP
GND
VIN
VON
GND
VIN
1
FBN
2
REF
3
EN
4 9
10
GND
GND
GND
GND
11
DRVP 12
FBP
5
N/C
6DRVN 7
8
U1
AAT3190ITP
EN C19, C20, C21, C22 Murata GRM39X5R105K16 1µF 16V X5R 0603
C7, C8, C9, C10 Taiyo Yuden EMK107BJ104MA 0.1µF 16V X7R 0603
C1 Taiyo Yuden JMK212BJ475MG 4.7µF 6.3V X5R 0805
AAT3190
Positive/Negative Charge Pump for Voltage Bias
3190.2004.05.0.91 13
AAT3190
Positive/Negative Charge Pump for Voltage Bias
14 3190.2004.05.0.91
Ordering Information
Note 1: XYY = assembly and date code.
Package Information
MSOP-8
All dimensions in millimeters.
PIN 1
1.95 BSC
0.254 BSC
0.155 ± 0.075
0.60 ± 0.20
3.00 ± 0.10
0.95 ± 0.15
0.95 REF
0.85 ± 0.10
3.00 ± 0.10
10° ± 5°
4° ± 4°
0.65 BSC 0.30 ± 0.08
0.075 ± 0.075
4.90 ± 0.10
GAUGE PLANE
Package Power-Up Sequence Marking1Part Number (Tape and Reel)
MSOP-8 -, + JDXYY AAT3190IKS-T1
TSOPJW-12 -, + JDXYY AAT3190ITP-T1
TSOPJW-12 +, - LKXYY AAT3190ITP-1-T1
TSOPJW-12
All dimensions in millimeters.
0.20 + 0.10
- 0.05
0.055 ± 0.045 0.45 ± 0.15
7° NOM
4° ± 4°
3.00 ± 0.10
2.40 ± 0.10
2.85 ± 0.20
0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC
0.15 ± 0.05
0.9625
±
0.0375
1.00 + 0.10
- 0.065
0.04 REF
0.010
2.75 ± 0.25
AAT3190
Positive/Negative Charge Pump for Voltage Bias
3190.2004.05.0.91 15
AAT3190
Positive/Negative Charge Pump for Voltage Bias
16 3190.2004.05.0.91
Advanced Analogic Technologies, Inc.
830 E. Arques Avenue, Sunnyvale, CA 94085
Phone (408) 737-4600
Fax (408) 737-4611
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rights, or other intellectual property rights are implied.
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