General Description
The MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–
MAX6869 ultra-low-current (170nA, typ) microprocessor
(µP) supervisory circuits combine voltage monitoring,
watchdog timer, and manual reset input functions in a 5-
pin SOT23 package. These devices assert a reset signal
whenever the monitored voltage drops below the factory-
trimmed reset threshold voltage, manual reset is assert-
ed, or the watchdog timer expires. The reset output
remains asserted for a minimum timeout period after VCC
rises above the reset threshold and manual reset is
deasserted. Factory-trimmed reset threshold voltages
are offered from +1.575V to +4.625V in approximately
100mV increments (see the Threshold Suffix Guide).
Each device is offered with six minimum reset timeout
options, ranging from 10ms to 1200ms.
The MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–
MAX6869 are offered in a variety of configurations (see
the Selector Guide). The MAX6854/MAX6855/MAX6856/
MAX6861–MAX6869 provide a manual reset input, MR.
The MAX6864–MAX6869 offer a watchdog timer that
monitors activity at the WDI input to prevent code execu-
tion errors. The MAX6864–MAX6869 offer watchdog
timeout options of 3.3s or 209s (typ). The MAX6861/
MAX6862/MAX6863 feature a pin-selectable reset delay
period of 10ms or 150ms (min). Push-pull active-low,
push-pull active-high, and open-drain active-low reset
outputs are available. Applications
Portable/Battery-Powered Equipment
PDAs/Cell Phones
MP3 Players/Pagers
Glucose Monitors/Patient Monitors
Features
♦Ultra-Low 170nA (typ) Supply Current
♦Reset Thresholds from +1.575V to +4.625V in
Approximately 100mV Increments
♦Six Minimum Reset Timeout Period Options from
10ms to 1200ms
♦Manual Reset Option
♦Watchdog Timer Option
♦Pin-Selectable 10ms/150ms (min) Reset Timeout
Period (MAX6861/MAX6862/MAX6863)
♦Immune to Short VCC Transients
♦Guaranteed Reset Valid to VCC = +1.1V
♦Three Reset Output Options:
Push-Pull RESET
Push-Pull RESET
Open-Drain RESET
♦No External Components
♦Small 5-Pin SOT23 Package
♦Pin Compatible to the TPS3836/TPS3837/TPS3838
(MAX6861/MAX6862/MAX6863)
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–MAX6869
Nanopower µP Supervisory Circuits with
Manual Reset and Watchdog Timer
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
PART†
TEMP RANGE
PIN-PACKAGE
MAX6854UK_ _D_-T
-40°C to +85°C
5 SOT23-5
MAX6855UK_ _D_-T
-40°C to +85°C
5 SOT23-5
19-3139; Rev 4; 12/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Ordering Information continued at end of data sheet.
†Insert reset threshold suffix (see Table 2, Threshold Suffix
Guide) after UK. Insert the number corresponding to the
desired reset timeout period (see Table 4, Reset Timeout
Period) after D.
Note: Sample stock is generally held on standard versions
only (see Table 5, Standard Versions Table). Standard versions
have an order increment of 2500 pieces. Nonstandard versions
have an order increment of 10,000 pieces. Contact factory for
availability of nonstandard versions.
Devices are available in both leaded and lead-free packaging.
Specify lead-free by replacing “-T” with “+T” when ordering.
Pin Configurations and Selector Guide appear at end of
data sheet.
Typical Operating Circuit
MAX6864
MAX6867
µP
VCC
VCC
GND GND
MANUAL
RESET
RESET
I/O
VCC
0.1µF
RESET
MR WDI
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–MAX6869
Nanopower µP Supervisory Circuits with
Manual Reset and Watchdog Timer
2_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC = 1.2V to 5.5V, TA= -40°C to +85°C, unless otherwise specified. Typical values are at VCC = 2.5V, TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCC, Open-Drain RESET to GND..........................-0.3V to +6.0V
MR, Push-Pull RESET, RESET,
WDI, CT, I.C............................................-0.3V to (VCC + 0.3V)
Input Current, Output Current (all pins)............................±20mA
Continuous Power Dissipation (TA= +70°C)
5-Pin SOT23 (derate 7.1mW/°C above +70°C)............571mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETER
SYMBOL
CONDITIONS MIN
TYP
MAX
TA ≥ 0°C 1.1 5.5
Supply Voltage VCC TA = -40°C to +85°C 1.2 5.5 V
VCC = 5.0V 210 400
VCC = 3.3V 190 380
VCC > VTH, no load,
reset output
deasserted (Note 2)
VCC = 1.8V 170 370 nA
Supply Current ICC
VCC < VTH, no load, reset output asserted
715µA
VCC Reset Threshold VTH VCC falling (see Table 2) VTH -
2.5%
VTH VTH +
2.5%
V
Reset Threshold Hysteresis VHYST Reset asserted to reset deasserted 0.5
D1 10 15 25
D2 40 60 80
D3 150 225 300
D4
1200 1800 2400
D5 300 450 600
Reset Timeout Period tRP VCC = VTH + 150mV
(Figures 2 and 3)
D6 600 900
1200
ms
VCC to Reset Delay tRD VCC falling from (VTH + 100mV) to
(VTH - 100mV) at 10mV/µs 40 µs
VCC ≥ 1.1V, ISINK = 50µA,
RESET asserted, TA ≥ 0°C 0.3
VCC ≥ 1.2V, ISINK = 100µA,
RESET asserted 0.3
VOL
VCC ≥ 2.12V, ISINK = 1.2mA,
RESET asserted 0.3
VCC ≥ 1.71V, ISOURCE = 200µA,
RESET deasserted, push-pull RESET only 0.8 x VCC
RESET Output Voltage
VOH VCC ≥ 2.38V, ISOURCE = 500µA,
RESET deasserted, push-pull RESET only 0.8 x VCC
V
Open-Drain RESET Leakage
Current ILKG RESET deasserted 25 nA
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–MAX6869
Nanopower µP Supervisory Circuits with
Manual Reset and Watchdog Timer
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 1.2V to 5.5V, TA= -40°C to +85°C, unless otherwise specified. Typical values are at VCC = 2.5V, TA= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS MIN
TYP MAX
VCC ≥ 1.1V, ISOURCE = 10µA,
RESET asserted, TA ≥ 0°C 0.8 x VCC
VCC ≥ 1.2V, ISOURCE = 10µA,
RESET asserted 0.8 x VCC
VCC ≥ 1.53V, ISOURCE = 200µA,
RESET asserted 0.8 x VCC
VOH
VCC ≥ 2.12V, ISOURCE = 500µA,
RESET asserted 0.8 x VCC
VCC ≥ 1.71V, ISINK = 500µA,
RESET deasserted 0.3
RESET Output Voltage
VOL VCC ≥ 2.38V, ISINK = 1.2mA,
RESET deasserted 0.3
V
CT Input Current CT = GND or VCC 20 nA
VIH 0.8 x VCC
CT Input Voltage VIL
0.2 x VCC
V
MANUAL RESET INPUT
VIH 0.7 x VCC
MR Input Voltage VIL
0.3 x VCC
V
MR Minimum Pulse Width tMPW 1µs
MR Glitch Rejection 200 ns
MR to Reset Delay tMRD 250 ns
MR Pullup Resistance 51020kΩ
WATCHDOG TIMER (MAX6864–MAX6869)
VIH 0.7 x VCC
WDI Input Voltage VIL
0.3 x VCC
V
WDI Input Current WDI = GND or VCC 20 nA
WDI Pulse Width tWDI (Note 3) 150 ns
S 1.5 3.3
7.75
Watchdog Timeout Period tWD L95209 487 s
Note 1: Devices are tested at TA= +25°C. Specifications for TA= -40°C to +85°C are guaranteed by design.
Note 2: For the MAX6864–MAX6869, the watchdog period is 1s with tRISE and tFALL < 50ns.
Note 3: Guaranteed by design.
NORMALIZED WATCHDOG TIMEOUT PERIOD
vs. TEMPERATURE
MAX6854 toc04
TEMPERATURE (°C)
NORMALIZED tWD
603510-15
0.6
0.8
1.0
1.2
1.4
1.6
1.8
0.4 -40 85
10 100 1000
MAXIMUM VCC TRANSIENT DURATION
vs. RESET THRESHOLD OVERDRIVE
MAX684 toc05
RESET THRESHOLD OVERDRIVE (mV)
TRANSIENT DURATION (µs)
1000
0.1
10
1
100
RESET OCCURS ABOVE THIS LINE
VCC FALLING FROM VTH +100mV
NORMALIZED RESET THRESHOLD VOLTAGE
vs. TEMPERATURE
MAX6854 toc06
TEMPERATURE (°C)
NORMALIZED VTH
603510-15
0.995
1.000
1.005
1.010
0.990 -40 85
VCC TO RESET DELAY
vs. TEMPERATURE
MAX6854 toc07
TEMPERATURE (°C)
tRD (µs)
603510-15
30
40
50
60
70
20 -40 85
VCC = VTH + 100mV TO VTH - 100mV
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–MAX6869
Nanopower µP Supervisory Circuits with
Manual Reset and Watchdog Timer
4_______________________________________________________________________________________
Typical Operating Characteristics
(VCC = +2.5V, TA= +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX6854 toc01
VCC (V)
0.1
1.0
10.0
ICC (µA)
5.04.53.5 4.02.0 2.5 3.01.51.0 5.5
VTH = 2.23V
TA = +85°C
TA = +25°C
TA = -40°C
SUPPLY CURRENT
vs. TEMPERATURE
MAX6854 toc02
TEMPERATURE (°C)
ICC (µA)
603510-15
0.12
0.14
0.16
0.18
0.20
0.22
0.10 -40 85
RESET IS NOT ASSERTED
VTH = 1.575V
VCC = 5.5V
VCC = 2.5V
VCC = 3.3V
VCC = 1.8V
NORMALIZED RESET TIMEOUT PERIOD
vs. TEMPERATURE
MAX6854 toc03
TEMPERATURE (°C)
NORMALIZED tRP
603510-15
0.99
1.00
1.01
1.02
0.98 -40 85
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–MAX6869
Nanopower µP Supervisory Circuits with
Manual Reset and Watchdog Timer
_______________________________________________________________________________________ 5
OUTPUT LOW VOLTAGE
vs. SINK CURRENT
MAX6854 toc08
ISINK (µA)
VOL (V)
4000300020001000
0.05
0.10
0.15
0.20
0.25
0.30
005000
VCC = 1.8V
VCC = 3.3V
VCC = 2.5V
OUTPUT HIGH VOLTAGE
vs. SOURCE CURRENT
MAX6854 toc09
ISOURCE (µA)
OUTPUT HIGH VOLTAGE (VCC - VOH) (V)
800600400200
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
00 1000
VCC = 1.8V
VCC = 3.3V
VCC = 2.5V
SUPPLY CURRENT vs. WATCHDOG
SWITCHING FREQUENCY
MAX6854 toc10
WATCHDOG SWITCHING FREQUENCY (Hz)
SUPPLY CURRENT (µA)
1M100k10k1k100
1
10
100
0.1 10 10M
VCC = 2.5V
VCC TO RESET DELAY
MAX6854 toc11
10µs/div
200mV/div
1.7V
1.5V
VCC
RESET
01V/div
VTH = 1.575V
tRD
MANUAL RESET DELAY
MAX6854 toc12
200ns/div
1V/div
MR
RESET
1V/div
tMRD
Typical Operating Characteristics (continued)
(VCC = +2.5V, TA= +25°C, unless otherwise noted.)
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–MAX6869
Nanopower µP Supervisory Circuits with
Manual Reset and Watchdog Timer
6_______________________________________________________________________________________
MAX6854/MAX6855/MAX6856 Pin Description
PIN
MAX6854/
MAX6856 MAX6855 NAME FUNCTION
1—RESET
Active-Low Open-Drain or Push-Pull Reset Output. RESET transitions from high to
low when VCC drops below the selected reset threshold or MR is pulled low.
RESET remains low for the reset timeout period after VCC exceeds the device
reset threshold and MR deasserts. Push-pull RESET outputs are referenced to
VCC. Open-drain RESET outputs require an external pullup resistor.
2, 4 2, 4 GND Ground. Connect all GND inputs to the same potential.
33MR
Active-Low Manual Reset Input. Drive MR low to initiate a reset. The reset output
remains asserted while MR is held low and for the reset timeout period after MR
transitions high. Leave MR unconnected or connect to VCC if unused. MR is
internally pulled up to VCC through 10kΩ.
55V
CC Supply Voltage. Input for VCC reset monitor. For noisy systems, bypass VCC with
a 0.1µF capacitor to GND.
—1RESET
Active-High Push-Pull Reset Output. RESET transitions from low to high when
VCC drops below the selected reset threshold or MR is pulled low. RESET
remains high for the reset timeout period after VCC exceeds the device reset
threshold and MR deasserts. RESET is referenced to VCC.
MAX6858/MAX6860 Pin Description
PIN
MAX6858/
MAX6860 NAME FUNCTION
1, 2 I.C. Internally Connected. For increased noise immunity, connect I.C. to GND.
3GND Ground
4RESET
Active-Low Open-Drain or Push-Pull Reset Output. RESET transitions from high to low when VCC
drops below the selected reset threshold. RESET remains low for the reset timeout period after
VCC exceeds the device reset threshold. Push-pull RESET outputs are referenced to VCC. Open-
drain RESET outputs require an external pullup resistor.
5V
CC Supply Voltage. Input for VCC reset monitor. For noisy systems, bypass VCC with a 0.1µF
capacitor to GND.
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–MAX6869
Nanopower µP Supervisory Circuits with
Manual Reset and Watchdog Timer
_______________________________________________________________________________________ 7
MAX6861/MAX6862/MAX6863 Pin Description
PIN
MAX6861/
MAX6863 MAX6862 NAME FUNCTION
11CT
Reset Timeout Select Input. Connect CT low to select the D1 reset timeout output
period (see Tables 1 and 4). Connect CT high (normally VCC) to select the D3
reset timeout period.
22GND Ground
33MR
Active-Low Manual Reset Input. Drive MR low to initiate a reset. The reset output
remains asserted while MR is held low and for the reset timeout period after MR
transitions high. Leave MR unconnected or connect to VCC if unused. MR is
internally pulled up to VCC through 10kΩ.
4—RESET
Active-Low Open-Drain or Push-Pull Reset Output. RESET transitions from high to
low when VCC drops below the selected reset threshold or MR is pulled low.
RESET remains low for the reset timeout period after VCC exceeds the device
reset threshold and MR deasserts. Push-pull RESET outputs are referenced to
VCC. Open-drain RESET outputs require an external pullup resistor.
55V
CC Supply Voltage. Input for VCC reset monitor. For noisy systems, bypass VCC with
a 0.1µF capacitor to GND.
—4RESET
Active-High Push-Pull Reset Output. RESET transitions from low to high when
VCC drops below the selected reset threshold or MR is pulled low. RESET
remains high for the reset timeout period after VCC exceeds the device reset
threshold and MR deasserts. RESET is referenced to VCC.
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–MAX6869
Nanopower µP Supervisory Circuits with
Manual Reset and Watchdog Timer
8_______________________________________________________________________________________
MAX6864/MAX6865/MAX6866 Pin Description
PIN
MAX6864/
MAX6866 MAX6865 NAME FUNCTION
1—RESET
Active-Low Open-Drain or Push-Pull Reset Output. RESET transitions from high to
low when VCC drops below the selected reset threshold, MR is pulled low, or the
watchdog timer expires. RESET remains low for the reset timeout period after
VCC exceeds the device reset threshold, MR deasserts, or after the watchog
timer expires. Push-pull RESET outputs are referenced to VCC. Open-drain
RESET outputs require an external pullup resistor.
22GND Ground
33MR
Active-Low Manual Reset Input. Drive MR low to initiate a reset. The reset output
remains asserted while MR is held low and for the reset timeout period after MR
transitions high. Leave MR unconnected or connect to VCC if unused. MR is
internally pulled up to VCC through 10kΩ.
44WDI
Watchdog Input. If WDI remains high or low for longer than the watchdog timeout
period, the internal watchdog timer expires, and a reset is triggered for the reset
timeout period. The internal watchdog timer clears whenever reset is asserted,
the manual reset is asserted, or WDI sees a rising or falling edge.
55V
CC Supply Voltage. Input for VCC reset monitor. For noisy systems, bypass VCC with
a 0.1µF capacitor to GND.
—1RESET
Active-High Push-Pull Reset Output. RESET transitions from low to high when
VCC drops below the selected reset threshold, MR is pulled low, or the watchdog
timer expires. RESET remains high for the reset timeout period after VCC exceeds
the device reset threshold, MR deasserts, or after the watchdog timer expires.
RESET is referenced to VCC.
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–MAX6869
Nanopower µP Supervisory Circuits with
Manual Reset and Watchdog Timer
_______________________________________________________________________________________ 9
MAX6867/MAX6868/MAX6869 Pin Description
PIN
MAX6867/
MAX6869 MAX6868 NAME FUNCTION
11WDI
Watchdog Input. If WDI remains high or low for longer than the watchdog timeout
period, the internal watchdog timer expires, and a reset is triggered for the reset
timeout period. The internal watchdog timer clears whenever reset is asserted,
the manual reset is asserted, or WDI sees a rising or falling edge.
22GND Ground
33MR
Active-Low Manual Reset Input. Drive MR low to initiate a reset. The reset output
remains asserted while MR is held low and for the reset timeout period after MR
transitions high. Leave MR unconnected or connect to VCC if unused. MR is
internally pulled up to VCC through 10kΩ.
4—RESET
Active-Low Open-Drain or Push-Pull Reset Output. RESET transitions from high to
low when VCC drops below the selected reset threshold, MR is pulled low, or the
watchdog timer expires. RESET remains low for the reset timeout period after
VCC exceeds the device reset threshold, MR deasserts, or after the watchdog
timer expires. Push-pull RESET outputs are referenced to VCC. Open-drain
RESET outputs require an external pullup resistor.
55V
CC Supply Voltage. Input for VCC reset monitor. For noisy systems, bypass VCC with
a 0.1µF capacitor to GND.
—4RESET
Active-High Push-Pull Reset Output. RESET transitions from low to high when
VCC drops below the selected reset threshold, MR is pulled low, or the watchdog
timer expires. RESET remains high for the reset timeout period after VCC
exceeds the device reset threshold, MR deasserts, or after the watchdog timer
expires. RESET is referenced to VCC.
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–MAX6869
Nanopower µP Supervisory Circuits with
Manual Reset and Watchdog Timer
10 ______________________________________________________________________________________
MAX6854
MAX6855
MAX6856
MAX6858
MAX6860–
MAX6869
VCC
VCC
WDI
(MAX6864–MAX6869)
RESET
(MAX6854/MAX6856/MAX6858/
MAX6860/MAX6861
MAX6863/MAX6864/MAX6866/
MAX6867/MAX6869)
MR
(MAX6854/MAX6855/MAX6856/
MAX6861–MAX6869)
RESET
TIMEOUT
GENERATOR
RESET
(MAX6855/MAX6862/MAX6865/
MAX6868)
CT
(MAX6861/MAX6862/MAX6863)
1.25V
10kΩ
WATCHDOG
TIMER
GND
WATCHDOG
TRANSITION
DETECTOR
Figure 1. Functional Diagram
VCC
RESET*
*RESET IS THE INVERSE OF RESET.
MR
VTH
tRP
tMRD
tRP
tRD
tMPW
Figure 2. RESET Timing Relationship
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–MAX6869
Nanopower µP Supervisory Circuits with
Manual Reset and Watchdog Timer
______________________________________________________________________________________ 11
Detailed Description
RESET
/RESET Output
A µP’s reset input starts the µP in a known state. The
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–
MAX6869 µP supervisory circuits assert a reset to prevent
code-execution errors during power-up, power-down, and
brownout conditions. The MAX6854/MAX6855/MAX6856/
MAX6858/MAX6860–MAX6869 reset output is guaranteed
to be valid for VCC down to 1.1V.
Whenever VCC falls below the reset threshold, the reset
output asserts low for RESET and high for RESET.
Once VCC exceeds the reset threshold, an internal
timer keeps the reset output asserted for the specified
reset timeout period, then after this interval the reset
output deasserts (see Figure 2).
Manual Reset Input
Many µP-based products require manual reset capabil-
ity, allowing the operator, a test technician, or external
logic circuitry to initiate a reset. The MAX6854/
MAX6855/MAX6856/MAX6861–MAX6869 feature an
MR input. A logic low on MR asserts a reset. Reset
remains asserted while MR is low and for the timeout
period, tRP, after MR returns high. The devices provide
an internal 10kΩpullup from MR to VCC. Leave MR
unconnected or connect to VCC if unused. MR can be
driven with CMOS logic levels or with open-drain/col-
lector outputs. Connect a normally open momentary
switch from MR to GND to implement a manual reset
function; external debounce circuitry is not required. If
MR is driven by long cables or the device is used in a
noisy environment, connect a 0.1µF capacitor from MR
to GND to provide additional noise immunity.
Watchdog Input
The MAX6864–MAX6869’s watchdog timer circuitry
monitors the µP’s activity. If the µP does not toggle
(low-to-high or high-to-low) the watchdog input (WDI)
within the watchdog timeout period (tWDI), reset asserts
for the reset timeout period (tRP). The internal timer is
cleared when reset asserts, when manual reset is
asserted, or by a rising or falling edge on WDI. The
watchdog input detects pulses as short as 150ns.
While reset is asserted the watchdog timer does not
count. As soon as reset deasserts, the watchdog timer
resumes counting (Figure 3).
Applications Information
Selecting the Reset Timeout Period
The reset timeout period for the MAX6854/MAX6855/
MAX6856/MAX6858/MAX6860/MAX6864–MAX6869 is
fixed (see Table 4). The MAX6861/MAX6862/MAX6863
feature a reset timeout select input, CT. Connect CT
according to Table 1 to select between the available
10ms and 150ms (min) reset timeout periods. The time-
out period can be changed while a reset timeout period
is in progress, but will not update until the reset timeout
period has expired.
VCC
WDI tWD
tWDI tRP
RESET*
VCC
OV
OV
*RESET IS THE INVERSE OF RESET.
Figure 3. Detailed Watchdog Input Timing Relationship
Table 1. MAX6861/MAX6862/MAX6863
Reset Timeout Period Selection
CT CONNECTION
MIN TYP
MAX
UNITS
LOW 10 15 25
HIGH 150 225 300 ms
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–MAX6869
Transient Immunity
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, the MAX6854/
MAX6855/MAX6856/MAX6858/MAX6860–MAX6869 are
relatively immune to short-duration supply transients, or
glitches. The Maximum VCC Transient Duration vs. Reset
Threshold Overdrive graph in the Typical Operating
Characteristics shows this relationship.
The area below the curve of the graph is the region in
which these devices typically do not generate a reset
pulse. This graph was generated using a falling pulse
applied to VCC, starting 100mV above the actual reset
threshold, VTH, and ending below this threshold (reset-
threshold overdrive). As the magnitude of the transient
increases, the maximum allowable pulse width
decreases. Typically, a 100mV VCC transient duration
of 40µs or less does not cause a reset.
Interfacing to Other Voltages for Logic
Compatibility
The open-drain RESET output can be used to interface
to a µP with other logic levels. As shown in Figure 4, the
open-drain output can be connected to voltages from 0
to 5.5V.
Generally, the pullup resistor connected to RESET con-
nects to the supply voltage that is being monitored at
the IC’s VCC input. However, some systems use the
open-drain output to level-shift from the monitored sup-
ply to reset circuitry powered by another supply voltage.
Keep in mind that as the supervisor’s VCC decreases,
so does the IC’s ability to sink current at RESET.
Ensuring a Valid
RESET
Down to VCC = 0V
(Push-Pull
RESET
)
When VCC falls below 1.1V, RESET’s current-sinking
capability declines drastically. The high-impedance
CMOS logic inputs connected to RESET can drift to
undetermined voltages. This presents no problems in
most applications, since most µPs and other circuitry
do not operate with VCC below 1.1V.
In those applications where RESET must be valid down
to 0, add a pulldown resistor between RESET and GND
for the MAX6854/MAX6858/MAX6861/MAX6864/
MAX6867 push-pull outputs. The resistor sinks any stray
leakage currents, holding RESET low (Figure 5). Choose
a pulldown resistor that accommodates leakages, such
that RESET is not significantly loaded and is capable of
pulling to GND. The external pulldown cannot be used
with the open-drain reset outputs.
Watchdog Software Considerations
One way to help the watchdog timer monitor software
execution more closely is to set and reset the watchdog
Nanopower µP Supervisory Circuits with
Manual Reset and Watchdog Timer
12 ______________________________________________________________________________________
MAX6856
MAX6860
MAX6863
MAX6866
MAX6869
GND
N
RESET RESET
1.8V
VCC
VCC
GND
3.3V
µP
100kΩ
Figure 4. Interfacing with Other Voltage Levels
VCC
VCC
2MΩ
MAX6854
MAX6858
MAX6861
MAX6864
MAX6867
GND
RESET
Figure 5. Ensuring
RESET
Valid to VCC = Ground
input at different points in the program, rather than
pulsing the watchdog input high-low-high or low-high-
low. This technique avoids a stuck loop, in which the
watchdog timer would continue to be reset inside the
loop, keeping the watchdog from timing out.
Figure 6 shows an example of a flow diagram where
the I/O driving the watchdog input is set high at the
beginning of the program, set low at the beginning of
every subroutine or loop, then set high again when the
program returns to the beginning. If the program
should hang in any subroutine, the problem would
quickly be corrected, since the I/O is continually set low
and the watchdog timer is allowed to time out, causing
a reset or interrupt to be issued.
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–MAX6869
Nanopower µP Supervisory Circuits with
Manual Reset and Watchdog Timer
______________________________________________________________________________________ 13
START
SET WDI
HIGH
PROGRAM
CODE
SUBROUTINE OR
PROGRAM LOOP
SET WDI LOW
RETURN
VCC THRESHOLD FALLING
SUFFIX MIN TYP MAX UNITS
46 4.509 4.625 4.741
45 4.388 4.500 4.613
44 4.266 4.375 4.484
43 4.193 4.300 4.408
42 4.095 4.200 4.305
41 3.998 4.100 4.203
40 3.900 4.000 4.100
39 3.802 3.900 3.998
38 3.705 3.800 3.895
37 3.608 3.700 3.793
36 3.510 3.600 3.690
35 3.413 3.500 3.588
34 3.315 3.400 3.485
33 3.218 3.300 3.383
32 3.120 3.200 3.280
31 2.998 3.075 3.152
30 2.925 3.000 3.075
29 2.852 2.925 2.998
28 2.730 2.800 2.870
27 2.633 2.700 2.768
26 2.559 2.625 2.691
25 2.438 2.500 2.563
24 2.340 2.400 2.460
23 2.255 2.313 2.371
225 2.180 2.235 2.290
22 2.133 2.188 2.243
21 2.048 2.100 2.153
20 1.950 2.000 2.050
19 1.853 1.900 1.948
18 1.755 1.800 1.845
17 1.623 1.665 1.707
16 1.536 1.575 1.614
V
Figure 6. Watchdog Flow Diagram
Table 2. Threshold Suffix Guide
WATCHDOG TIMEOUT PERIOD
SUFFIX
MIN TYP MAX
UNITS
S1.5 3.3 7.75
L95209 487 s
Table 3. Watchdog Timeout
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–MAX6869
Nanopower µP Supervisory Circuits with
Manual Reset and Watchdog Timer
14 ______________________________________________________________________________________
RESET TIMEOUT PERIODS
TIMEOUT
OPTION
MIN TYP MAX
UNITS
D1 10 15 25
D2 40 60 80
D3 150 225 300
D4 1200 1800 2400
D5 300 450 600
D6 600 900 1200
ms
Table 4. Reset Timeout Periods
PART TOP MARK
MAX6854UK16D3 AEFS
MAX6854UK23D3 AEFY
MAX6854UK26D3 AEFZ
MAX6854UK29D3 AEGA
MAX6854UK31D3 AEGB
MAX6856UK16D3 AEGR
MAX6856UK23D3 AEGS
MAX6856UK26D3 AEGT
MAX6856UK29D3 AEGU
MAX6856UK31D3 AEGV
MAX6861UK17 AEKO
MAX6861UK225 AEKS
MAX6861UK26 AEKP
MAX6861UK29 AEKQ
MAX6862UK17 AEOS
MAX6862UK225 AEOT
MAX6862UK26 AEOU
MAX6862UK29 AEOV
MAX6863UK17 AEOW
MAX6863UK225 AEOX
MAX6863UK26 AEOY
MAX6863UK29 AEOZ
MAX6864UK16D3S AEGC
MAX6864UK23D3S AEGD
MAX6864UK26D3S AEGE
MAX6864UK29D3S AEGF
MAX6864UK31D3S AEGG
MAX6866UK16D3S AEGW
MAX6866UK23D3S AEGX
MAX6866UK26D3S AEGY
MAX6866UK29D3S AEFT
MAX6866UK31D3S AEGZ
Table 5. Standard Versions
Ordering Information (continued)
PART†
TEMP RANGE
PIN-PACKAGE
MAX6856UK_ _D_-T
-40°C to +85°C
5 SOT23-5
MAX6858UK_ _D_-T
-40°C to +85°C
5 SOT23-5
MAX6860UK_ _D_-T
-40°C to +85°C
5 SOT23-5
MAX6861UK_ _-T
-40°C to +85°C
5 SOT23-5
MAX6862UK_ _-T
-40°C to +85°C
5 SOT23-5
MAX6863UK_ _-T
-40°C to +85°C
5 SOT23-5
MAX6864UK_ _D_ _-T
-40°C to +85°C
5 SOT23-5
MAX6865UK_ _D_ _-T
-40°C to +85°C
5 SOT23-5
MAX6866UK_ _D_ _-T
-40°C to +85°C
5 SOT23-5
MAX6867UK_ _D_ _-T
-40°C to +85°C
5 SOT23-5
MAX6868UK_ _D_ _-T
-40°C to +85°C
5 SOT23-5
MAX6869UK_ _D_ _-T
-40°C to +85°C
5 SOT23-5
†Insert reset threshold suffix (see Table 2, Threshold Suffix
Guide) after UK. Insert the number corresponding to the desired
reset timeout period (see Table 4, Reset Timeout Period) after D.
Insert the letter corresponding to the desired watchdog timeout
period (S or L, see Table 3) into the blank following the reset
timeout period suffix for the MAX6864–MAX6869.
Note: Sample stock is generally held on standard versions
only (see Table 5, Standard Versions Table). Standard versions
have an order increment of 2500 pieces. Nonstandard versions
have an order increment of 10,000 pieces. Contact factory for
availability of nonstandard versions.
Devices are available in both leaded and lead-free packaging.
Specify lead-free by replacing “-T” with “+T” when ordering.
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–MAX6869
Nanopower µP Supervisory Circuits with
Manual Reset and Watchdog Timer
______________________________________________________________________________________ 15
Pin Configurations
TOP VIEW
I.C.
RESETGND
15VCC
I.C.
MAX6858
MAX6860
SOT23
2
34
GND
GNDMR
15VCC
RESET
(RESET)
MAX6854
MAX6855
MAX6856
SOT23
( ) MAX6855 ONLY
2
34
GND
WDIMR
15VCC
RESET
(RESET)
MAX6864
MAX6865
MAX6866
SOT23
( ) MAX6865 ONLY
2
34
GND
RESET
(RESET)
MR
15VCC
WDI
MAX6867
MAX6868
MAX6869
SOT23
( ) MAX6868 ONLY
2
34
GND
RESET
(RESET)
MR
15VCC
CT
MAX6861
MAX6862
MAX6863
SOT23
( ) MAX6862 ONLY
2
34
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–MAX6869
Nanopower µP Supervisory Circuits with
Manual Reset and Watchdog Timer
16 ______________________________________________________________________________________
Selector Guide
RESET OUTPUT
PART PUSH-PULL
ACTIVE LOW PUSH-PULL
ACTIVE HIGH OPEN-DRAIN ACTIVE
LOW
MR WDI CT
MAX6854 √——√——
MAX6855 — √—√——
MAX6856 — — √√——
MAX6858 √—————
MAX6860 — — √———
MAX6861 √——√—√
MAX6862 — √—√—√
MAX6863 — — √√—√
MAX6864 √——√√—
MAX6865 — √—√√—
MAX6866 — — √√√—
MAX6867 √——√√—
MAX6868 — √—√√—
MAX6869 — — √√√—
Chip Information
TRANSISTOR COUNT: 2848
PROCESS: BiCMOS
MAX6854/MAX6855/MAX6856/MAX6858/MAX6860–MAX6869
Nanopower µP Supervisory Circuits with
Manual Reset and Watchdog Timer
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 17
©2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
SOT-23 5L .EPS
E
11
21-0057
PACKAGE OUTLINE, SOT-23, 5L