©2002 Fairchild Semiconductor Corporation RFD16N05L, RFD16N05LSM Rev. B
RFD16N05L, RFD16N05LSM
16A, 50V, 0.047 Ohm, Logic Level,
N-Channel Power MOSFETs
These are N-Channel logic level power MOSFETs
manufactured using the MegaFET process. This process,
which uses feature sizes approaching those of LSI
integrated circuits gives optimum utilization of silicon,
resulting in outstanding performance. They were designed
for use with logic level (5V) driving sources in applications
such as programmable controllers, automotive switching,
switching regulators, switching converters, motor relay
drivers and emitter switches for bipolar transistors. This
performance is accomplished through a special gate oxide
design which provides full rated conductance at gate biases
in the 3V to 5V range, thereby facilitating true on-off power
control directly from logic circuit supply voltages.
Formerly developmental type TA09871.
Features
• 16A, 50V
•r
DS(ON)
= 0.047
Ω
• UIS SOA Rating Curve (Single Pulse)
• Design Optimized for 5V Gate Drives
• Can be Driven Directly from CMOS, NMOS, TTL Circuits
• Compatible with Automotive Drive Requirements
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Majority Carrier Device
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Packaging
Ordering Information
PART NUMBER PACKAGE BRAND
RFD16N05L TO-251AA RFD16N05L
RFD16N05LSM TO-252AA RFD16N05LSM
NOTE: When ordering, include the entire part number. Add the suffix 9A
to obtain the TO-252AA variant in tape and reel, i.e. RFD16N05LSM9A
G
D
S
JEDEC TO-251AA JEDEC TO-252AA
SOURCE
DRAIN (FLANGE)
GATE
DRAIN
GATE
SOURCE
DRAIN (FLANGE)
Data Sheet January 2002
©2002 Fairchild Semiconductor Corporation RFD16N05L, RFD16N05LSM Rev. B
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
RFD16N05L,
RFD16N05LSM UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DS
50 V
Drain to Gate Voltage (R
GS
= 20k
Ω
) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
50 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
DM
16
45
A
A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
±
10 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Derate Above 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
60
0.48
W
W/
o
C
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
-55 to 150
o
C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
300
260
o
C
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 125
o
C.
Electrical Specifications
T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV
DSS
I
D
= 250mA, V
GS
= 0V, Figure 10 50 - - V
Gate to Threshold Voltage V
GS(TH)
V
GS
= V
DS
, I
D
= 250mA, Figure 9 1 - 2 V
Zero Gate Voltage Drain Current I
DSS
V
DS
= 40V, V
GS
= 0V
T
C
= 150
o
C
-- 1
µ
A
--50
µ
A
Gate to Source Leakage Current I
GSS
V
GS
=
±
10V, V
DS
= 0V - - 100 nA
Drain to Source On Resistance (Note 2) r
DS(ON)
I
D
= 16A, V
GS
= 5V - - 0.047
Ω
I
D
= 16A, V
GS
= 4V - - 0.056
Ω
Turn-On Time t
(ON)
V
DD
= 25V, I
D
= 8A,
V
GS =
5V, R
GS
= 12.5
Ω
Figures 15, 16
- - 60 ns
Turn-On Delay Time t
d(ON)
-14 - ns
Rise Time t
r
-30 - ns
Turn-Off Delay Time t
d(OFF)
-42 - ns
Fall Time t
f
-14 - ns
Turn-Off Time t
(OFF)
- - 100 ns
Total Gate Charge Q
g(TOT)
V
GS
= 0V to 10V V
DD
= 40V,
I
D
= 16A,
R
L
= 2.5
Ω
Figures 17, 18
- - 80 nC
Gate Charge at 5V Q
g(5)
V
GS
= 0V to 5V - - 45 nC
Threshold Gate Charge Q
g(TH)
V
GS
= 0V to 1V - - 3 nC
Thermal Resistance Junction to Case R
θ
JC
- - 2.083
o
C/W
Thermal Resistance Junction to Ambient R
θ
JA
- - 100
o
C/W
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage V
SD
I
SD
= 16A - - 1.5 V
Diode Reverse Recovery Time t
rr
I
SD
= 16A, dI
SD
/dt = 100A/
µ
s - - 125 ns
NOTES:
2. Pulse Test: Pulse Width
≤
300ms, Duty Cycle
≤
2%.
3. Repetitive Rating: Pulse Width limited by max junction temperature.
RFD16N05L, RFD16N05LSM
©2002 Fairchild Semiconductor Corporation RFD16N05L, RFD16N05LSM Rev. B
Typical Performance Curves
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. FORWARD BIAS SAFE OPERATING AREA FIGURE 4. UNCLAMPED INDUCTIVE SWITCHING SOA
(SINGLE PULSE UIS SOA)
FIGURE 5. SATURATION CHARACTERISTICS FIGURE 6. TRANSFER CHARACTERISTICS
TC, CASE TEMPERATURE (oC)
POWER DISSIPATION MULTIPLIER
0
0 25 50 75 100 150
0.2
0.4
0.6
0.8
1.0
1.2
125
TC, CASE TEMPERATURE (oC)
ID, DRAIN CURRENT (A)
0
25 50 75 100 150
5
10
20
125
15
VDS, DRAIN TO SOURCE VOLTAGE (V)
10
0.1
102
1
ID, DRAIN CURRENT (A)
102
10
DC
1
OPERATION IN THIS AREA
LIMITED BY rDS(ON)
ID MAX CONTINUOUS
TC = 25oC
TJ = MAX RATED
10
102
1
IAS, AVALANCHE CURRENT (A)
tAV, TIME IN AVALANCHE (ms)
1100.01 0.10
tAV = (L)(IAS)/(1.3 RATED BVDSS - VDD)
If R = 0
If R ≠ 0
tAV = (L/R)ln[(IAS*R)/(1.3 RATED BVDSS - VDD) +1]
STARTING TJ = 25oC
STARTING TJ = 150oC
Idm
0
15
30
0 1.5 3.0 4.5 7.5
45
IDS, DRAIN TO SOURCE CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = 2V
VGS = 3V
VGS = 10V PULSE DURATION = 80µs
VGS = 5V
VGS = 4V
6.0
TC = 25oC
DUTY CYCLE = 0.5% MAX.
0 3.0 4.5 6.01.5
0
15
30
45
IDS(ON), DRAIN TO SOURCE ON CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDS = 15V
RFD16N05L, RFD16N05LSM
©2002 Fairchild Semiconductor Corporation RFD16N05L, RFD16N05LSM Rev. B
FIGURE 7. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 8. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 9. NORMALIZED GATE THRESHOLD vs JUNCTION
TEMPERATURE
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 12. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Typical Performance Curves Unless Otherwise Specified (Continued)
V
GS
, GATE TO SOURCE VOLTAGE (V)
547
1.4
1.1
1.0
0.7
0.9
0.8
0.6
6
0.5
I
D
= 16V
1.2
1.3
NORMALIZED DRAIN TO SOURCE
V
DS
= 15V
ON RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
0
2.5
1.5
0.5
-50
TJ, JUNCTION TEMPERATURE (oC)
2.0
1.0
050
NORMALIZED DRAIN TO SOURCE
100 200
ID = 16A
150
ON RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
1.1
0.9
0.7
-50
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED GATE
1.0
0.8
0.6 0 200
THRESHOLD VOLTAGE
50 100 150
1.2
1.3
1.4 ID = 250µA
VGS = VDS
1.4
1.0
0.8
50-50
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
1.2
0100 200
BREAKDOWN VOLTAGE
0 150
ID = 250µA
0.6
0101520
25
C, CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
2000
1600
1200
05
800
400
CISS
CRSS
COSS
VGS = 0V
f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGD
50
37.5
12.5
0
20
IG REF()
IG ACT()
-------------------------t, TIME (µs) 80
IG REF()
IG ACT()
-------------------------
10
8
6
2
0
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS , GATE TO SOURCE VOLTAGE (V)
VDD = BVDSS
VDD = 0.75 BVDSS
VDD = 0.50 BVDSS
VDD = 0.25 BVDSS
DESCENDING ORDER:
RL = 3.125Ω, VGS = 5V
IG(REF) = 0.60mA
25
4
DRAIN SOURCE VOLTAGE
PLATEAU VOLTAGES IN
SOURCE
VOLTAGE
GATE
VDD = BVDSS VDD = BVDSS
RFD16N05L, RFD16N05LSM
©2002 Fairchild Semiconductor Corporation RFD16N05L, RFD16N05LSM Rev. B
Test Circuits and Waveforms
FIGURE 13. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 14. UNCLAMPED ENERGY WAVEFORMS
FIGURE 15. SWITCHING TIME TEST CIRCUIT FIGURE 16. RESISTIVE SWITCHING WAVEFORMS
FIGURE 17. GATE CHARGE TEST CIRCUIT FIGURE 18. GATE CHARGE WAVEFORMS
tP
VGS
0.01Ω
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDD
VDS
BVDSS
tP
IAS
tAV
0
VGS
RL
RG
DUT
+
-
VDD
tON
td(ON)
tr
90%
10%
VDS 90%
10%
tf
td(OFF)
tOFF
90%
50%
50%
10% PULSE WIDTH
VGS
0
0
0.3µF
12V
BATTERY 50kΩ
VDS
S
DUT
D
G
IG(REF)
0
(ISOLATED
VDS
0.2µF
CURRENT
REGULATOR
ID CURRENT
SAMPLING
IG CURRENT
SAMPLING
SUPPLY)
RESISTOR RESISTOR
SAME TYPE
AS DUT
Qg(TOT)
Qgd
Qgs
VDS
0
VGS
VDD
IG(REF)
0
RFD16N05L, RFD16N05LSM
©2002 Fairchild Semiconductor Corporation RFD16N05L, RFD16N05LSM Rev. B
x
Spice Model (RFD16N05L)
.SUBCKT RFD16N05L213;rev 04/08/92
*Nominal Temperature = 25oC
.MODEL MOSMOD NMOS (VTO=2.054 KP=24.73 IS=1e-30 N=10 TOX=1 L=1u W=1u)
Vto 21 6 0.448
Rsource 8 7 RDSMOD 0.614E-3
Rdrain 5 16 RDSMOD 27.38E-3
.MODEL RDSMOD RES (TC1=3.66E-3 TC2=1.46E-5)
.MODEL RVTOMOD RES (TC1=-1.81E3 TC2=1.41E-6)
Ebreak 11 7 17 18 70.9
.MODEL RBKMOD RES (TC1=1.01E-3 TC2=5.21E-8)
.MODEL DBKMOD D (RS=8.82E-2 TRS1=-2.01E-3 TRS2=7.32E-10)
.MODEL DBDMOD D (IS=1.34E-13 RS=1.21E-2 TRS1=1.64E-3 TRS2=2.59E-6 +CJO=1.13E-9 TT=4.14E-8)
Cin 6 8 1.21E-9
Ca 12 8 3.33E-9
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-4.25 VOFF=-2.25)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-2.25 VOFF=-4.25)
.MODEL DPLCAPMOD D (CJO=5.22E-10 IS=1e-30 N=10)
Cb 15 14 3.11E-9
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-0.65 VOFF=4.35)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=4.35 VOFF=-0.65)
Rgate 9 20 2.98
Lgate 1 9 1.38E-9
Ldrain 2 5 1.0E-12
Lsource 3 7 1.0E-9
Dbody 7 5 DBDMOD
Dbreak 5 11 DBKMOD
Dplcap 10 5 DPLCAPMOD
Eds148581
Egs138681
Esg610681
Evto 20 6 18 8 1
It8171
MOS1 16688MOSMOD M=0.99
MOS2 16 21 8 8 MOSMOD M=0.01
Rbreak 17 18 RBKMOD 1
Rin 6 8 1e9
Rvto 18 19 RVTOMOD 1
S1a 6 12 13 8 S1AMOD
S1b 13 12 13 8 S1BMOD
S2a 6 15 14 13 S2AMOD
S2b 13 15 14 13 S2BMOD
Vbat819DC1
.ENDS
RFD16N05L, RFD16N05LSM
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER
FAST
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
Rev. H4
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FACT Quiet Series™
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET
STAR*POWER is used under license
VCX™
