PSMN012-100YS
N-channel 100V 12m standard level MOSFET in LFPAK
Rev. 04 — 23 February 2010 Product data sheet
1. Product profile
1.1 General description
S t andard level N-channel MOSFET in LFPAK package qualified to 175 °C. This product is
designed and qualified for use in a wide ran ge of industrial, communications and domestic
equipment.
1.2 Features and benefits
Advanced TrenchMOS provides low
RDSon and low gate charge
High efficiency gains in switching
power conver te rs
Improved mechanical and thermal
characteristics
LFPAK provides maximum power
density in a Power SO8 package
1.3 Applications
DC-to-DC converters
Lithium-ion batt er y pro te ct ion
Load switching
Motor contro l
Server power supplies
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter Conditions Min Typ Max Unit
VDS drain-source voltage Tj25 °C; Tj175 °C - - 100 V
IDdrain current Tmb = 25 °C; see Figure 1 --60A
Ptot total power
dissipation Tmb = 25 °C; see Figure 2 - - 130 W
Tjjunction temperature -55 - 175 °C
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
avalanche energy
VGS =10V; T
j(init) =2C;
ID=60A; V
sup 100 V ;
RGS =50; unclamped
- - 170 mJ
Dynamic characteristics
QGD gate-drain charge VGS =10V; I
D=45A;
VDS = 50 V; see Figure 14
and 15
-19-nC
QG(tot) total gate charge - 64 - nC
PSMN012-100YS_4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 23 February 2010 2 of 15
NXP Semiconductors PSMN012-100YS
N-channel 100V 12m standard level MOSFET in LFPAK
2. Pinning information
3. Ordering information
Static chara cteristics
RDSon drain-source
on-state resistance VGS =10V; I
D=15A;
Tj= 100 °C; see Figure 12 --23m
VGS =10V; I
D=15A;
Tj= 25 °C; see Figure 13 - 1012m
Table 1. Quick reference …continued
Symbol Parameter Conditions Min Typ Max Unit
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1S source
SOT669 (LFPAK)
2S source
3S source
4G gate
mb D mounting base; connected to
drain
mb
1234
S
D
G
m
bb076
Table 3. Ordering information
Type number Package
Name Description Version
PSMN012-100YS LFPAK plastic single-ended surface-mounted package (LFPAK); 4 leads SOT669
PSMN012-100YS_4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 23 February 2010 3 of 15
NXP Semiconductors PSMN012-100YS
N-channel 100V 12m standard level MOSFET in LFPAK
4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maxi mum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage Tj25 °C; Tj175 °C - 100 V
VDGR drain-gate voltage Tj25 °C; Tj175 °C; RGS =20k-100V
VGS gate-source voltage -20 20 V
IDdrain current Tmb = 100 °C; see Figure 1 -43A
Tmb =2C; see Figure 1 -60A
IDM peak drain current tp10 µs; pulsed; Tmb =2C; see Figure 3 -242A
Ptot total power dissipation Tmb =2C; see Figure 2 -130W
Tstg storage temperature -55 175 °C
Tjjunction temperature -55 175 °C
Tsld(M) peak soldering
temperature -260°C
Source-drain diode
ISsource current Tmb =2C - 60 A
ISM peak source current tp10 µs; pulsed; T mb =2C - 242 A
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source avalanche
energy
VGS =10V; T
j(init) =2C; I
D=60A; V
sup 100 V ;
RGS =50; unclamped -170mJ
Fig 1. Continuous drain current as a function of
mounting base temperature Fig 2. Normalized total power dissipation as a
function of mounting base temperature
003aad844
0
20
40
60
80
0 50 100 150 200
Tmb (°C)
ID
(A)
Tmb (°C)
0 20015050 100
03aa16
40
80
120
Pder
(%)
0
PSMN012-100YS_4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 23 February 2010 4 of 15
NXP Semiconductors PSMN012-100YS
N-channel 100V 12m standard level MOSFET in LFPAK
Fig 3. Safe operating area; continuous and pe ak drain currents as a function of drain -s ou rce voltage
003aad845
10-1
1
10
102
103
1 10 102 103
VDS (V)
ID
(A)
DC
Limit RDSon = VDS / ID
100 ms
10 ms
1 ms
100 μs
tp = 10 μs
PSMN012-100YS_4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 23 February 2010 5 of 15
NXP Semiconductors PSMN012-100YS
N-channel 100V 12m standard level MOSFET in LFPAK
5. Thermal characteristics
Table 5. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-mb) thermal resistance from junction to mounting
base see Figure 4 - 0.5 1.1 K/W
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration; typical
values
003aad846
single shot
0.2
0.1
0.05
0.02
10-3
10-2
10-1
1
10-6 10-5 10-4 10-3 10-2 10-1 1
tp (s)
Zth(j-mb)
(K/W) d = 0.5
tp
T
P
t
tp
T
δ =
PSMN012-100YS_4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 23 February 2010 6 of 15
NXP Semiconductors PSMN012-100YS
N-channel 100V 12m standard level MOSFET in LFPAK
6. Characteristics
Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V(BR)DSS drain-source
breakdown voltage ID=0.25mA; V
GS =0V; T
j=-5C 90 - - V
ID=0.25mA; V
GS =0V; T
j=2C 100 - - V
VGS(th) gate-source threshold
voltage ID=1mA; V
DS = VGS; Tj= 175 °C;
see Figure 10 0.95 - - V
ID=1mA; V
DS = VGS; Tj= 25 °C; see Figure 1 1
and 10 234V
ID=1mA; V
DS = VGS; Tj=-5C;
see Figure 10 --4.6V
IDSS drain leakage current VDS =100V; V
GS =0V; T
j= 125 °C - - 100 µA
VDS =100V; V
GS =0V; T
j= 25 °C - 0.06 5 µA
IGSS gate leakage current VGS =20V; V
DS =0V; T
j= 25 °C - 10 100 nA
VGS =-20V; V
DS =0V; T
j= 25 °C - 10 100 nA
RDSon drain-source on-state
resistance VGS =10V; I
D=15A; T
j= 100 °C;
see Figure 12 --23m
VGS =10V; I
D=15A; T
j= 175 °C;
see Figure 12 -2735.8m
VGS =10V; I
D=15A; T
j=2C;
see Figure 13 -1012m
RGinternal gate resistance
(AC) f=1MHz - 0.7 -
Dynamic character istics
QG(tot) total gate charge ID=0A; V
DS =0V; V
GS =10V - 51 - nC
ID=45A; V
DS =50V; V
GS =10V;
see Figure 14 and 15 -64-nC
QGS gate-source charge - 14.9 - nC
QGS(th) pre-threshold
gate-source charge ID=45A; V
DS =50V; V
GS =10V;
see Figure 14 - 10.2 - nC
QGS(th-pl) post-threshold
gate-source charge -4.7-nC
QGD gate-drain charge ID=45A; V
DS =50V; V
GS =10V;
see Figure 14 and 15 -19-nC
VGS(pl) gate-source plateau
voltage VDS =50V; see Figure 14 and 15 -4.4-V
Ciss input capacitance VDS =50V; V
GS = 0 V; f = 1 MHz; Tj=2C;
see Figure 16 - 3500 - pF
Coss output capacitance - 246 - pF
Crss reverse transfer
capacitance - 149 - pF
td(on) turn-on delay time VDS =50V; R
L=1.1; VGS =10V;
RG(ext) =4.7; Tj=2C -23-ns
trrise time - 31 - ns
td(off) turn-off delay time - 52.5 - ns
tffall time - 25 - ns
PSMN012-100YS_4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 23 February 2010 7 of 15
NXP Semiconductors PSMN012-100YS
N-channel 100V 12m standard level MOSFET in LFPAK
Source-drain diode
VSD source-drain voltage IS=15A; V
GS =0V; T
j= 25 °C; see Figure 17 -0.81.2V
trr reverse recovery time IS=15A; dI
S/dt = 100 A/µs; VGS =0V;
VDS =50V -56-ns
Qrrecovered charge - 129 - nC
Table 6. Characteristics …continued
Symbol Parameter Conditions Min Typ Max Unit
Fig 5. Forward transconductance as a function of
drain current; typical values Fig 6. Input and reverse transfer capacitances as a
function of gate-source vo ltage; typical values
Fig 7. Drain-source on-state resistance as a function
of gate-source voltage; typical values Fig 8. Output charac ter istics: drai n cu r re nt as a
function of drain-source voltage; typical values
003aad849
0
30
60
90
120
0 25 50 75 100
ID (A)
gfs
(S)
003aad850
0
2000
4000
6000
036912
VGS (V)
C
(pF) Ciss
Crss
003aad852
4
13
22
31
40
2 8 14 20
VGS (V)
RDSon
(mΩ)
003aad847
0
30
60
90
120
012
VDS (V)
ID
(A)
4.5
VGS (V) = 4
4.8
5.0
5.510.0
PSMN012-100YS_4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 23 February 2010 8 of 15
NXP Semiconductors PSMN012-100YS
N-channel 100V 12m standard level MOSFET in LFPAK
Fig 9. Tran sfer characteristics: drain current as a
function of gate-source voltage; typical values Fig 10. Gate-source threshold voltage as a function of
junction temperature
Fig 11. Sub-threshold drain current as a function of
gate-source voltage Fig 12. Normalized drain-source on-state resistance
factor as a functio n o f jun ction temperature
003aad848
0
25
50
75
100
0246
VGS (V)
ID
(A)
Tj = 25 °CTj = 175 °C
Tj (°C)
60 180120060
003aad280
2
3
1
4
5
VGS(th)
(V)
0
max
typ
min
03aa35
VGS (V)
0642
104
105
102
103
101
ID
(A)
106
min typ max
003aad774
0
0.8
1.6
2.4
3.2
-60 0 60 120 180
T
j
(°C)
a
PSMN012-100YS_4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 23 February 2010 9 of 15
NXP Semiconductors PSMN012-100YS
N-channel 100V 12m standard level MOSFET in LFPAK
Fig 13. Drain-source on-state resistance as a function
of drain current; typical values Fig 14. Gat e ch arge wa ve fo rm de finitions
Fig 15. Gate-source voltage as a function of gate
charge; typical values Fig 16. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
003aad853
0
15
30
45
0 20406080
ID (A)
RDSon
(mΩ)
5.0
4.8
5.5
VGS (V) =
10.0
4.5
003aaa508
VGS
VGS(th)
QGS1 QGS2
QGD
VDS
QG(tot)
ID
QGS
VGS(pl)
003aad854
0
2
4
6
8
10
0 20406080
QG (nC)
VGS
(V)
VDS = 50V
80V
20V
003aad851
10
102
103
104
10-1 1 10 102
VDS (V)
C
(pF) Ciss
Crss
Coss
PSMN012-100YS_4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 23 February 2010 10 of 15
NXP Semiconductors PSMN012-100YS
N-channel 100V 12m standard level MOSFET in LFPAK
Fig 17. Sou rce ( dio de forwa r d) current as a function of source-drain (diode forward) voltage; typical values
003aad855
0
25
50
75
100
0 0.3 0.6 0.9 1.2
VSD (V)
IS
(A)
Tj = 25 °CTj = 175 °C
PSMN012-100YS_4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 23 February 2010 11 of 15
NXP Semiconductors PSMN012-100YS
N-channel 100V 12m standard level MOSFET in LFPAK
7. Package outline
Fig 18. Package outline SOT669 (LFPAK)
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT669 MO-235 04-10-13
06-03-16
0 2.5 5 mm
scale
e
E1
b
c2
A2
A2bcA e
UNIT
DIMENSIONS (mm are the original dimensions)
mm 1.10
0.95
A3
A1
0.15
0.00
1.20
1.01
0.50
0.35
b2
4.41
3.62
b3
2.2
2.0
b4
0.9
0.7
0.25
0.19
c2
0.30
0.24
4.10
3.80
6.2
5.8
H
1.3
0.8
L2
0.85
0.40
L
1.3
0.8
L1
8°
0°
wy
D(1)
5.0
4.8
E(1)
3.3
3.1
E1(1)
D1(1)
max
0.25 4.20 1.27 0.25 0.1
1234
mounting
base
D1
c
P
lastic single-ended surface-mounted package (LFPAK); 4 leads SOT66
9
E
b2
b3
b4
HD
L2
L1
A
A
wM
C
C
X
1/2 e
yC
θ
θ
(A )
3
L
A
A1
detail X
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
PSMN012-100YS_4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 23 February 2010 12 of 15
NXP Semiconductors PSMN012-100YS
N-channel 100V 12m standard level MOSFET in LFPAK
8. Revision history
Table 7. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PSMN012-100YS_4 20100223 Product data sheet - PSMN012-100YS_3
Modifications: Status changed from objective to product.
PSMN012-100YS_3 20100107 Product data sheet - PSMN012-100YS_2
PSMN012-100YS_2 20091214 Objectiv e data sheet - PSMN012-100YS_1
PSMN012-100YS_1 20091022 Objecti v e data sheet - -
PSMN012-100YS_4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 23 February 2010 13 of 15
NXP Semiconductors PSMN012-100YS
N-channel 100V 12m standard level MOSFET in LFPAK
9. Legal information
9.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) de scribed in th is document may have changed since this document was published an d may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
9.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semicond uctors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre va il.
Product specifica t io nThe information and dat a provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
9.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warrant ies, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indire ct, incidental,
punitive, special or consequ ential damages (including - wit hout limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggreg ate and cumulative l iability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descripti ons, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for useNXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, mili tary, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
NXP Semiconductors does not accept any liabil i ty related to any default,
damage, costs or problem which is based on a weakness or default in the
customer application /use or t he application/use of customer’s third party
customer(s) (hereinafter both referred to as “Application”). It is customer’s
sole responsibility to check whether the NXP Semiconductors product is
suitable and fit for the Appl ica tion plann ed. Customer has to do all necessary
testing for the Application in order to avoid a default of the Application and t he
product. NXP Semiconductors does not accept any liability in this respect.
Quick reference data — The Quick reference dat a i s an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress rating s only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the ter m s and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or inte llectual property right s.
Document status [1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development .
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] dat a sheet Production This document contains the product specification.
PSMN012-100YS_4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 23 February 2010 14 of 15
NXP Semiconductors PSMN012-100YS
N-channel 100V 12m standard level MOSFET in LFPAK
Export control — This document as well as the item(s) d escribed herein may
be subject to export control regulat i ons. Export might require a pr ior
authorization from national authorities.
Non-automotive qualified products — Unless the data sheet of an NXP
Semiconductors product expressly states that the product is aut omotive
qualified, the product is not suitable for automotive use. It is neither qualified
nor tested in accordan ce with a uto moti ve t estin g or ap plicat ion requiremen ts.
NXP Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in auto motive equipment or applications. In
the event that cust omer uses the product for design-in and use in automot ive
applications to automotive specifica tions and standa rds, customer (a) shall
use the product without NXP Semiconductors’ warranty of the product for
such automotive applications, use and specifications, and (b) whenever
customer uses the product for automotive applications beyond NXP
Semiconductors’ specifications such use shall be solely at customer’s own
risk, and (c) customer fully indemnifies NXP Semiconductors for any liability,
damages or failed product claims resulting from customer de sign and use of
the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
9.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respective ow ners.
TrenchMOS — is a trademark of NXP B.V.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors PSMN012-100YS
N-channel 100V 12m standard level MOSFET in LFPAK
© NXP B.V. 2010. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 23 February 2010
Document identifier : P SM N 01 2-100YS_4
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
11. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1 General description . . . . . . . . . . . . . . . . . . . . . .1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . .1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . .2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . .2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
5 Thermal characteristics . . . . . . . . . . . . . . . . . . .5
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6
7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .11
8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . .12
9 Legal information. . . . . . . . . . . . . . . . . . . . . . . .13
9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13
9.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
9.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .13
9.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .14
10 Contact information. . . . . . . . . . . . . . . . . . . . . .14