15 kV ESD Protected, 3.3 V Single-Channel RS-232 Line Driver/Receiver ADM3101E FEATURES 460 kbps data rate 1 Tx and 1 Rx Meets EIA/TIA-232E specifications 0.1 F charge pump capacitors Contact discharge: 8 kV Air gap discharge: 15 kV APPLICATIONS General-purpose RS-232 data links Industrial/telecommunications diagnostics ports FUNCTIONAL BLOCK DIAGRAM +3.3V INPUT C1 + 0.1F 16V C1+ C2 + 0.1F 16V C2+ CMOS INPUT C1- C2- TIN +3.3V TO +6.6V VOLTAGE DOUBLER +6.6V TO -6.6V VOLTAGE INVERTER VCC V+ V- TOUT T + C3 0.1F 6.3V + C5 0.1F + C4 0.1F 16V EIA/TIA-232E OUTPUT ADM3101E CMOS OUTPUT ROUT R RIN EIA/TIA-232E INPUT* *INTERNAL 5k PULL-DOWN RESISTOR ON THE RS-232 INPUT. 06766-001 GND Figure 1. GENERAL DESCRIPTION The ADM3101E is a high speed, single-channel, RS-232/ ITU-T V.28 transceiver interface device that operates from a single 3.3 V power supply. Low power consumption makes it ideal for battery-powered portable instruments. Because of the 15 kV ESD protection of the ADM3101E input/output pins, this device is ideally suited for operation in electrically harsh environments or where RS-232 cables are frequently plugged and unplugged. The ADM3101E conforms to the EIA/TIA-232E and ITU-T V.28 specifications and operates at data rates of up to 460 kbps. Four external 0.1 F charge pump capacitors are used for the voltage doubler/inverter permitting operation from a single 3.3 V supply. All RS-232 (TOUT and RIN) and CMOS (TIN and ROUT) inputs and outputs are protected against electrostatic discharges (up to 15 kV ESD protection). The ADM3101E is available in both a 12-lead LFCSP and 16-lead QSOP, specified over the -40C to +85C temperature range. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2007-2008 Analog Devices, Inc. All rights reserved. ADM3101E TABLE OF CONTENTS Features .............................................................................................. 1 Pin Configurations and Function Descriptions ............................5 Applications ....................................................................................... 1 Typical Performance Characteristics ..............................................6 Functional Block Diagram .............................................................. 1 Theory of Operation .........................................................................8 General Description ......................................................................... 1 Circuit Description .......................................................................8 Revision History ............................................................................... 2 High Baud Rate ..............................................................................8 Specifications..................................................................................... 3 Outline Dimensions ..........................................................................9 Absolute Maximum Ratings............................................................ 4 Ordering Guide .............................................................................9 ESD Caution .................................................................................. 4 REVISION HISTORY 7/08--Rev. B to Rev. C Changes to General Description Section ...................................... 1 Reformatted Table 1 ......................................................................... 4 Change to TIN Rating, Table 2 ......................................................... 4 Changes to Figure 2 .......................................................................... 5 Moved High Baud Rate Section ...................................................... 8 Added Exposed Pad Notation to Outline Dimensions ............... 9 10/07--Rev. 0 to Rev. A Changes to Figure 1 ...........................................................................1 Changes to Table 1, RS-232 Receiver Section ................................3 Changes to Table 3.............................................................................5 Changes to Figure 11.........................................................................8 5/07--Revision 0: Initial Version 12/07--Rev. A to Rev. B Added 16-lead QSOP Package (Universal) ................................... 1 Updated Outline Dimensions ....................................................... 10 Changes to Ordering Guide .......................................................... 10 Rev. C | Page 2 of 12 ADM3101E SPECIFICATIONS VCC = 3.3 V 0.3 V, C1 to C4 = 0.1 F, -40C TA +85C, unless otherwise noted. Table 1. Parameter DC CHARACTERISTICS Operating Voltage Range Power Supply Current, VCC LOGIC Input Logic Threshold Low, VINL Input Logic Threshold High, VINH Input Logic Threshold Low, VINL Input Logic Threshold High, VINH CMOS Output Voltage Low, VOL CMOS Output Voltage High, VOH Logic Pull-Up Current RS-232 RECEIVER EIA/TIA-232E Input Voltage Range 1 EIA/TIA-232E Input Threshold Low EIA/TIA-232E Input Threshold High EIA/TIA-232E Input Hysteresis EIA/TIA-232E Input Resistance TRANSMITTER Output Voltage Swing RS-232 RS-562 Transmitter Output Resistance RS-232 Output Short-Circuit Current TIMING CHARACTERISTICS Maximum Data Rate Receiver Propagation Delay tPHL tPLH Transmitter Propagation Delay Transmitter Skew Receiver Skew Transition Region Slew Rate ESD PROTECTION RS-232 and CMOS I/O Pins 1 Test Conditions/Comments Min Typ Max Unit 3.0 3.3 1.5 5 5.5 2.6 7 V mA mA 0.6 V V V V V V A No load RL = 3 k to GND TIN TIN TIN, VCC = 5.0 V 0.5 V TIN, VCC = 5.0 V 0.5 V IOUT = 1.6 mA IOUT = -1 mA TIN = GND to VCC VCC = 3.0 V to 5.5 V VCC = 3.3 V to 5.5 V; transmitter output loaded with 3 k to ground VCC = 3.0 V VCC = 0 V, VOUT = 2 V1 VCC = 3.3 V, RL = 3 k to 7 k, CL = 50 pF to 1000 pF 1.4 0.8 2.0 0.4 VCC - 0.6 5 -30 0.6 Human body model air discharge Human body model contact discharge Guaranteed by design. Rev. C | Page 3 of 12 +30 V V V V k 3 1.3 1.6 0.4 5 5.0 5.7 V 15 V mA 2.4 7 4.5 300 460 RL = 3 k, CL = 1000 pF +3 V to -3 V or -3 V to +3 V, VCC = +3.3 V, RL = 3 k, CL = 1000 pF, TA = 25C1 12 5.5 kbps 0.4 0.4 600 80 70 10 15 8 30 s s ns ns ns V/s kV kV ADM3101E ABSOLUTE MAXIMUM RATINGS TA = 25C, unless otherwise noted. Table 2. Parameter VCC V+ V- Input Voltages TIN RIN Output Voltages TOUT ROUT Short-Circuit Duration TOUT Package Information JA, Thermal Impedance (LFCSP) JA, Thermal Impedance (QSOP) Operating Temperature Range Industrial (A Version) Storage Temperature Range Pb-Free Temperature (Soldering, 10 sec) Rating -0.3 V to +6 V (VCC - 0.3 V) to +13 V +0.3 V to -13 V -0.3 V to (VCC + 0.3 V) 30 V Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION 15 V -0.3 V to (VCC + 0.3 V) Continuous 61.1C/W 149.97C/W -40C to +85C -65C to +150C 260C Rev. C | Page 4 of 12 ADM3101E 10 C2- PIN 1 INDICATOR C1+ 1 9 RIN ADM3101E ROUT 2 8 TOUT 7 V- GND 6 V+ 4 VCC 5 TOP VIEW (Not to Scale) TIN 3 NOTES 1. PADDLE CONNECTED TO GND. THIS CONNECTION IS NOT REQUIRED TO MEET THE ELECTRICAL PERFORMANCES. 06766-002 12 C1- 11 C2+ PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 2. LFCSP Pin Configuration C1- 1 16 C2+ C1+ 2 15 C2- TIN 5 14 NC ADM3101E TOP VIEW (Not to Scale) 13 RIN 12 TOUT NC 6 11 NC V+ 7 10 V- VCC 8 9 NC = NO CONNECT GND 06766-014 NC 3 ROUT 4 Figure 3. QSOP Pin Configuration Table 3. Pin Function Descriptions Pin No. LFCSP QSOP 1, 12 2, 1 Mnemonic C1+, C1- 2 3 4 5 6 7 8 9 4 5 7 8 9 10 12 13 ROUT TIN V+ VCC GND V- TOUT RIN 10, 11 15, 16 C2-, C2+ N/A 3, 6, 11, 14 NC Description Positive and Negative Connections for Charge Pump Capacitor. External Capacitor C1 is connected between these pins; a 0.1 F capacitor is recommended, but larger capacitors up to 10 F can be used. Receiver Output. This pin outputs CMOS output logic levels. Transmitter (Driver) Input. This input accepts TTL/CMOS levels. Internally Generated Positive Supply (+6 V Nominal). Power Supply Input, 3.0 V to 5.5 V. Ground. Must be connected to 0 V. Internally Generated Negative Supply (-6 V Nominal). Transmitter (Driver) Output. This pin outputs RS-232 signal levels (typically 6 V). Receiver Input. This input accepts RS-232 signal levels. An internal 5 k pull-down resistor to GND is connected on the input. Positive and Negative Connections for Charge Pump Capacitor. External Capacitor C2 is connected between these pins; a 0.1 F capacitor is recommended, but larger capacitors up to 10 F can be used. No Connect. These pins should always remain unconnected. Rev. C | Page 5 of 12 ADM3101E TYPICAL PERFORMANCE CHARACTERISTICS 8 8 VCC = 3.3V VCC = 3.3V 6 6 V+ 4 2 2 VOLTAGE (V) 0 -2 -2 -4 Tx OUTPUT LOW 0 200 400 600 800 1000 LOAD CAPACITANCE (pF) -8 06766-003 -8 V- -6 0 4 6 350 CHARGE PUMP IMPEDANCE () 300 10 Tx OUTPUT (V) 3 Figure 7. Charge Pump V+, V- vs. Load Current 15 Tx OUTPUT HIGH 5 0 -5 Tx OUTPUT LOW -10 V- 250 200 V+ 150 100 50 4 6 5 0 06766-004 3 VCC (V) 3 4 5 VCC (V) Figure 5. Transmitter Output Voltage High/Low vs. VCC, RL = 3 k Figure 8. Charge Pump Impedance vs. VCC 8 14 VCC = 3.3V VCC = 3.3V 6 12 Tx OUTPUT HIGH 4 10 2 IDD (mA) Tx OUTPUT (V) 2 LOAD CURRENT (mA) Figure 4. Transmitter Output Voltage High/Low vs. Load Capacitance @ 460 kbps -15 1 06766-006 -6 06766-007 -4 0 0 8 6 -2 4 -4 Tx OUTPUT LOW 2 -8 0 1 2 3 4 LOAD CURRENT (mA) 06766-005 -6 Figure 6. Transmitter Output Voltage High/Low vs. Load Current 0 0 200 400 600 800 LOAD CAPACITANCE (pF) Figure 9. Power Supply Current vs. Load Capacitance Rev. C | Page 6 of 12 1000 06766-008 Tx OUTPUT (V) Tx OUTPUT HIGH 4 ADM3101E 5.0 TIN VOLTAGE THRESHOLDS (V) 1 2 4.0 3.5 3.0 2.5 2.0 1.5 1.0 TIME (1s/DIV) 0 3.0 3.5 4.0 4.5 5.0 VCC (V) Figure 11. TIN Voltage Threshold vs. VCC Figure 10. 460 kbps Data Transmission Rev. C | Page 7 of 12 5.5 06766-010 0.5 VCC = 3.3V LOAD = 3k AND 1nF 06766-009 5V/DIV 5V/DIV 4.5 ADM3101E THEORY OF OPERATION FROM VOLTAGE DOUBLER * A charge pump voltage converter * A 3.3 V logic to an EIA/TIA-232E transmitter * An EIA/TIA-232E to a 3.3 V logic receiver +3.3V INPUT C2 + 0.1F 16V C2+ CMOS INPUT VCC +3.3V TO +6.6V VOLTAGE DOUBLER TIN V- TOUT T + C3 0.1F 6.3V V+ +6.6V TO -6.6V VOLTAGE INVERTER C2- ROUT S2 C2 + S4 GND C4 V- = -(V+) RIN R The transmitter driver converts the 3.3 V logic input levels into RS-232 output levels. When driving an RS-232 load with VCC = 3.3 V, the output voltage swing is typically 6 V. Internally, the TIN pin has a weak pull-up that allows it to be driven by an open-drain output, but the maximum operating data rate is reduced when the TIN pin is driven by an open-drain pin. EIA/TIA-232E to 3.3 V Logic Receiver The receiver is an inverting level shifter that accepts the RS-232 input level and translates it into a 3.3 V logic output level. The input has an internal 5 k pull-down resistor to ground and is protected against overvoltages of up to 30 V. An unconnected input is pulled to 0 V by the internal 5 k pull-down resistor, which, therefore, results in a Logic 1 output level for an unconnected input or for an input connected to GND. + C5 0.1F + C4 0.1F 16V EIA/TIA-232E OUTPUT ADM3101E CMOS OUTPUT + 3.3 V Logic to EIA/TIA-232E Transmitter The internal circuitry consists of the following main sections: C1- S3 Figure 14. Charge Pump Voltage Inverter CIRCUIT DESCRIPTION C1 + 0.1F 16V GND S1 INTERNAL OSCILLATOR CMOS technology is used to keep the power dissipation to an absolute minimum, allowing maximum battery life in portable applications. C1+ V+ 06766-013 The ADM3101E is a single-channel RS-232 line driver/receiver. Step-up voltage converters, coupled with level shifting transmitters and receivers, allow RS-232 levels to be developed while operating from a single 3.3 V supply. The receiver has a Schmitt trigger input with a hysteresis level of 0.4 V, which ensures error-free reception for both a noisy input and for an input with slow transition times. EIA/TIA-232E INPUT* GND 06766-011 CMOS Input Voltage Thresholds *INTERNAL 5k PULL-DOWN RESISTOR ON THE RS-232 INPUT. Figure 12. Typical Operating Circuit Charge Pump Voltage Converter The charge pump voltage converter consists of a 200 kHz oscillator and a switching matrix. The converter generates a 6.6 V supply (when unloaded) from the 3.3 V input level. This is achieved in two stages by using a switched capacitor technique, as illustrated in Figure 13 and Figure 14. First, the 3.3 V input supply is doubled to +6.6 V by using C1 as the charge storage element. The +6.6 V level is then inverted to generate -6.6 V using C2 as the storage element. C3 is shown connected between V+ and VCC but is equally effective if connected between V+ and GND. The C3 and C4 capacitors are used to reduce the output ripple. The values are not critical and can be increased, if desired. Larger capacitors (up to 10 F) can also be used in place of the C1, C2, C3, and C4 capacitors. S3 + S2 GND C1 + S4 V+ = 2VCC The CMOS input and output pins (TIN and ROUT) of the ADM3101E are also designed to interface with TTL/CMOS logic thresholds when VCC = 5 V. ESD Protection on RS-232 and CMOS I/O Pins All RS-232 (TOUT and RIN) and CMOS (TIN and ROUT) inputs and outputs are protected against electrostatic discharges (up to 15 kV). HIGH BAUD RATE The ADM3101E features high slew rates, permitting data transmission at rates well in excess of the EIA/RS-232 specifications. The RS-232 voltage levels are maintained at data rates of up to 460 kbps, even under worst-case loading conditions, when TIN is driven by a push-pull output. The slew rate is internally controlled to less than 30 V/s to minimize EMI interference. C3 VCC INTERNAL OSCILLATOR 06766-012 S1 VCC The CMOS input and output pins (TIN and ROUT) of the ADM3101E are designed to interface with 1.8 V logic thresholds when VCC = 3.3 V. Figure 13. Charge Pump Voltage Doubler Rev. C | Page 8 of 12 ADM3101E OUTLINE DIMENSIONS 12 MAX 0.50 BSC 0.60 MAX 10 2.95 2.75 SQ 2.55 TOP VIEW PIN 1 INDICATOR 1.00 0.85 0.80 0.60 MAX 9 0.75 0.60 0.50 7 EXPOSED PAD (BOTTOM VIEW) 6 0.20 REF 3 *1.45 1.30 SQ 1.15 4 *PADDLE CONNECTED TO GND. THIS CONNECTION IS NOT REQUIRED TO MEET THE ELECTRICAL PERFORMANCES. 0.05 MAX 0.02 NOM 0.30 0.23 0.18 1 0.25 MIN 0.80 MAX 0.65 TYP SEATING PLANE PIN 1 INDICATOR 12 COPLANARITY 0.08 050808-B 3.15 3.00 SQ 2.85 *COMPLIANT TO JEDEC STANDARDS MO-220-VEED-1 EXCEPT FOR EXPOSED PAD DIMENSION. Figure 15. 12-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 3 mm x 3 mm Body, Very Thin Quad (CP-12-1) Dimensions shown in millimeters 0.197 (5.00) 0.193 (4.90) 0.189 (4.80) 16 9 1 8 0.244 (6.20) 0.236 (5.99) 0.228 (5.79) 0.010 (0.25) 0.006 (0.15) 0.069 (1.75) 0.053 (1.35) 0.065 (1.65) 0.049 (1.25) 0.010 (0.25) 0.004 (0.10) COPLANARITY 0.004 (0.10) 0.158 (4.01) 0.154 (3.91) 0.150 (3.81) 0.025 (0.64) BSC SEATING PLANE 0.012 (0.30) 0.008 (0.20) 8 0 0.050 (1.27) 0.016 (0.41) 0.020 (0.51) 0.010 (0.25) 0.041 (1.04) REF 012808-A COMPLIANT TO JEDEC STANDARDS MO-137-AB CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 16. 16-Lead Shrink Small Outline Package [QSOP] (RQ-16) Dimensions shown in inches ORDERING GUIDE Model ADM3101EACPZ-REEL 1 ADM3101EACPZ-250R71 ADM3101EARQZ1 ADM3101EARQZ-REEL1 1 Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C Package Description 12-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 12-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 16-Lead Shrink Small Outline Package [QSOP] 16-Lead Shrink Small Outline Package [QSOP] Z = RoHS Compliant Part. Rev. C | Page 9 of 12 Package Option CP-12-1 CP-12-1 RQ-16 RQ-16 Branding MA6 MA6 ADM3101E NOTES Rev. C | Page 10 of 12 ADM3101E NOTES Rev. C | Page 11 of 12 ADM3101E NOTES (c)2007-2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06766-0-7/08(C) Rev. C | Page 12 of 12