±15 kV ESD Protected, 3.3 V Single-Channel
RS-232 Line Driver/Receiver
ADM3101E
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2007–2008 Analog Devices, Inc. All rights reserved.
FEATURES
460 kbps data rate
1 Tx and 1 Rx
Meets EIA/TIA-232E specifications
0.1 μF charge pump capacitors
Contact discharge: ±8 kV
Air gap discharge: ±15 kV
APPLICATIONS
General-purpose RS-232 data links
Industrial/telecommunications diagnostics ports
FUNCTIONAL BLOCK DIAGRAM
ADM3101E
GND
+3.3V INPU
T
+
+
+
C1
0.1µF
16V
C2
0.1µF
16V
+
+
T
R
+3.3V TO +6.6V
VOLTAGE DOUBLER
+6.6V TO –6.6V
VOLTAGE INVERTER
C1+
C1–
C2+
C2–
T
IN
R
OUT
CMOS
INPUT
CMOS
OUTPUT
R
IN
V
CC
V+
V–
T
OUT
C5
0.1µF
C3
0.1µF
6.3V
C4
0.1µF
16V
EIA/TIA-232E
OUTPUT
EIA/TIA-232E
INPUT*
*INTERNAL 5k PULL-DOWN
RESISTOR ON THE RS-232 INPUT.
0
6766-001
Figure 1.
GENERAL DESCRIPTION
The ADM3101E is a high speed, single-channel, RS-232/
ITU-T V.28 transceiver interface device that operates from
a single 3.3 V power supply. Low power consumption makes
it ideal for battery-powered portable instruments.
The ADM3101E conforms to the EIA/TIA-232E and ITU-T V.28
specifications and operates at data rates of up to 460 kbps.
All RS-232 (TOUT and RIN) and CMOS (TIN and ROUT) inputs
and outputs are protected against electrostatic discharges (up
to ±15 kV ESD protection).
Because of the ±15 kV ESD protection of the ADM3101E
input/output pins, this device is ideally suited for operation
in electrically harsh environments or where RS-232 cables are
frequently plugged and unplugged.
Four external 0.1 μF charge pump capacitors are used for the
voltage doubler/inverter permitting operation from a single
3.3 V supply.
The ADM3101E is available in both a 12-lead LFCSP and 16-lead
QSOP, specified over the −40°C to +85°C temperature range.
ADM3101E
Rev. C | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
ESD Caution .................................................................................. 4
Pin Configurations and Function Descriptions ............................5
Typical Performance Characteristics ..............................................6
Theory of Operation .........................................................................8
Circuit Description .......................................................................8
High Baud Rate ..............................................................................8
Outline Dimensions ..........................................................................9
Ordering Guide .............................................................................9
REVISION HISTORY
7/08—Rev. B to Rev. C
Changes to General Description Section ...................................... 1
Reformatted Table 1 ......................................................................... 4
Change to TIN Rating, Table 2 ......................................................... 4
Changes to Figure 2 .......................................................................... 5
Moved High Baud Rate Section ...................................................... 8
Added Exposed Pad Notation to Outline Dimensions ............... 9
12/07—Rev. A to Rev. B
Added 16-lead QSOP Package (Universal) ................................... 1
Updated Outline Dimensions ....................................................... 10
Changes to Ordering Guide .......................................................... 10
10/07—Rev. 0 to Rev. A
Changes to Figure 1 ........................................................................... 1
Changes to Table 1, RS-232 Receiver Section ................................ 3
Changes to Table 3 ............................................................................. 5
Changes to Figure 11 ......................................................................... 8
5/07—Revision 0: Initial Version
ADM3101E
Rev. C | Page 3 of 12
SPECIFICATIONS
VCC = 3.3 V ± 0.3 V, C1 to C4 = 0.1 μF, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
DC CHARACTERISTICS
Operating Voltage Range 3.0 3.3 5.5 V
Power Supply Current, VCC No load 1.5 2.6 mA
R
L = 3 kΩ to GND 5 7 mA
LOGIC
Input Logic Threshold Low, VINL TIN 0.6 V
Input Logic Threshold High, VINH TIN 1.4 V
Input Logic Threshold Low, VINL TIN, VCC = 5.0 V ± 0.5 V 0.8 V
Input Logic Threshold High, VINH TIN, VCC = 5.0 V ± 0.5 V 2.0 V
CMOS Output Voltage Low, VOL IOUT = 1.6 mA 0.4 V
CMOS Output Voltage High, VOH IOUT = −1 mA VCC − 0.6 V
Logic Pull-Up Current TIN = GND to VCC 5 12 μA
RS-232 RECEIVER
EIA/TIA-232E Input Voltage Range1
−30 +30 V
EIA/TIA-232E Input Threshold Low VCC = 3.0 V to 5.5 V 0.6 1.3 V
EIA/TIA-232E Input Threshold High 1.6 2.4 V
EIA/TIA-232E Input Hysteresis 0.4 V
EIA/TIA-232E Input Resistance 3 5 7 kΩ
TRANSMITTER
Output Voltage Swing
RS-232 VCC = 3.3 V to 5.5 V; transmitter output loaded
with 3 kΩ to ground
±5.0 ±5.7 V
RS-562 VCC = 3.0 V ±4.5 V
Transmitter Output Resistance VCC = 0 V, VOUT = ±2 V1
300 Ω
RS-232 Output Short-Circuit Current ±15 mA
TIMING CHARACTERISTICS
Maximum Data Rate VCC = 3.3 V, RL = 3 kΩ to 7 kΩ, CL = 50 pF to 1000 pF 460 kbps
Receiver Propagation Delay
tPHL 0.4 μs
tPLH 0.4 μs
Transmitter Propagation Delay RL = 3 kΩ, CL = 1000 pF 600 ns
Transmitter Skew 80 ns
Receiver Skew 70 ns
Transition Region Slew Rate +3 V to −3 V or −3 V to +3 V, VCC = +3.3 V,
RL = 3 kΩ, CL = 1000 pF, TA = 25°C1
5.5 10 30 V/μs
ESD PROTECTION
RS-232 and CMOS I/O Pins Human body model air discharge ±15 kV
Human body model contact discharge ±8 kV
1 Guaranteed by design.
ADM3101E
Rev. C | Page 4 of 12
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 2.
Parameter Rating
VCC −0.3 V to +6 V
V+ (VCC − 0.3 V) to +13 V
V− +0.3 V to −13 V
Input Voltages
TIN −0.3 V to (VCC + 0.3 V)
RIN ±30 V
Output Voltages
TOUT ±15 V
ROUT −0.3 V to (VCC + 0.3 V)
Short-Circuit Duration
TOUT Continuous
Package Information
θJA, Thermal Impedance (LFCSP) 61.1°C/W
θJA, Thermal Impedance (QSOP) 149.97°C/W
Operating Temperature Range
Industrial (A Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Pb-Free Temperature (Soldering, 10 sec) 260°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ADM3101E
Rev. C | Page 5 of 12
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
06766-002
1C1+
2R
OUT
3T
IN
9R
IN
8T
OUT
7V–
4
V+
5
V
CC
6
GND
12 C1–
11 C2+
10 C2–
PIN 1
INDICATOR
ADM3101E
TOP VIEW
(Not to Scale)
NOTES
1. PADDLE CONNECTED TO GND. THIS CONNECTION IS NOT
REQUIRED TO MEET THE ELECTRICAL PERFORMANCES.
Figure 2. LFCSP Pin Configuration
06766-014
NC = NO CONNECT
1
2
3
4
5
6
7
8
C1+
NC
R
OUT
V+
NC
T
IN
C1–
V
CC
16
15
14
13
12
11
10
9
C2–
NC
R
IN
V–
GND
NC
T
OUT
C2+
TOP VIEW
(Not to Scale)
ADM3101E
Figure 3. QSOP Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic Description
LFCSP QSOP
1, 12 2, 1 C1+, C1− Positive and Negative Connections for Charge Pump Capacitor. External Capacitor C1 is connected
between these pins; a 0.1 μF capacitor is recommended, but larger capacitors up to 10 μF can be used.
2 4 ROUT Receiver Output. This pin outputs CMOS output logic levels.
3 5 TIN Transmitter (Driver) Input. This input accepts TTL/CMOS levels.
4 7 V+ Internally Generated Positive Supply (+6 V Nominal).
5 8 VCC Power Supply Input, 3.0 V to 5.5 V.
6 9 GND Ground. Must be connected to 0 V.
7 10 V– Internally Generated Negative Supply (−6 V Nominal).
8 12 TOUT Transmitter (Driver) Output. This pin outputs RS-232 signal levels (typically ±6 V).
9 13 RIN Receiver Input. This input accepts RS-232 signal levels. An internal 5 kΩ pull-down resistor to GND is
connected on the input.
10, 11 15, 16 C2−, C2+ Positive and Negative Connections for Charge Pump Capacitor. External Capacitor C2 is connected
between these pins; a 0.1 μF capacitor is recommended, but larger capacitors up to 10 μF can be used.
N/A 3, 6, 11, 14 NC No Connect. These pins should always remain unconnected.
ADM3101E
Rev. C | Page 6 of 12
TYPICAL PERFORMANCE CHARACTERISTICS
8
–8
0 1000
LOAD CAPACITANCE (pF)
Tx OUTPUT (V)
6
4
2
0
–2
–4
–6
200 400 600 800
V
CC
= 3.3V
06766-003
Tx OUTPUT LOW
Tx OUTPUT HIGH
Figure 4. Transmitter Output Voltage High/Low vs.
Load Capacitance @ 460 kbps
15
–15
36
V
CC
(V)
Tx OUTPUT (V)
10
5
0
–5
–10
45
06766-004
Tx OUTPUT HIGH
Tx OUTPUT LOW
Figure 5. Transmitter Output Voltage High/Low vs. VCC, RL = 3 kΩ
8
–8
0
LOAD CURRENT (mA)
Tx OUTPUT (V)
6
4
2
0
–2
–4
–6
1234
V
CC
= 3.3V
Tx OUTPUT LOW
Tx OUTPUT HIGH
06766-005
Figure 6. Transmitter Output Voltage High/Low vs. Load Current
8
–8
LOAD CURRENT (mA)
VOLTAGE (V)
6
4
2
0
–2
–4
–6
024
V+
V–
V
CC
= 3.3V
06766-006
13
Figure 7. Charge Pump V+, V− vs. Load Current
350
0
36
V
CC
(V)
CHARGE PUMP IMPEDANCE ()
300
250
200
150
100
50
45
V–
V+
06766-007
Figure 8. Charge Pump Impedance vs. VCC
14
0
0 1000
LOAD CAPACITANCE (pF)
I
DD
(mA)
12
10
8
6
4
2
200 400 600 800
V
CC
= 3.3V
06766-008
Figure 9. Power Supply Current vs. Load Capacitance
ADM3101E
Rev. C | Page 7 of 12
5V/DI
V
5V/DI
V
TIME (1µs/DIV)
2
1
VCC = 3.3V
LOAD = 3k AND 1nF
06766-009
Figure 10. 460 kbps Data Transmission
5.0
0
3.0 5.5
VCC (V)
T
IN
VOLTAGE THRESHOLDS (V)
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
3.5 4.0 4.5 5.0
06766-010
Figure 11. TIN Voltage Threshold vs. VCC
ADM3101E
Rev. C | Page 8 of 12
THEORY OF OPERATION
The ADM3101E is a single-channel RS-232 line driver/receiver.
Step-up voltage converters, coupled with level shifting trans-
mitters and receivers, allow RS-232 levels to be developed while
operating from a single 3.3 V supply.
CMOS technology is used to keep the power dissipation to
an absolute minimum, allowing maximum battery life in
portable applications.
CIRCUIT DESCRIPTION
The internal circuitry consists of the following main sections:
• A charge pump voltage converter
• A 3.3 V logic to an EIA/TIA-232E transmitter
• An EIA/TIA-232E to a 3.3 V logic receiver
ADM3101E
GND
+3.3V INPU
T
+
+
+
C1
0.1µF
16V
C2
0.1µF
16V
+
+
T
R
+3.3V TO +6.6V
VOLTAGE DOUBLER
+6.6V TO –6.6V
VOLTAGE INVERTER
C1+
C1–
C2+
C2–
T
IN
R
OUT
CMOS
INPUT
CMOS
OUTPUT
R
IN
V
CC
V+
V–
T
OUT
C5
0.1µF
C3
0.1µF
6.3V
C4
0.1µF
16V
EIA/TIA-232E
OUTPUT
EIA/TIA-232E
INPUT*
*INTERNAL 5k PULL-DOWN
RESISTOR ON THE RS-232 INPUT.
0
6766-011
Figure 12. Typical Operating Circuit
Charge Pump Voltage Converter
The charge pump voltage converter consists of a 200 kHz oscil-
lator and a switching matrix. The converter generates a ±6.6 V
supply (when unloaded) from the 3.3 V input level. This is achieved
in two stages by using a switched capacitor technique, as illustrated
in Figure 13 and Figure 14. First, the 3.3 V input supply is doubled
to +6.6 V by using C1 as the charge storage element. The +6.6 V
level is then inverted to generate −6.6 V using C2 as the storage
element. C3 is shown connected between V+ and VCC but is
equally effective if connected between V+ and GND.
The C3 and C4 capacitors are used to reduce the output ripple.
The values are not critical and can be increased, if desired. Larger
capacitors (up to 10 μF) can also be used in place of the C1, C2,
C3, and C4 capacitors.
GND
C3C1
S1
S2
S3
S4
V+ = 2V
CC
+ +
INTERNAL
OSCILLATOR
V
CC
V
CC
06766-012
Figure 13. Charge Pump Voltage Doubler
GND
C4C2
S1
S2
S3
S4
GND
+ +
INTERNAL
OSCILLATOR
V+
V– = –(V+)
FROM
VOLTAGE
DOUBLER
06766-013
Figure 14. Charge Pump Voltage Inverter
3.3 V Logic to EIA/TIA-232E Transmitter
The transmitter driver converts the 3.3 V logic input levels
into RS-232 output levels. When driving an RS-232 load with
VCC = 3.3 V, the output voltage swing is typically ±6 V. Internally,
the TIN pin has a weak pull-up that allows it to be driven by an
open-drain output, but the maximum operating data rate is
reduced when the TIN pin is driven by an open-drain pin.
EIA/TIA-232E to 3.3 V Logic Receiver
The receiver is an inverting level shifter that accepts the RS-232
input level and translates it into a 3.3 V logic output level. The
input has an internal 5 kΩ pull-down resistor to ground and is
protected against overvoltages of up to ±30 V. An unconnected
input is pulled to 0 V by the internal 5 kΩ pull-down resistor,
which, therefore, results in a Logic 1 output level for an uncon-
nected input or for an input connected to GND.
The receiver has a Schmitt trigger input with a hysteresis level
of 0.4 V, which ensures error-free reception for both a noisy
input and for an input with slow transition times.
CMOS Input Voltage Thresholds
The CMOS input and output pins (TIN and ROUT) of the
ADM3101E are designed to interface with 1.8 V logic
thresholds when VCC = 3.3 V.
The CMOS input and output pins (TIN and ROUT) of the
ADM3101E are also designed to interface with TTL/CMOS
logic thresholds when VCC = 5 V.
ESD Protection on RS-232 and CMOS I/O Pins
All RS-232 (TOUT and RIN) and CMOS (TIN and ROUT) inputs
and outputs are protected against electrostatic discharges (up
to ±15 kV).
HIGH BAUD RATE
The ADM3101E features high slew rates, permitting data trans-
mission at rates well in excess of the EIA/RS-232 specifications.
The RS-232 voltage levels are maintained at data rates of up to
460 kbps, even under worst-case loading conditions, when TIN is
driven by a push-pull output. The slew rate is internally controlled
to less than 30 V/μs to minimize EMI interference.
ADM3101E
Rev. C | Page 9 of 12
OUTLINE DIMENSIONS
*COMPLIANT TO JEDEC STANDARDS MO-220-VEED-1
EXCEPT FOR EXPOSED PAD DIMENSION.
*1.45
1.30 SQ
1.15
050808-B
1
0.50
BSC
0.75
0.60
0.50 0.25 MIN
TOP
VIEW
12° MAX 0.80 MAX
0.65 TYP
1.00
0.85
0.80
0.30
0.23
0.18
0.05 MAX
0.02 NOM
0.20 REF
12
4
10
6
7
9
3
COPLANARITY
0.08
EXPOSED
PAD
(BOTTOM
VIEW)
S
EATING
PLANE
3.15
3.00 SQ
2.85
2.95
2.75 SQ
2.55
PIN 1
INDICATOR
0.60 MAX
0.60 MAX PIN 1
INDICATOR
*PADDLE CONNECTED TO GND.
THIS CONNECTION IS NOT
REQUIRED TO MEET THE
ELECTRICAL PERFORMANCES.
Figure 15. 12-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
3 mm × 3 mm Body, Very Thin Quad
(CP-12-1)
Dimensions shown in millimeters
COMPLIANT TO JEDEC STANDARDS MO-137-AB
012808-A
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
16 9
8
1
SEATING
PLANE
0.010 (0.25)
0.004 (0.10)
0.012 (0.30)
0.008 (0.20)
0.025 (0.64)
BSC
0.041 (1.04)
REF
0.010 (0.25)
0.006 (0.15)
0.050 (1.27)
0.016 (0.41)
0.020 (0.51)
0.010 (0.25)
8°
0°
COPLANARITY
0.004 (0.10)
0.065 (1.65)
0.049 (1.25)
0.069 (1.75)
0.053 (1.35)
0.197 (5.00)
0.193 (4.90)
0.189 (4.80)
0.158 (4.01)
0.154 (3.91)
0.150 (3.81) 0.244 (6.20)
0.236 (5.99)
0.228 (5.79)
Figure 16. 16-Lead Shrink Small Outline Package [QSOP]
(RQ-16)
Dimensions shown in inches
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
ADM3101EACPZ-REEL1−40°C to +85°C 12-Lead Lead Frame Chip Scale Package [LFCSP_VQ] CP-12-1 MA6
ADM3101EACPZ-250R71
–40°C to +85°C 12-Lead Lead Frame Chip Scale Package [LFCSP_VQ] CP-12-1 MA6
ADM3101EARQZ1
–40°C to +85°C 16-Lead Shrink Small Outline Package [QSOP] RQ-16
ADM3101EARQZ-REEL1
–40°C to +85°C 16-Lead Shrink Small Outline Package [QSOP] RQ-16
1 Z = RoHS Compliant Part.
ADM3101E
Rev. C | Page 10 of 12
NOTES
ADM3101E
Rev. C | Page 11 of 12
NOTES
ADM3101E
Rev. C | Page 12 of 12
NOTES
©2007–2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06766-0-7/08(C)
