HY57V641620HG(L)TP
4 Banks x 1M x 16Bit Synchronous DRAM
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use
of circuits described. No patent licenses are implied.
Rev. 0.9 / Mar. 2004 1
DESCRIPTION
The Hynix HY57V641620HG(L)TP is a 67,108,864-bit CMOS Synchronous DRAM, ideally suited for the main memory applications
which require large memory density and high bandwidth. HY57V641620HG(L)TP is organized as 4banks of 1,048,576x16.
HY57V641620HG(L)TP is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are
synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input
and output voltage levels are compatible with LVTTL.
Programmable options include the length of pipeline (Read latency of 2 or 3), the number of consecutive read or write cycles initiated
by a single control command (Burst length of 1,2,4,8 or Full page), and the burst count sequence(sequential or interleave). A burst of
read or write cycles in progress can be terminated by a burst terminate command or can be interrupted and replaced by a new burst
read or write command on any cycle. (This pipelined design is not restricted by a `2N` rule.)
FEATURES
• Single 3.3±0.3V power supply Note)
• All device pins are compatible with LVTTL interface
• JEDEC standard 400mil 54pin TSOP-II with 0.8mm of pin
pitch
• All inputs and outputs referenced to positive edge of system
clock
• Data mask function by UDQM or LDQM
• Internal four banks operation
• Auto refresh and self refresh
• 4096 refresh cycles / 64ms
• Programmable Burst Length and Burst Type
- 1, 2, 4, 8 or Full page for Sequential Burst
- 1, 2, 4 or 8 for Interleave Burst
• Programmable CAS Latency ; 2, 3 Clocks
• Package Type: 54Pin TSOPII(Lead Free)
ORDERING INFORMATION
Note : VDD(Min) of HY57V641620HG(L)TP-5/55/6 is 3.135V
Part No. Clock Frequency Power Organization Interface Package
HY57V641620HGTP-5/55/6/7 200/183/166/143MHz
Normal
4Banks x 1Mbits x16 LVTTL
400mil 54pin TSOP II
(Lead or Lead Free)
HY57V641620HGTP-K 133MHz
HY57V641620HGTP-H 133MHz
HY57V641620HGTP-8 125MHz
HY57V641620HGTP-P 100MHz
HY57V641620HGTP-S 100MHz
HY57V641620HGLTP-5/55/6/7 200/183/166/143MHz
Low
power
HY57V641620HGLTP-K 133MHz
HY57V641620HGLTP-H 133MHz
HY57V641620HGLTP-8 125MHz
HY57V641620HGLTP-P 100MHz
HY57V641620HGLTP-S 100MHz