1
INDUSTRIAL TEMPERATURE RANGE
IDT5V2310
2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER
MAY 2010
2004 Integrated Device Technology, Inc. DSC 6173/25c
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FEATURES:
High performance 1:10 clock driver for general purpose
applications
Operates up to 200MHz at VDD = 3.3V
Pin-to-pin skew < 100ps
•VDD range: 2.3V to 3.6V
Output enable glitch suppression
Distributes one clock input to two banks of five outputs
•25
on-chip series dampening resistors
Available in TSSOP and VFQFPN packages
FUNCTIONAL BLOCK DIAGRAM
IDT5V2310
2.5V TO 3.3V HIGH
PERFORMANCE CLOCK
BUFFER
DESCRIPTION:
The IDT5V2310 is a high performance, low skew clock buffer that
operates up to 200MHz. Two banks of five outputs each provide low skew
copies of CLK. Through the use of control pins 1G and 2G, the outputs of
banks 1Y(0:4) and 2Y(0:4) can be placed in a low state regardless of CLK
input. The device operates in 2.5V and 3.3V environments. The built-in
output enable glitch suppression ensures a synchronized output enable
sequence to distribute full period clock signals.
The IDT5V2310 is characterized for operation from -40°C to +85°C.
25
3
1Y0
25
4
1Y1
25
5
1Y2
25
8
1Y3
25
9
1Y4
LOGIC CONTROL
1G
11
25
12
2Y4
25
16
2Y3
25
17
2Y2
25
20
2Y1
25
21
2Y0
LOGIC CONTROL
2G
13
CLK
24
2
INDUSTRIAL TEMPERATURE RANGE
IDT5V2310
2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER
PIN CONFIGURATION
TSSOP
TOP VIEW
FUNCTION TABLE(1)
NOTE:
1 . H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Inputs Outputs
1G 2G CLK 1Y(0:4) 2Y(0:4)
LLX L L
HLH H L
LHH L H
HHH H H
CAPACITANCE(TA = +25°C, f = 1MHz, VIN = 0V)
Parameter Description Min. Typ. Max. Unit
CIN Input Capacitance 2.5 pF
VI = 0V or VDD
Symbol Description Max Unit
VDD Power Supply Voltage –0.5 to +4.6 V
VIInput Voltage(2) –0.5 to VDD +0.5 V
VOOutput Voltage(2) –0.5 to VDD +0.5 V
IIK Input Clamp Current ±50 mA
VI < 0 or VI > VDD
IOK Output Clamp Current ±50 mA
VO < 0 or VO > VDD
IOContinuous Total Output Current ±50 mA
VO < 0 to VDD
TSTG Storage Temperature –65 to +150 °C
ABSOLUTE MAXIMUM RATINGS(1)
NOTES:
1 . Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. Not to exceed 4.6V.
VFQFPN
TOP VIEW
CLK
V
DD
2
Y
4
2
G
VDD
1Y1
1Y0
1Y2
1Y4
VDD
1G
VDD
VDD
2Y1
2Y0
2Y2
2Y3
VDD
VDD
2
3
4
5
6
7
8
1110
9
19
18
17
16
15
14
13
12
120
1Y3
GND
GND
VDD
1Y1
1Y0
1Y2
GND
GND
1Y3
1Y4
VDD
1G
2Y4
CLK
VDD
2Y0
VDD
2Y1
GND
GND
2Y2
2Y3
VDD
VDD
2G
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
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INDUSTRIAL TEMPERATURE RANGE
IDT5V2310
2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER
Symbol Description Min. Typ. Max. Unit
VDD Internal Power Supply Voltage 2.3 2.5 V
3.3 3.6
VIL Input Voltage LOW VDD = 3V to 3.6V 0 . 8 V
VDD = 2.3V to 2.7V 0 . 7
VIH Input Voltage HIGH VDD = 3V to 3.6V 2 V
VDD = 2.3V to 2.7V 1 . 7
VIInput Voltage 0 VDD V
IOH Output Current HIGH VDD = 3V to 3.6V -12 mA
VDD = 2.3V to 2.7V -6
IOL Output Current LOW VDD = 3V to 3.6V 12 mA
VDD = 2.3V to 2.7V 6
TAAmbient Operating Temperature -40 +85 °C
RECOMMENDED OPERATING RANGE
NOTE:
1. All typical values are at respective nominal VDD.
DC ELECTRICAL CHARACTERISTICS - VDD = 3.3V ± 0.3V
Symbol Parameter Test Conditions Min. Typ.(1) Max Unit
VDD = Min. to Max. IOH = -100µAVDD - 0.2
VOH HIGH level Output Voltage VDD = 3V IOH = -12mA 2 .1 V
IOH = -6mA 2.4
VDD = Min. to Max. IOL = 100µA 0.2
VOL LOW level Output Voltage VDD = 3V IOL = 12mA 0.8 V
IOL = 6m A 0.55
VDD = 3V VO = 1V -28
IOH HIGH level Output Current VDD = 3.3V VO = 1.65V -36 mA
VDD = 3.6V VO = 3.135V -14
VDD = 3V VO = 1.95V 28
IOL LOW level Output Current VDD = 3.3V VO = 1.65V 36 mA
VDD = 3.6V VO = 0.4V 14
NOTE:
1. For IDD over frequency, see TEST CIRCUIT AND WAVEFORMS.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Symbol Parameter Test Conditions Min. Typ. Max Unit
VIK Input Voltage VDD = 3V, IIN = -18mA - 1.2 V
IIN Input Current VI = 0V or VDD ±5 µA
IDD Static Device Current(1) CLK = 0V or VDD, IO = 0mA, VDD = 3.3V 25 µA
PIN DESCRIPTION
TERMINAL
Symbol I/O Description
1G I Output Enable Control for 1Y(0:4) Outputs. This output enable is active HIGH. If this pin is Logic HIGH, the 1Y(0:4) clock outputs will follow the
input clock (CLK). If this pin is logic LOW, the 1Y(0:4) outputs will drive low independent of the state of CLK.
2G I Output Enable Control for 2Y(0:4) Outputs. This output enable is active HIGH. If this pin is Logic HIGH, the 2Y(0:4) clock outputs will follow the
input clock (CLK). If this pin is logic LOW, the 2Y(0:4) outputs will drive low independent of the state of CLK.
1Y(0:4) O Buffered Output Clocks
2Y(0:4) O Buffered Output Clocks
CLK I Input Reference Frequency
GND Ground
VDD PWR DC Power Supply, 2.3V to 3.6V
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INDUSTRIAL TEMPERATURE RANGE
IDT5V2310
2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER
NOTE:
1. All typical values are at respective nominal VDD.
DC ELECTRICAL CHARACTERISTICS - VDD = 2.5V ± 0.2V
Symbol Parameter Test Conditions Min. Typ.(1) Max Unit
VOH HIGH level Output Voltage VDD = Min. to Max. IOH = -100µAVDD - 0.2 V
VDD = 2.3V IOH = -6mA 1.8
VOL LOW level Output Voltage VDD = Min. to Max. IOL = 100µA 0.2 V
VDD = 2.3V IOL = 6 m A 0.55
VDD = 2.3V VO = 1V -17
IOH HIGH level Output Current VDD = 2.5V VO = 1.25V -25 mA
VDD = 2.7V VO = 2.375V -10
VDD = 2.3V VO = 1.2V 17
IOL LOW level Output Current VDD = 2.5V VO = 1.25V 25 mA
VDD = 2.7V VO = 0.3V 10
TIMING REQUIREMENTS OVER RECOMMENDED RANGE
Symbol Parameter Test Conditions Min. Typ. Max Unit
fCLK Clock Frequency VDD = 3V to 3.6V 0 200 MHz
VDD = 2.3V to 2.7V 0 170
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INDUSTRIAL TEMPERATURE RANGE
IDT5V2310
2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER
SWITCHING CHARACTERISTICS OVER OPERATING RANGE -
VDD = 2.5V ± 0.2V(1)
Symbol Parameter Test Conditions Min. Typ.(1) Max Unit
tPLH CLK to Yx f = 0MHz to 170MHz 1.5 3.5 ns
tPHL
tSK(O)(2) Output Skew, Yx to Yx 100 ps
tSK(P) Pulse Skew 400 ps
tSK(PP) Part-to-Part Skew 600 ps
tRRise Time VO = 0.4V to 1.7V(3) 0.5 1.4 V/ns
tFFall Time VO = 1.7V to 0.4V(3) 0.5 1.4 V/ns
tSU G before CLKV(THRESHOLD) = VDD/2 0.1 ns
tHG after CLK0.4
NOTES:
1. All typical values are at respective nominal VDD.
2. This specification is only valid for equal loading of all outputs.
3. Measured at 100MHz.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE -
VDD = 3.3V ± 0.3V(1)
Symbol Parameter Test Conditions Min. Typ.(1) Max Unit
tPLH CLK to Yx f = 0MHz to 200MHz 1.3 2.8 ns
tPHL
tSK(O)(2) Output Skew, Yx to Yx 100 ps
tSK(P) Pulse Skew 250 ps
tSK(PP) Part-to-Part Skew 500 ps
tRRise Time VO = 0.4V to 2V(3) 0.7 2 V/ns
tFFall Time VO = 2V to 0.4V(3) 0.7 2 V/ns
tSU G before CLKV(THRESHOLD) = VDD/2 0.1 ns
tHG after CLK0.4
NOTES:
1. All typical values are at respective nominal VDD.
2. This specification is only valid for equal loading of all outputs.
3. Measured at 100MHz.
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INDUSTRIAL TEMPERATURE RANGE
IDT5V2310
2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER
OUTPUT ENABLE GLITCH SUPPRESSION CIRCUIT
The purpose of the glitch suppression circuitry is to ensure the output enable sequence is synchronized with the clock input such that the output buffer will be
enabled on the next full period of the input clock (negative edge triggered by the input clock). The G input must be stable one tEN - time prior to the falling edge
of the CLK for predictable operation.
G (tEN, tDIS) Relative to CLK
CLK
tEN tDIS
Gx
Yx
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INDUSTRIAL TEMPERATURE RANGE
IDT5V2310
2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER
Test Load Circuit
Output Skew
TEST CIRCUITS AND WAVEFORMS
Voltage Waveforms Propagation Delay Times
Pulse Skew
NOTES:
1. CL includes probe and jig capacitance.
2. All input pulses are supplied by generators having the following characteristics:
PRR 200MHz; ZO = 50; tR < 1.2ns; tF < 1.2ns.
CLK
VDD
50% VDD
0V
tPLH tPHL
1.7V or 2V
0.4V 0.4V
tRtF
VOH
50% VDD
VOL
Yx
CLK
VDD
0V
VOH
VOH
VOL
VOL
50% VDD
50% VDD
tSK(O) tSK(O)
Any Y
Any Y
VDD
VOH
0V
VOL
50% VDD
50% VDD
tPLH tPHL
CLK
Yx
tSK(P) =tPLH tPHL
FROM OUTPUT
UNDER TEST
CL500
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INDUSTRIAL TEMPERATURE RANGE
IDT5V2310
2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER
RECOMMENDED LANDING PATTERN
NR 20 pin
NOTE: All dimensions are in millimeters.
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INDUSTRIAL TEMPERATURE RANGE
IDT5V2310
2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER
ORDERING INFORMATION
CORPORATE HEADQUARTERS for SALES: for Tech Support:
6024 Silver Creek Valley Road 800-345-7015 or 408-284-8200 clockhelp@idt.com
San Jose, CA 95138 fax: 408-284-2775
www.idt.com
5V2310PGGI Tubes 24-pin TSSOP -40 to +85°C
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5V2310NRGI Tubes 20-pin VFQFPN -40 to +85°C
5V2310NRGI8 Tape & Reel 20-pin VFQFPN -40 to +85°C