PIC18F4320-E/ML - Microchip Technology

PIC18F2220/2320/4220/4320

Clarifications/Corrections to the Data

Sheet:

In the Device Data Sheet (DS39599G), the following

clarific at ions and correcti on s sho ul d be not ed. Any sil i-

con issu es related to the PIC18F22 20/2320/4220 /4320

will be reported in a separate silicon errata. Please

check the Microchip web site for any existing issues.

1. Module: Power-Managed Modes

• In the third p aragraph of Section 3.3.3 “RC_IDLE

Mode” on page 35, the IOFS bit set time is

changed. The modified value is indicated in bold

text:

If the IRCF bits are set to a non-zero value (thus

enablin g the INT OSC out put), the IO FS bit beco mes

set after the INTOSC output becomes stable, in

about 128 μs.

• In the sixth paragraph of Section 3.4.3 “RC_RUN

Mode” on page 37, the INTOSC clock source

stabilizing time has changed. The modified value

is indicated in bold text in the following excerpt of

the section:

If the IRCF bits are changed from all clear (thus

enablin g the INT OSC out put), the IO FS bit beco mes

set after the INTOSC output becomes stable. Clocks

to the system continue while the INTOSC source

stabilizes in approximately 128 μs.

2. Module: Oscillator Configurations

(INTRC)

• The first, third, fourth and fifth paragraphs of

Section 2.6.2 “OSCTUNE Register” on page 23

have been modified:

- First paragraph:

The internal oscillator block is calibrated at the

factor y to produce an INT OSC output freq uency of

approximately 8 MHz. (See parameters F14

through F19 in Table 26-8).

- Third paragraph:

The tuning sensitivity is constant throughout

the tuning range. This sentence is deleted.

- Fourth paragraph:

OSCTUNE register does not affect the INTRC

frequency. The modified value is indicated in bold

text.

When the OSCTUNE register is modified, the

INTOSC frequency begins shifting to the new

frequency. The INTOSC clock will stabilize at

the new frequency within 100 µs. Code

execution continues during this shift.

- Fifth paragraph:

Except for the first sentence (There is no

indication wh en the shift occ urs), the remaining

content is delete d.

PIC18F2220/2320/4220/4320 Data Sheet Errata

PIC18F2220/2320/4220/4320

In the description of bit 0, the second sentence is

deleted, and the modified content is indicated in bold

text in Regi ste r 2-1.

U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

—— TUN5 TUN4 TUN3 TUN2 TUN1 TUN0

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 7-6 Unimplemented: Read as ‘0’

bit 5-1 TUN <5:1>: Freque ncy T uning bit s – Adjusts the frequency of INTOSC. C an adjust INT RC, dependin g

on TUNSEL (OSCTUN2<7>)

011111 = Maximum freq uen cy

•

000001

000000 = Center frequency. Oscillator module is running at the calibrated frequency

111111

•

100000 = Minimum frequency

bit 0 TUN<0>: This bit is a placeholder and has no effect on the INTOSC frequency.

PIC18F2220/2320/4220/4320

3. Module: OSCTUN2 REGISTER

The bullet points in the second paragraph of

Section 2.6.3 “OSCTUN2 Register” on page 24

are modified. The mo dified v alues i ndicate that th e

OSCTUNE register does not affect the INTRC

frequency. The modified values are indicated in

bold text in the following excerpt of the section:

• If TUNSEL (OSCTUN2<7>) is clear – The

INTOSC clock frequency can be adjusted by

the TUN5:TUN1 bit s in OSCTUNE<5:1> without

affecting the INTRC frequency

(see Register 2-1:OSCTUNE).

• If TUNSEL (OSCTUN2<7>) is set – The INTRC

clock frequency can be adjusted by the

TUN5:TUN1 bits in OSCTUN2<5:1> without

affecting the INTOSC frequency

(see Register 2-2: OSCTUN2).

TUNING REGISTER values are modified. The

modified content for bit 7 is indicated in bold text and

the second sentence in bit 0 is deleted, and the

modified content is indicated in bold text in

R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

TUNSEL — TUN5 TUN4 TUN3 TUN2 TUN1 TUN0

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 7 TUNSEL: INTRC Frequency bit

1 = INTRC frequency adjusted according to the values of the OSCTUN2<5:1> bits

0 = INTRC not affected

bit 6 Unimplemented: Read as ‘0’

bit 5-1 TUN<5:1>: Frequency Tuning bits – Adjusts the frequency of INTRC when TUNSEL is set

011111 = Maximum freq uen cy

•

000001

000000 = Center frequency. Oscillator module is running at the calibrated frequency

111111

•

100000 = Minimum frequency

bit 0 TUN<0>: Placeholder. This bit has no effect on the INTRC frequency.

PIC18F2220/2320/4220/4320

4. Module: Electrical Characteristics (DC

Power-Down and Supply

Current)

Table 26.2: DC Characteristics: Power-Down and

Supply Current, on page 317, is modified. The

modified values – typical and maximum values for

parameter D022A (Brown-out Reset), parameter

D022B (Low-V oltage Detect), D025 (Timer1 Oscillator)

and D026 (A/D Converter) – are indicated in bold text

in the Table 26-2.

TABLE 26-2: DC Characteristics: Power-Dow n and Supply Current

PIC18F2220/2320/4220/4320 (Industrial)

PIC18LF2220/2320/4220/4320 (Industrial) (Continued)

PIC18LF2220/2320/4220/4320

(Industrial) Standard Operating Conditions: (unless otherwise stated)

Operati ng tem pera ture -40°C ≤ TA ≤ +85°C for Industrial

PIC18F2220/2320/4220/4320

(Industrial, Extended)

St andard Operating Conditions: (unless otherwise stated)

Operati ng tem pera ture -40°C ≤ TA ≤ +85°C for industrial

Operati ng tem pera ture -40°C ≤ TA ≤ +125°C for extended

Param

No. Device Typ Max Units Conditions

D022

(ΔIWDT) Module Differential Currents (ΔIWDT, ΔIBOR, ΔILVD, ΔIOSCB, ΔIAD)

Watchdog Timer 1.5 4.0 μA-40°CVDD = 2.0V

2.2 4.0 μA+25°C

3.1 5.0 μA+85°C

2.5 6.0 μA-40°CV

DD = 3.0V

3.3 6.0 μA+25°C

4.7 7.0 μA+85°C

3.7 10.0 μA-40°CV

DD = 5.0V

4.5 10.0 μA+25°C

6.1 13.0 μA+85°C

D022A

(ΔIBOR) Brown-out Reset 35 50 μA-40°C to +85°C VDD = 3.0V

42 60 μAVDD = 5.0V

Extended Devices Only 46 65 μA -40°C to +125°C

D022B

(ΔILVD) Low-Voltage Detect 31 45 μA-40°C to +85°C VDD = 2.0V

33 50 μAVDD = 3.0V

42 60 μAVDD = 5.0V

Extended Devices Only 46 65 μA -40°C to +125°C

Legend: Shading of rows is to assist in readability of the table.

Note 1: The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with

the part in Sleep mode, with all I/O pins in high-impedance state and tied to VDD or VSS and all features that add delta

current disabled (such as WDT, Timer1 Oscillator, BOR, etc.).

2: The supply current is mainly a function of operating voltage, fr equency and mode. Other factors, such as I/O pin loading

and switching rate, oscillator type and circuit, internal code execution pattern and temperature, also have an impact on

the current consumption.

The test conditions for all IDD measurements in active operation mode are:

OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to VDD;

MCLR = VDD; WDT enabled/disabled as specified.

3: For RC oscillator configurations, current through REXT is not included. The current through the resistor can be estimated

by the formula Ir = VDD/2REXT (mA) with REXT in kΩ.

4: S tandard low-cost 32 kHz crystals have an operating temperature range of -10°C to +70°C. Extended tem perature

crystals are available at a much higher cost.

PIC18F2220/2320/4220/4320

PIC18LF2220/2320/4220/4320

(Industrial) Standard Operating Conditions: (unless otherwise stated)

Operati ng tem pera ture -40°C ≤ TA ≤ +85°C for Industrial

PIC18F2220/2320/4220/4320

(Industrial, Extended)

St andard Operating Conditions: (unless otherwise stated)

Operati ng tem pera ture -40°C ≤ TA ≤ +85°C for industrial

Operati ng tem pera ture -40°C ≤ TA ≤ +125°C for extended

Param

No. Device Typ Max Units Conditions

D025

(ΔIOSCB) Timer1 Oscillator 1.7 3.5 μA-40°CVDD = 2.0V 32 kHz on Timer1(4)

1.8 3.5 μA+25°C

2.1 4.5 μA+85°C

2.2 4.5 μA-40°CVDD = 3.0V 32 kHz on Timer1(4)

2.6 4.5 μA+25°C

2.8 5.5 μA+85°C

3.0 6.0 μA-40°CVDD = 5.0V 32 kHz on Timer1(4)

3.3 6.0 μA+25°C

3.4 7.0 μA+85°C

D026

(ΔIAD) A/D Converter 1.0 3.0 μA -40°C to +85°C VDD = 2.0V

A/D on, no t

converting

1.0 4.0 μA -40°C to +85°C VDD = 3.0V

2.0 10.0 μA -40°C to +85°C VDD = 5.0V

1.0 8.0 μA -40°C to +125°C VDD = 5.0V

TABLE 26-2: DC Characteristics: Power-Down and Supply Current

PIC18F2220/2320/4220/4320 (Industrial)

PIC18LF2220/2320/4220/4320 (Industrial) (Continued)

Legend: Shading of rows is to assist in readability of the table.

Note 1: The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is mea sured with

the part in Sleep mode, with all I/O pins in high-impedance state and tied to VDD or VSS and all features that add delta

current disabled (such as WDT, Timer1 Oscillator, BOR, etc.).

2: The supply current is mainly a function of operating voltage, fr equency and mode. Other factors, such as I/O pin loading

and switching rate, oscillator type and circuit, internal code execution pattern and temperature, also have an impact on

the current consumption.

The test conditions for all IDD measurements in active operation mode are:

OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to VDD;

MCLR = VDD; WDT enabled/disabled as specified.

3: For RC oscillator configurations, current through REXT is not included. The current through the resistor can be estimated

by the formula Ir = VDD/2REXT (mA) with REXT in kΩ.

4: S tandard low-cost 32 kHz crystals have an operating temperature range of -10°C to +70°C. Extended temperature

crystals are available at a much higher cost.

PIC18F2220/2320/4220/4320

REVISION HISTORY

Rev A Documen t ( 7/200 7)

Initial release of this errata. Includes Data Sheet

Clarifications 1 (Oscillator Configurations),

2 (Power-Managed Modes), 3-4 (I/O Ports),

5 (Comparator Voltage Reference Module) and

6 (Special Featur es of th e CPU ).

Rev B Document (6/2008)

Removed previous Dat a Sheet Clarifications 1-6. Added

new Data Sheet Clarifications 1 (Power-Managed

Modes), 2 (Oscillator Configurations – INTRC),

3 (OSCTUN2 Register) and 4 (Electrical C haracteristics

– DC Power-Down and Supply Current).

Information contained in this publication regarding device

applications a nd t he like is pro vid ed only f or yo ur c onvenien ce

and may be su persed ed by updates . I t is y o u r r es ponsibil it y to

ensure that your application meets with your specifications.

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