Features
•
Wide Operating Voltage Range: 2V to 16V
•
Low Current Consumption: 2.7 mA Typically
•
Chip Disable Input to Power Down the Integrated Circuit
•
Low Power-down Quiescent Current
•
Drives a Wide Range of Speaker Loads
•
Output Power Po = 250 mW at RL = 32Ω (Speaker)
•
Low Harmonic Distortion (0.5% Typically)
•
Wide Gain Range: 0 dB to 46 dB
Benefits
•
Low Number of External Components
•
Low Current Consumption
1. Description
The integrated circuit U4083B is a low-power audio amplifier for telephone loudspeak-
ers. It has differential speaker outputs to maximize the output swing at low supply
voltages. There is no need for coupler capacitors. The U4083B has an open-loop gain
of 80 dB where the closed-loop gain is adjusted with two external resistors. A chip dis-
able pin permits powering down and/or muting the input signal.
Figure 1-1. Block Diagram
Bias circuit
U4083B
4k 4k
50k
50k
125k
4
3
2
7
1
8
5
6
Amp1
Amp2
FC2
FC3
Vi
VS
VO1
VO2
CD
GND
Low-power
Audio Amplifier
for Telephone
Applications
U4083B
Rev. 4655C–CORD–03/06
2
4655C–CORD–03/06
U4083B
2. Pin Configuration
Figure 2-1. Pinning SO8
1
2
3
4
8
7
6
5
V
i
FC1
FC2 GND
CD
VO1
VO2
V
S
Table 2-1. Pin Description
Pin Symbol Function
1 CD Chip disable
2 FC2 Filtering, power supply rejection
3 FC1 Filtering, power supply rejection
4V
iAmplifier input
5 VO1 Amplifier output 1
6V
SVoltage supply
7 GND Ground
8 VO2 Amplifier output 2
3
4655C–CORD–03/06
U4083B
3. Functional Description Including External Circuitry
3.1 Pin 1: Chip Disable Digital Input (CD)
Pin 1 (chip disable) is used to power down the IC to conserve power or mute the IC or both.
Input impedance at Pin 1 is typically 90 kΩ.
• Logic 0 < 0.8V IC enabled (normal operation)
• Logic 1 > 2V IC disabled
Figure 8-15 on page 12 shows the power supply current diagram. The change in differential gain
from normal operation to muted operation (muting) is more than 70 dB.
Switching characteristics are as follows:
• Turn-on time ton = 12 ms to 15 ms
• Turn-off time toff ≤ 2 µs
They are independent of C1, C2 and VS.
Voltages at Pins 2 and 3 are supplied from VS and, therefore, do not change when the U4083B
is disabled. The outputs, VO1 (Pin 5) and VO2 (Pin 8), turn to a high impedance condition by
removing the signal from the speaker.
When signals are applied from an external source to the outputs (disabled), they must not
exceed the range between the supply voltage, VS, and ground.
3.2 Pins 2 and 3: Filtering, Power Supply Rejection
Power supply rejection is provided by capacitors C1 and C2 at Pin 3 and Pin 2, respectively. C1 is
dominant at high frequencies whereas C2 is dominant at low frequencies (Figure 8-4 on page 8
to Figure 8-7 on page 9). The values of C1 and C2 depend on the conditions of each application.
For example, a line-powered speakerphone (telephone amplifier) will require more filtering than
a system powered by regulated power supply.
The amount of rejection is a function of the capacitors and the equivalent impedance at Pin 3
and Pin 2 (see electrical characteristic equivalent resistance, R).
Apart from filtering, capacitors C1 and C2 also influence the turn-on time of the circuit at power
up, since the capacitors are charged up through the internal resistors (50 kΩ and 125 kΩ) as
shown in the block diagram.
Figure 8-1 on page 7 shows the turn-on time versus C2 at VS = 6V, for two different C1 values.
The turn-on time is 60% longer when VS = 3V and 20% shorter when VS = 9V.
The turn-off time is less than 10 µs.
4
4655C–CORD–03/06
U4083B
3.3 Pin 4: Amplifier Input V
i
, Pin 5: Amplifier Output 1 V
O1
, Pin 8: Amplifier Output 2 V
O2
There are two identical operational amplifiers. Amplifier 1 has an open-loop gain ≥ 80 dB at
100Hz (Figure 8-2 on page 7), whereas the closed-loop gain is set by external resistors, Rf and
Ri (Figure 8-3 on page 8). The amplifier is unity gain stable, and has a unity gain frequency of
approximately 1.5 MHz. A closed-loop gain of 46 dB is recommended for a frequency range of
300Hz to 3400Hz (voice band). Amplifier 2 is internally set to a gain of –1.0 dB (0 dB). The out-
puts of both amplifiers are capable of sourcing and sinking a peak current of 200 mA. Output
voltage swing is between 0.4V and VS – 1.3V at maximum current (Figure 8-18 on page 13 and
Figure 8-19 on page 13).
The output DC offset voltage between Pins 5 and 8 (VO1 – VO2) is mainly a function of the feed-
back resistor, Rf, because the input offset voltages of the two amplifiers neutralize each other.
Bias current of Amplifier 1 which is constant with respect to Vs, flows out of Pin 4 (Vi) and
through Rf, forcing VO1 to shift negative by an amount equal to RfIIB and VO2 positive to an equal
amount.
The output offset voltage specified in the electrical characteristics is measured with the feedback
resistor (Rf = 75 kΩ) shown in the typical application circuit, Figure 8-20 on page 14. It takes into
account the bias current as well as internal offset voltages of the amplifiers.
3.4 Pin 6: Supply and Power Dissipation
Power dissipation is shown in Figure 8-8 on page 9 to Figure 8-10 on page 10 for different loads.
Distortion characteristics are given in Figure 8-11 on page 10 to Figure 8-13 on page 11.
where
Tjmax = Junction temperature = 140°C
Tamb = Ambient temperature
RthJA = Thermal resistance, junction-ambient
Power dissipated within the IC in a given application is found from the following equation:
Ptot = (VS × IS) + (IRMS × VS) – (RL × IRMS2)
IS is obtained from Figure 8-15 on page 12.
IRMS is the RMS current at the load RL.
The IC's operating range is defined by a peak operating load current of ±200 mA (Figure 8-8 on
page 9 to Figure 8-13 on page 11). It is further specified with respect to different loads (see Fig-
ure 8-14 on page 12). The left (ascending) portion of each of the three curves is defined by the
power level at which 10% distortion occurs. The center flat portion of each curve is defined by
the maximum output current capability of the integrated circuit. The right (descending) portion of
each curve is defined by the maximum internal power dissipation of the IC at 25°C. At higher
ambient temperatures, the maximum load power must be reduced according to the above men-
tioned equation.
P
totmax
T
jmax
T
amb
–
R
thJA
---------------------------------=
5
4655C–CORD–03/06
U4083B
3.5 Layout Considerations
Normally, a snubber is not needed at the output of the IC, unlike many other audio amplifiers.
However, the PC-board layout, stray capacitances, and the manner in which the speaker wires
are configured may dictate otherwise. Generally, the speaker wires should be twisted tightly,
and should not be more than a few cm (or inches) in length.
4. Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Reference point pin 7, Tamb = 25°C unless otherwise specified.
Parameters Symbol Value Unit
Supply voltage Pin 6 VS
–
1.0 to +18 V
Voltages
Disabled
Pins 1, 2, 3 and 4
Pins 5 and 8
–
1.0 to (VS + 1.0)
–
1.0 to (VS + 1.0)
V
V
Output current Pins 5 and 8 ±250 mA
Junction temperature Tj+140 °C
Storage temperature range Tstg
–
55 to +150 °C
Ambient temperature range Tamb
–
20 to +70 °C
Power dissipation SO8: Tamb = 60°C Ptot 440 mW
5. Thermal Resistance
Parameters Symbol Value Unit
Junction ambient SO8 RthJA 180 K/W
6. Recommended Operating Conditions
Parameters Symbol Value Unit
Supply voltage Pin 6 VS2 to 16 V
Load impedance Pins 5 to 8 RL8.0 to 100 Ω
Load current IL±200 mA
Differential gain (5.0 kHz bandwidth) DG 0 to 46 dB
Voltage at CD Pin 1 VCD VSV
Ambient temperature range Tamb
–
20 to +70 °C
6
4655C–CORD–03/06
U4083B
7. Electrical Characteristics
Tamb = +25°C, reference point pin 7, unless otherwise specified
Parameters Test Conditions Symbol Min. Typ. Max. Unit
Amplifiers (AC Characteristics)
Open-loop gain
(Amplifier 1, f < 100Hz) GVOL1 80 dB
Closed-loop gain (Amplifier 2) VS = 6.0V, f = 1.0 kHz, RL = 32ΩGV2
–
0.35 0 +0.35 dB
Gain bandwidth product GBW 1.5 MHz
Output power
VS = 3.0V, RL = 16Ω, d < 10%
VS = 6.0V, RL = 32Ω, d < 10%
VS = 12V, RL = 100Ω, d < 10%
PO
PO
PO
55
250
400 mW
Total harmonic distortion
(f = 1.0 kHz)
VS = 6.0V, RL = 32Ω,
Po = 125 mW
VS > 3.0V, RL = 8Ω,
Po = 20 mW
VS > 12V, RL = 32Ω,
Po = 200 mW
d
d
d
0.5
0.5
0.6
1.0 %
Power supply rejection ratio
VS = 6.0V, ∆VS = 3.0V
C1 = α, C2 = 0.01 µF
C1 = 0.1 µF, C2 = 0, f = 1.0 kHz
C1 = 1.0 µF, C2 = 5.0 µF,
f = 1.0 kHz
PSRR
PSRR
PSRR
50 12
52
dB
Muting VS = 6.0V, 1.0 kHz < f < 20 kHz,
CD = 2.0V GMUTE >70 dB
Amplifiers (DC Characteristics)
Output DC level at VO1,
VO2
Rf = 75 kW
VS = 3.0V, RL = 16Ω
VS = 6.0V
VS = 12V
VO
VO
VO
1.0
1.15
2.65
5.65
1.25 V
Output high level IO = –75 mA,
2.0V < VS < 16V VOH VS – 1 V
Output low level IO = –75 mA,
2.0V < VS < 16V VOL 0.16 V
Output DC offset voltage
(VO1 – VO2)
VS = 6.0V, Rf = 75 kΩ,
RL = 32Ω∆VO–30 0 +30 mV
Input bias current at ViVS = 6.0V –IIB 100 200 nA
Equivalent resistance at Pin 3 VS = 6.0V R 100 150 220 kΩ
Equivalent resistance at Pin 2 VS = 6.0V R 18 25 40 kΩ
Chip disable Pin 1
Input voltage low
Input voltage high
Input resistance
VS = VCD = 16V
VIL
VIH
RCD
2.0
50 90
0.8
175
V
V
kΩ
Power supply current
VS = 3.0V, RL = α, CD = 0.8V
VS = 16V, RL = α, CD = 0.8V
VS = 3.0V, RL = α, CD = 2.0V
IS
IS
IS65
4.0
5.0
100
mA
mA
µA
7
4655C–CORD–03/06
U4083B
Figure 8-1. Turn-on Time versus C1 and C2 at Power On
Figure 8-2. Amplifier 1 — Open-loop Gain and Phase
8. Typical Temperature Performance
Tamb = –20 to +70°C
Function Typical Change Units
Input bias current at Vi±40 pA/°C
Total harmonic distortion
VS = 6.0V, RL = 32 Ω, Po = 125 mW, f = 1.0 kHz +0.003 %/°C
Power supply current
VS = 3.0V, RL = α, CD = 0V
VS = 3.0V, RL = α, CD = 2.0V
–2.5
–0.03
µA/°C
µA/°C
02 4 6 8
0
60
120
180
240
300
t
on
(ms)
C2 (µF)
10
360
C1 = 5 µF
VS switching from 0 to +6V
1 µF
0.1 1 10 100
0
20
40
60
80
100
G (dB)
f (kHz)
1000
72.67
79.33
86.00
92.67
99.33
66.00
Phase (Degrees)
Phase
Gain
8
4655C–CORD–03/06
U4083B
Figure 8-3. Differential Gain versus Frequency
Figure 8-4. Power Supply Rejection versus Frequency — C2 = 10 µF
Figure 8-5. Power Supply Rejection versus Frequency — C2 = 5 µF
Input C
i
R
i
R
f
V
O1
V
O2
Outputs
Amp 1
Amp 2
0.1 µF
0110
0
8
16
24
32
40
Differential gain (dB)
Frequency (kHz)
100
R
f
= 150 k
R
f
= 75 k
R
i
= 3 k
R
i
= 6 k
0.1 1 10
10
20
30
40
50
60
PSSR (dB)
f (kHz)
100
C1 > 1 µF
C1 = 0.1 µF
C2 = µF
C1 = 0
0.1 1 10
10
20
30
40
50
60
PSSR (dB)
f (kHz)
100
C
1
> 1 µF
C
1
= 0.1 µF
C
2
= 10 µF
C
1
= 0
0.1 1 10
10
20
30
40
50
60
PSRR (dB)
f (kHz)
100
C
1
> 1 µF
C
C
1
= 0.1 µF
C
2
= 5 µF
C
1
= 0
9
4655C–CORD–03/06
U4083B
Figure 8-6. Power Supply Rejection versus Frequency — C2 = 1 µF
Figure 8-7. Power Supply Rejection versus Frequency — C2 = 0
Figure 8-8. Device Dissipation — RL = 8Ω
0.1 1 10
10
20
30
40
50
60
PSSR (dB)
f (kHz)
100
C
1
> 5 µF
C
1
= 0.1 µF
C
2
= 1 µF
C
1
= 0
C
1
= 1 µF
0.1 1 10
5
15
25
35
45
55
PSSR (dB)
f (kHz)
100
C
1
> 5 µF
C
1
= 0.1 µF
C
2
= 0
C
1
= 1 µF
0306090120
0
200
400
600
800
1000
P (mW)
tot
P
L
(mW)
150
V
S
= 12 V
6 V
3 V
R
L
= 8 Ohm
1200
180
10
4655C–CORD–03/06
U4083B
Figure 8-9. Device Dissipation — RL = 16Ω
Figure 8-10. Device Dissipation — RL = 32Ω
Figure 8-11. Distortion versus Power — f = 1 kHz, Delta – GV = 34 dB
0 100 200 300
0
200
400
600
800
1000
400
V
S
= 16 V
6 V
3V
RL = 16 Ohm
12 V
P (mW)
tot
P
L
(mW)
1200
V
S
= 16 V
6 V
3V
R
L
= 32 Ohm
12 V
0 100 200 300 400
0
200
400
600
800
1000
500 600
1200
P (mW)
tot
P
L
(mW)
0
2
4
6
8
10
0 100 200 300 400
VS = 3 V
RL = 16 Ohm
VS = 3V
RL = 8 Ohm
VS = 6 V
RL = 32 Ohm
VS = 16V
RL = 32 Ohm
VS = 12 V
RL = 32 Ohm
VS = 6 V
RL = 16 W
f = 1 kHz
Delta-GV= 34 dB
d ( % )
PO (mW)
11
4655C–CORD–03/06
U4083B
Figure 8-12. Distortion versus Power — f = 3 kHz, Delta – GV = 34 dB
Figure 8-13. Distortion versus Power — f = 1 kHz or 3 kHz, Delta – GV = 12 dB
0
2
4
6
8
10
0 100 200 300 400
V
S
= 3 V
R
L
= 16 Ohm V
S
= 3 V
R
L
= 8 Ohm
V
S
= 6 V
R
L
= 32 Ohm
V
S
= 16 V
R
L
= 32 Ohm Limit
V
S
= 12 V
R
L
= 32 Ohm
V
S
= 6 V
R
L
= 16 Ohm
f = 3 kHz
Delta-G
V
= 34 dB
d ( % )
P
O
(mW)
0
2
4
6
8
10
0 100 200 300 400
V
S
= 3 V
R
L
= 16 Ohm V
S
= 3 V
R
L
= 8 Ohm
V
S
= 6 V
R
L
= 32 W
V
S
= 16 V
R
L
= 32 Ohm Limit
V
S
= 12 V
R
L
= 32 Ohm
V
S
= 6 V
R
L
= 16 Ohm Limit
f = 1 or 3 kHz
Delta-G
V
= 12 dB
d ( % )
P
O
= ( mW )
12
4655C–CORD–03/06
U4083B
Figure 8-14. Maximum Allowable Load Power
Figure 8-15. Power-supply Current
Figure 8-16. Small Signal Response
04 81216
0
100
200
300
400
500
P
L
(W)
L
V
S
(V)
20
600
R
L
= 32
16 Ohm
8 Ohm
T
amb
= 25°C - Derate at higher temperature
04 81216
0
1
2
3
4
5
I
S
(mA)
V
S
(V)
20
C
D
= 0
C
D
= V
S
RL = ∞
Output 20mV/Div
Input 1mV/Div
20 µs/Div
13
4655C–CORD–03/06
U4083B
Figure 8-17. Large Signal Response
Figure 8-18. VS – VOH versus Load Current
Figure 8-19. VOL versus Load Current
Output 1V/Div
Input 80mV/Div
20µs/Div
0 40 80 120 160
0.8
0.9
1.0
1.1
1.2
1.3
V
S
-V
OH
(V )
IL (mA)
200
2V<VS<16 V
0 40 80 120 160
0
0.4
0.8
1.2
1.6
2.0
V
OL
(V)
I
L
(mA)
200
V
S
= 2 V
V
S
= 3 V
V
S
>6 V
14
4655C–CORD–03/06
U4083B
Figure 8-20. Application Circuit
Bias circuit
U4083B
4k 4k
50k
50k
125k
4
3
2
7
1
8
5
6
100nF
10R
Amp1
Amp2
100nF
10R
0.1µF 3k
Ci Ri
Rf
75k
C2
C1
1µF
5µF
FC2
FC3
Vi
VS
VO1
VO2
CD
GND
C1B
C2B
R1B
R2B
15
4655C–CORD–03/06
U4083B
10. Package Information
9. Ordering Information
Extended Type Number Package Remarks
U4083B-MFPY SO8, Pb-free Tube
U4083B-MFPG3Y SO8, Pb-free Taped and reeled
technical drawings
according to DIN
specifications
Package SO8
Dimensions in mm
5.00
4.85
0.4
1.27
3.81
1.4
0.25
0.10
5.2
4.8
3.7
3.8
6.15
5.85
0.2
85
14
Printed on recycled paper.
4655C–CORD–03/06
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