5962F965192VXX - Aeroflex / Colorado Springs

UT54ACTS08E

Radiation-Hardened

Quadruple 2-Input AND Gates

December 2006

www.aeroflex.com/radhard

FEATURES

• 0.6µm CRH CMOS Process

- Latchup immune

• High speed

• Low power consumption

• Wide operating power supply range of 3.0V to 5.5V

• Available QML Q or V processes

• 14-lead flatpack

FUNCTION TABLE

LOGIC SYMB OL

DESCRIPTION

The UT54ACTS08E is a quadruple two-input AND gate. The

circuit performs the Boolean functions Y= A ⋅ B or

Y = in positive logic.

The devices are characterized over full mi litar y tem perat ure

range of -55°C to +125°C.

PINOUT 14-Pin Flatpack

Top View

LOGIC DI AGRAM

INPUT OUTPUT

ABY

HHH

L X L

X L L

(3)

(6) Y2

(8)

(11) Y4

(1)

A1 (2)

B1 (4)

A2 (5)

B2 (9)

A3 (10)

B3 (12)

A4 (13)

Note:

1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and

IEC Publication 617-12.

A + B

A4 Y4

A3 Y3

B1 Y1

B2 Y2

RADIATION HA RDNESS SPECIFICATIONS 1

Notes:

1. Logic will not latchup during radiation exposure within the limits defined in the table.

2. Device storage elements are immune to SEU affects.

ABSOLUTE MAXIMUM RATINGS1

Note:

1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at these

or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended periods

may affect device reliability.

RECOMMENDED OPERATING CONDITIONS

PARAMETER LIMIT UNITS

Total Dose 1.0E6 rads(Si)

SEU Thresh old 280 MeV-cm2/mg

SEL Threshold 120 MeV-cm2/mg

Neutron Fluence 1.0E14 n/cm2

SYMBOL PARAMETER LIMIT UNITS

VDD Supply voltage -0.3 to 7.0 V

VI/O Voltage any pin -.3 to VDD +.3 V

TSTG Storage Temperature range -65 to +150 °C

TJMaximum junction temperature +175 °C

TLS Lead temperature (soldering 5 seconds) +300 °C

ΘJC Thermal resistance junction to case 20 °C/W

IIDC input current ±10 mA

PDMaximum power dissipation 1 W

SYMBOL PARAMETER LIMIT UNITS

VDD Supply voltage 3.0 to 5.5 V

VIN Input voltage any pin 0 to VDD V

TCTemperature range -55 to +125 °C

DC ELECTRICAL CHARACTERIST ICS FOR THE UT54ACTS08E7

( V

= 3.0V to 5.5V; V

= 0V

; -55°C < T

< +125°C)

Notes:

1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: V

= V

(min) + 20%, - 0%; V

= V

(max) + 0%, - 50%,

as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are guaranteed

to V

(min) and V

(max).

2. Supplied as a design limit but not guaranteed or tested.

3. Per MIL-PRF-385 35, for current density ≤5.0E5 amps/cm

, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765pF/

MHz.

4. Not more than one output may be shorted at a time for maximum duration of one second.

5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and V

frequency of 1MHz and a signal amplitude of 50mV rms maximum.

6. Maximum allowable relative shift equals 50mV.

7. All specifications valid for radiation dose ≤ 1E6 rads(Si) per MIL-STD-883 Method 1019 Condition A and section 3. 11.2.

8. Power does not include power contribution of any TTL output sink current

9. Power dissipation specified per switching output.

10. This value is guaranteed based on characterization data, but not tested.

SYMBOL Description CONDITION VDD MIN MAX UNIT

VIL Low-level input voltage 13.0V 0.8 V

5.5V 0.8

VIH High-level input voltage 13.0V 2.0 V

5.5V 2.75

IIN Input leakage current VIN = VDD or VSS 5.5V -1 1µA

VOL Low-level output voltage 3IOL = 6mA 3.0V 0.4 V

IOL = 8mA 4.5V 0.4 V

VOH High-level output voltage 3IOH = -6mA 3.0V 2.4 V

IOH= -8mA 4.5V 3.15 V

IOS Short-circuit output current 2 ,4 VO = VDD and VSS 3.0V -100 100 mA

5.5V -200 200

IOL Low level output current10 VIN = VDD or VSS

VOL = 0.4V

3.0V 6mA

5.5V 8

IOH High level output current10 VIN = VDD or VSS

VOH = VDD-0.4V

3.0V -6 mA

5.5V -8

Ptotal Power dissipation 2, 8, ,9 CL = 50pF 5.5V

3.0V

1.8

0.72 mW/

MHz

IDDQ Quiescent Supply Current VIN = VDD or VSS 5.5V 10 µA

∆IDDQ Quiescent Supply Current Delta For input under test

VIN = VDD - 2.1V

For all other inputs

VIN = VDD or VSS

5.5V 1.6 mA

CIN Input capacitance 5ƒ = 1MHz 0V 15 pF

COUT Output capacitance 5 ƒ = 1MHz 0V 15 pF

AC ELECTRICAL CHARACTERISTICS FOR THE UT54ACTS08E2

(VDD = 3.0V to 5.5V; VSS = 0V 1, -55°C < TC < +125°C)

Notes:

1. Maximum allowable relative shift equals 50mV.

2. All specifications valid for radiation dose ≤ 1E6 rads(Si) per MIL-STD-883 Method 1019 Condition A and section 3.11.2.

SYMBOL PARAMETER VDD MINIMUM MAXIMUM UNIT

tPLH Input to Yn CL = 30pF 3.0V & 3.6V 110 ns

4.5V & 5.5V 1 6

CL = 50pF 3.0V & 3.6V 114 ns

4.5V & 5.5V 110

tPHL Input to Yn CL = 30pF 3.0V & 3.6V 113 ns

4.5V & 5.5V 1 9

CL = 50pF 3.0V & 3.6V 117 ns

4.5V & 5.5V 113

Packaging

Ordering Information: UT54ACTS08E: SMD

Drawing Number:

96519 = UT54ACTS08E

Device Type:

02 = 1 rad(Si)/sec

Package Type:

X = 14-lead ceramic bottom-brazed dual-in-line Flatpack

Lead Finish: (Notes 1 & 2)

A = Solder

C = Gold

X = Optional

5962 ***** ** * * **

Total Dose: (Notes 3 & 4)

R = 1E5 rads(Si)

F = 3E5 rads(Si)

G = 5E5 rads(Si)

H = 1E6 rads(Si)

03 = 50 to 300 rad(Si)/sec

Class Designator:

Q = QML Class Q

V = QML Class V

Notes:

1. Lead fini sh (A,C, or X) must be specified.

2. If an “X” is specified when ordering, part marking will match the lead finish and will be either “A” (solder) or “C” (gold).

3. Total dose radiation must be specified when ordering. QML Q and QML V not available without radiation hardening. For proto type inquiries, contact

factory.

4. Device type 02 is only offered with a TID tolerance guarantee of 3E5 rads(Si) or 1E6 rads(Si) and is tested in accordance with MIL-STD-883 Test

Method 1019 Condition A and section 3.11.2. Device type 03 is only offered with a TID tolerance guarantee of 1E5 rads(Si), 3E5 rads(Si), and 5E5

rads(Si), and is tested in accordance with MIL-STD-883 Test Method 1019 Condition A.

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