TM FQP8N80C/FQPF8N80C 800V N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switch mode power supplies. * * * * * * 8A, 800V, RDS(on) = 1.55 @VGS = 10 V Low gate charge ( typical 35 nC) Low Crss ( typical 13 pF) Fast switching 100% avalanche tested Improved dv/dt capability D ! G! G DS TO-220 TO-220F GD S FQP Series FQPF Series ! S Absolute Maximum Ratings Symbol VDSS ID TC = 25C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25C) Drain Current FQP8N80C FQPF8N80C 800 - Continuous (TC = 100C) Units V 8 8* A 5.1 5.1 * A 32 * A IDM Drain Current VGSS Gate-Source Voltage EAS Single Pulsed Avalanche Energy (Note 2) IAR Avalanche Current (Note 1) 8 A EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25C) (Note 1) 17.8 4.5 -55 to +150 mJ V/ns W W/C C 300 C dv/dt PD TJ, TSTG TL - Pulsed (Note 1) 32 (Note 3) - Derate above 25C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 30 V 850 mJ 178 1.43 59 0.48 * Drain current limited by maximum junction temperature. Thermal Characteristics Symbol RJC Parameter Thermal Resistance, Junction-to-Case RJS Thermal Resistance, Case-to-Sink Typ. 0.5 -- C/W RJA Thermal Resistance, Junction-to-Ambient 62.5 62.5 C/W (c)2003 Fairchild Semiconductor Corporation FQP8N80C 0.7 FQPF8N80C 2.1 Units C/W Rev. A, March 2003 FQP8N80C/FQPF8N80C QFET Symbol TC = 25C unless otherwise noted Parameter Test Conditions Min Typ Max Units 800 -- -- V -- 0.5 -- V/C VDS = 800 V, VGS = 0 V -- -- 10 A VDS = 640 V, TC = 125C -- -- 100 A Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA 3.0 -- 5.0 V -- 1.29 1.55 -- 5.6 -- S -- 1580 2050 pF -- 135 175 pF -- 13 17 pF Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 A BVDSS / TJ Breakdown Voltage Temperature Coefficient ID = 250 A, Referenced to 25C IDSS IGSSF IGSSR Zero Gate Voltage Drain Current On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 A RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 4 A gFS Forward Transconductance VDS = 50 V, ID = 4 A (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 400 V, ID = 8 A, RG = 25 (Note 4, 5) VDS = 640 V, ID = 8 A, VGS = 10 V (Note 4, 5) -- 40 90 ns -- 110 230 ns -- 65 140 ns -- 70 150 ns -- 35 45 nC -- 10 -- nC -- 14 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 8 A ISM -- -- 32 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 8 A Drain-Source Diode Forward Voltage -- -- 1.4 V trr Reverse Recovery Time -- 690 -- ns Qrr Reverse Recovery Charge -- 8.2 -- C VGS = 0 V, IS = 8 A, dIF / dt = 100 A/s (Note 4) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 25mH, IAS = 8A, VDD = 50V, RG = 25 , Starting TJ = 25C 3. ISD 8A, di/dt 200A/s, VDD BVDSS, Starting TJ = 25C 4. Pulse Test : Pulse width 300s, Duty cycle 2% 5. Essentially independent of operating temperature (c)2003 Fairchild Semiconductor Corporation Rev. A, March 2003 FQP8N80C/FQPF8N80C Electrical Characteristics FQP8N80C/FQPF8N80C Typical Characteristics VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V Bottom : 5.5 V Top : 1 1 10 o 150 C ID, Drain Current [A] ID, Drain Current [A] 10 0 10 o -55 C o 25 C 0 10 Notes : 1. 250 s Pulse Test 2. TC = 25 -1 10 Notes : 1. VDS = 50V 2. 250 s Pulse Test -1 -1 0 10 10 1 10 2 10 4 6 8 10 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 3.0 IDR, Reverse Drain Current [A] RDS(ON) [ ], Drain-Source On-Resistance 1 10 2.5 VGS = 10V VGS = 20V 2.0 1.5 0 10 150 25 Notes : 1. VGS = 0V 2. 250 s Pulse Test Note : TJ = 25 -1 1.0 0 4 8 12 16 20 10 0.2 0.4 0.6 ID, Drain Current [A] Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage 1.0 1.2 1.4 Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature 12 2500 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd Coss 1000 Notes : 1. VGS = 0 V 2. f = 1 MHz Crss VGS, Gate-Source Voltage [V] 1500 500 VDS = 160V 10 Ciss 2000 Capacitance [pF] 0.8 VSD, Source-Drain voltage [V] VDS = 400V VDS = 640V 8 6 4 2 Note : ID = 8A 0 0 -1 10 0 10 1 10 VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics (c)2003 Fairchild Semiconductor Corporation 0 10 20 30 40 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics Rev. A, March 2003 FQP8N80C/FQPF8N80C Typical Characteristics (Continued) 1.2 3.0 BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 RDS(ON) , (Normalized) Drain-Source On-Resistance 1.1 1.0 Notes : 1. VGS = 0 V 2. ID = 250 A 0.9 0.8 -100 -50 0 50 100 2.0 1.5 1.0 Notes : 1. VGS = 10 V 2. ID = 4.0 A 0.5 150 200 0.0 -100 0 50 100 150 200 TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs Temperature Figure 8. On-Resistance Variation vs Temperature Operation in This Area is Limited by R DS(on) 2 10 100 s 10 ID, Drain Current [A] 10 ms DC 10 Notes : -1 10 100 s 10 1 ms 10 ms 0 10 DC Notes : -1 10 o o 1. TC = 25 C 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse o 2. TJ = 150 C 3. Single Pulse -2 -2 10 10 s 1 1 ms 0 Operation in This Area is Limited by R DS(on) 2 10 10 s 1 ID, Drain Current [A] -50 o o 10 0 1 10 2 10 3 10 10 0 10 1 10 2 10 3 10 VDS, Drain-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 9-1. Maximum Safe Operating Area for FQP8N80C Figure 9-2. Maximum Safe Operating Area for FQPF8N80C 10 ID, Drain Current [A] 8 6 4 2 0 25 50 75 100 125 150 TC, Case Temperature [] Figure 10. Maximum Drain Current vs Case Temperature (c)2003 Fairchild Semiconductor Corporation Rev. A, March 2003 (Continued) 0 D = 0 .5 0 .2 10 N o te s : 1 . Z J C ( t) = 0 .7 /W M a x . 2 . D u t y F a c t o r , D = t 1 /t 2 3 . T J M - T C = P D M * Z J C ( t) -1 0 .1 0 .0 5 0 .0 2 JC (t), T h e r m a l R e s p o n s e 10 FQP8N80C/FQPF8N80C Typical Characteristics 0 .0 1 Z s in g le p u l s e 10 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] 10 D = 0 .5 0 N o te s : 1 . Z J C (t) = 2 .1 /W M a x . 2 . D u ty F a c to r, D = t 1 /t 2 3 . T J M - T C = P D M * Z J C (t) 0 .2 0 .1 10 0 .0 5 -1 0 .0 2 0 .0 1 Z JC (t), T h e r m a l R e s p o n s e Figure 11-1. Transient Thermal Response Curve for FQP8N80C 10 s in g le p u ls e -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] Figure 11-2. Transient Thermal Response Curve for FQPF8N80C (c)2003 Fairchild Semiconductor Corporation Rev. A, March 2003 FQP8N80C/FQPF8N80C Gate Charge Test Circuit & Waveform VGS Same Type as DUT 50K Qg 200nF 12V 10V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RL VDS 90% VDD VGS RG VGS DUT 10V 10% td(on) tr td(off) t on tf t off Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS BVDSS IAS ID RG VDD DUT 10V tp (c)2003 Fairchild Semiconductor Corporation ID (t) VDS (t) VDD tp Time Rev. A, March 2003 FQP8N80C/FQPF8N80C Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD * dv/dt controlled by RG * ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop (c)2003 Fairchild Semiconductor Corporation Rev. A, March 2003 TO-220 4.50 0.20 2.80 0.10 (3.00) +0.10 1.30 -0.05 18.95MAX. (3.70) o3.60 0.10 15.90 0.20 1.30 0.10 (8.70) (1.46) 9.20 0.20 (1.70) 9.90 0.20 1.52 0.10 0.80 0.10 2.54TYP [2.54 0.20] 10.08 0.30 (1.00) 13.08 0.20 ) (45 1.27 0.10 +0.10 0.50 -0.05 2.40 0.20 2.54TYP [2.54 0.20] 10.00 0.20 Dimensions in Millimeters (c)2003 Fairchild Semiconductor Corporation Rev. A, March 2003 FQP8N80C/FQPF8N80C Package Dimensions (Continued) 3.30 0.10 TO-220F 10.16 0.20 2.54 0.20 o3.18 0.10 (7.00) (1.00x45) 15.87 0.20 15.80 0.20 6.68 0.20 (0.70) 0.80 0.10 ) 0 (3 9.75 0.30 MAX1.47 #1 +0.10 0.50 -0.05 2.54TYP [2.54 0.20] 2.76 0.20 2.54TYP [2.54 0.20] 9.40 0.20 4.70 0.20 0.35 0.10 Dimensions in Millimeters (c)2003 Fairchild Semiconductor Corporation Rev. A, March 2003 FQP8N80C/FQPF8N80C Package Dimensions TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM FACTTM ActiveArrayTM FACT Quiet seriesTM BottomlessTM FAST(R) FASTrTM CoolFETTM CROSSVOLTTM FRFETTM GlobalOptoisolatorTM DOMETM EcoSPARKTM GTOTM E2CMOSTM HiSeCTM EnSignaTM I2CTM Across the board. Around the world.TM The Power FranchiseTM Programmable Active DroopTM ImpliedDisconnectTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench(R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SILENT SWITCHER(R) SMART STARTTM SPMTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogic(R) TruTranslationTM UHCTM UltraFET(R) VCXTM DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems 2. A critical component is any component of a life support which, (a) are intended for surgical implant into the body, device or system whose failure to perform can be or (b) support or sustain life, or (c) whose failure to perform reasonably expected to cause the failure of the life support when properly used in accordance with instructions for use device or system, or to affect its safety or effectiveness. provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. (c)2003 Fairchild Semiconductor Corporation Rev. I2