December 2008 Rev 5 1/26
26
VNQ660SP
Quad channel high side solid state relay
Features
■CMOS compatible inputs
■Off state open load detection
■Undervoltage and overvoltage shutdown
■Overvoltage clamp
■Thermal shutdown
■Current limitation
■Very low standby power dissipation
■Protection against loss of ground and loss of
VCC
■Reverse battery protection(a)
Description
The VNQ660SP is a monolithic device made by
using| STMicroelectronics VIPower M0-3
Technology, intended for driving resistive or
inductive loads with one side connected to
ground.
This device has four independent channels. Built-
in thermal shutdown and output current limitation
protect the chip from over temperature and short
circuit.
Type RDS(on) IOUT VCC
VNQ660SP 50mΩ
(1)
1. Per each channel.
6A 36V
a. See Application schematic on page 16
PowerSO-10
1
10
Table 1. Device summary
Package
Order codes
Tube Tape and reel
PowerSO-10 VNQ660SP VNQ660SP13TR
www.st.com
Contents VNQ660SP
2/26
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16
3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 16
3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 17
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . . 18
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.1 PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.2 PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.3 PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
VNQ660SP List of tables
3/26
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 5. Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 6. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. VCC - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 8. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 9. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10. Openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 12. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 13. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 14. PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 15. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
List of figures VNQ660SP
4/26
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 5. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 7. Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 10. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 11. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 12. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 13. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 14. On state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 15. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 17. On state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 19. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 20. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 21. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 22. Openload Off state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 23. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 24. Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 25. PowerSO-10 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 26. Rthj-amb Vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 19
Figure 27. Thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 28. Thermal fitting model of a quad channel HSD in PowerSO-10. . . . . . . . . . . . . . . . . . . . . . 20
Figure 29. PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 30. PowerSO-10 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 31. PowerSO-10 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 32. SO-28 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
VNQ660SP Block diagram and pin description
5/26
1 Block diagram and pin description
Figure 1. Block diagram
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pins
Connection / pin Status N.C. Output Input
Floating X X X X
To ground X Through 10KΩ
resistor
UNDERVOLTAGE
OVERVOLTAGE
OVERTEMP. 1
OVERTEMP. 2
I
LIM2
DEMAG 2
I
LIM1
DEMAG 1
INPUT 1
INPUT 2
GND
V
CC
OUTPUT 1
OUTPUT 2
DRIVER 2
DRIVER 1
LOGIC
OVERTEMP. 3
OVERTEMP. 4
I
LIM4
DEMAG 4
I
LIM3
DEMAG 3
INPUT 3
INPUT 4 OUTPUT 3
OUTPUT 4
DRIVER 4
DRIVER 3
STATUS STATUS
OPEN LOAD
OFF-STATE
1
2
3
4
5
6
7
8
9
10
11
GND
OUTPUT 4
OUTPUT 3
OUTPUT 2
OUTPUT 1
STATUS
INPUT 4
INPUT 3
INPUT 2
INPUT 1
V
CC
Electrical specifications VNQ660SP
6/26
2 Electrical specifications
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality document.
2.2 Thermal data
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
VCC Supply voltage 41 V
- VCC Reverse DC supply voltage - 0.3 V
IOUT DC output current, per each channel Internally limited A
IRReverse DC output current, per each channel - 15 A
IIN Input current +/- 10 mA
ISTAT Status current +/- 10 mA
IGND DC ground current at TC < 25°C -200 mA
VESD
Electrostatic discharge (human body model: R=1.5KΩ;
C = 100pF)
- INPUT
- STATUS
- OUTPUT
- VCC
4000
4000
5000
5000
V
V
V
V
EMAX
Maximum switching energy
(L = 0.38mH; RL = 0Ω; Vbat = 13.5V; Tjstart = 150ºC; IL = 14A) 101 mJ
Ptot Power dissipation at TC = 25°C 114 W
TjJunction operating temperature - 40 to 150 °C
Tstg Storage temperature - 65 to 150 °C
ECNon repetitive clamping energy at TC = 25°C 150 mJ
Table 4. Thermal data (per island)
Symbol Parameter Value Unit
Rthj-case Thermal resistance junction-case 1.1(1) 52(2) °C/W
Rthj-amb Thermal resistance junction-ambient (one chip ON) 51.1(1)
1. When mounted on a standard single-sided FR-4 board with 1cm2 of Cu (at least 35 µm thick).
33(2)
2. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35 µm thick).
°C/W
VNQ660SP Electrical specifications
7/26
2.3 Electrical characteristics
Values specified in this section are for 6V < VCC < 24V; -40°C < Tj < 150°C, unless
otherwise stated.
Figure 3. Current and voltage conventions
Note: VFn = VCCn - VOUTn during reverse battery condition.
I
S
I
GND
V
CC
GND
INPUT 4
INPUT 3
I
OUT2
I
IN3
I
IN4
V
IN4
V
IN3
V
CC
V
OUT2
I
OUT1
V
OUT1
INPUT 1
I
IN1
INPUT 2
I
IN2
V
IN1
V
IN2
I
STAT
STATUS
V
STAT
OUTPUT 4
OUTPUT 3
I
OUT3
I
OUT4
V
OUT4
V
OUT3
OUTPUT 1
OUTPUT 2
V
F1
(*)
Table 5. Power
Symbol Parameter Test conditions Min. Typ. Max. Unit
VCC(1) Operating supply
voltage 61336V
VUSD(1) Undervoltage shutdown 3.5 4.6 6 V
VUVhyst(1) Undervoltage
hysteresis 0.2 1 V
VOV(1) Overvoltage shutdown 36 V
VOVhyst(1) Overvoltage hysteresis 0.25 V
RON On state resistance
IOUT = 1A; Tj = 25°C
9V < VCC < 18V
IOUT = 1A;Tj = 150°C
9V < VCC < 18V
IOUT = 1A; VCC = 6V
40
85
50
100
130
mΩ
mΩ
mΩ
IS(1) Supply current
Off State; VCC = 13.5V;
VIN = VOUT = 0V
Off State; VCC = 13.5V;
VIN = VOUT = 0V;
Tj = 25°C
On State; VCC = 13V; VIN = 3.25V;
9V < VCC < 18V
12
12
6
40
25
12
µA
µA
mA
Electrical specifications VNQ660SP
8/26
Note: To ensure long term reliability under heavy overload or short circuit conditions, protection
and related diagnostic signals must be used together with a proper software strategy. If the
device is subjected to abnormal conditions, this software must limit the duration and number
of activation cycles.
IL(off1) Off state output current VIN = VOUT = 0V 0 50 µA
IL(off2) Off state output current VIN = 0V; VOUT = 3.5V -75 0 µA
IL(off3) Off state output current VIN = VOUT = 0V; VCC = 13V;
Tj = 125°C 5µA
IL(off4) Off state output current VIN = VOUT = 0V; VCC = 13V;
Tj =25°C 3µA
1. Per device.
Table 6. Protections
Symbol Parameter Test conditions Min. Typ. Max. Unit
TTSD Shutdown temperature 150 170 200 °C
TRReset temperature 135 °C
Thyst Thermal hysteresis 7 15 25 °C
Ilim DC short circuit current 9V < VCC < 36V
6V < VCC < 36V
61018
18
A
A
Vdemag
Turn-off output clamp
voltage
IOUT = 2A;
VIN = 0V;
L = 6mH
VCC -
41
VCC -
48
VCC -
55 V
VSTAT Status low output voltage ISTAT=1.6mA 0.5 V
ILSTAT Status leakage current Normal operation;
VSTAT=5V 10 µA
CSTAT Status pin input capacitance Normal operation;
VSTAT=5V 25 pF
VSCL Status clamp voltage ISTAT=1mA
ISTAT=-1mA
66.8
- 0.7
8V
V
Table 5. Power (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Table 7. VCC - output diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
VFForward on voltage - IOUT = 1.6A; Tj = 150°C 0.6 V
VNQ660SP Electrical specifications
9/26
Figure 4. Status timings
Table 8. Switching (VCC = 13V; Tj = 25°C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time RL = 13Ω channels 1,2,3,4
(see Figure 5)40 70 µs
td(off) Turn-off delay time RL = 13Ω channels 1,2,3,4
(see Figure 5)40 140 µs
dVOUT/dt(on) Turn-on voltage slope RL = 13Ω channels 1,2,3,4
(see Figure 5)
See
Figure 10 V/µs
dVOUT/dt(off) Turn-off voltage slope RL = 13Ω channels 1,2,3,4
(see Figure 5)
See
Figure 12 V/µs
Table 9. Logic inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
VIL Input low level voltage 1.25 V
IIL Input low level current VIN = 1.25V 1 µA
VIH Input high level voltage 3.25 V
IIH Input high level current VIN = 3.25V 10 µA
VI(hyst) Input hysteresis voltage 0.5 V
CIN Input capacitance 40 pF
VICL Input clamp voltage IIN = 1mA
IIN = -1mA
66.8
- 0.7
8V
V
Table 10. Openload detection
Symbol Parameter Test conditions Min. Typ. Max. Unit
tSDL Status delay See Figure 4 20 µs
VOL Openload voltage detection threshold VIN = 0V 1.5 2.5 3.5 V
tDOL Openload detection delay at turn-off VCC = 18V
(see Figure 4)300 µs
VIN
VSTAT
tDOL
OPENLOAD STATUS TIMING
VIN
VSTAT
OVERTEMP STATUS TIMING
tSDL
tSDL
tSDL
Electrical specifications VNQ660SP
10/26
Figure 5. Switching characteristics
Table 11. Truth table
Conditions Input Output Status
Normal operation L
H
L
H
H
H
Current limitation
L
H
H
L
X
X
H
(TJ < TTSD) H
(TJ > TTSD) L
Overtemperature L
H
L
L
H
L
Undervoltage L
H
L
L
X
X
Overvoltage L
H
L
L
H
H
Output voltage > VOL
L
H
H
H
L
H
Output current < IOL
L
H
L
H
H
L
V
OUT
dV
OUT
/dt
(on)
t
r
80%
10% t
f
dV
OUT
/dt
(off)
I
SENSE
t
t
90%
t
d(off)
INPUT
t
90%
t
d(on)
t
DSENSE
VNQ660SP Electrical specifications
11/26
Table 12. Electrical transient requirements
ISO T/R
7637/1
Test pulse
Test level
I II III IV Delays and impedance
1 - 25V - 50V - 75V - 100V 2ms, 10Ω
2 + 25V + 50V + 75V + 100V 0.2ms, 10Ω
3a - 25V - 50V - 100V - 150V 0.1µs, 50Ω
3b + 25V + 50V + 75V + 100V 0.1µs, 50Ω
4 - 4V - 5V - 6V - 7V 100ms, 0.01Ω
5 + 26.5V + 46.5V + 66.5V + 86.5V 400ms, 2Ω
ISO T/R
7637/1
Test pulse
Test level
IIIIIIIV
1C C C C
2C C C C
3a C C C C
3b C C C C
4C C C C
5C E E E
Class Contents
CAll functions of the device are performed as designed after exposure to
disturbance.
EOne or more functions of the device is not performed as designed after exposure
and cannot be returned to proper operation without replacing the device.
Electrical specifications VNQ660SP
12/26
Figure 6. Waveforms
STATUS
INPUTn
NORMAL OPERATION
UNDERVOLTAGE
VCC
VUSD
VUSDhyst
INPUTn
OVERVOLTAGE
VCC
VCC>VOV
STATUSn
INPUTn
STATUSn
undefined
OVERTEMPERATURE
INPUTn
STATUSn
TTSD
TR
Tj
LOAD VOLTAGEn
VCC<VOV
LOAD VOLTAGEn
LOAD VOLTAGEn
LOAD CURRENTn
STATUSn
INPUTn
OPENLOAD with external pull-up
LOAD VOLTAGEn
tDOL tDOL
VOL
VNQ660SP Electrical specifications
13/26
2.4 Electrical characteristics curves
Figure 7. Off state output current Figure 8. High level input current
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC )
0
1
2
3
4
5
6
7
8
9
10
IL(off1) (µA )
Off state
Vcc=24V
Vout=0V
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC )
0
1
2
3
4
5
6
7
Iih (µ A )
Vin=3.25V
Figure 9. Input clamp voltage Figure 10. Turn-on voltage slope
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC )
6
6.25
6.5
6.75
7
7.25
7.5
7.75
8
Vicl (V)
Ii n =1 m A
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC )
0
50
100
150
200
250
300
350
400
450
500
dV out/dt(on) (V/ms)
Vcc=13V
Rl=13Ohm
Figure 11. Overvoltage shutdown Figure 12. Turn-off voltage slope
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC )
34
36
38
40
42
44
46
48
50
52
54
Vov (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC )
0
100
200
300
400
500
600
700
dV out/dt(off) (V/ms)
Vcc=13V
Rl=13Ohm
Electrical specifications VNQ660SP
14/26
Figure 13. ILIM vs Tcase Figure 14. On state resistance vs VCC
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC )
2
2.25
2.5
2.75
3
3.25
3.5
3.75
4
Vih (V)
8 9 10 11 12 13 14 15 16 17 18 19 20
Vcc (V)
0
10
20
30
40
50
60
70
80
90
100
RDS(on) (mOhm)
Io u t =1 A Tc=150ºC
Tc=25ºC
Tc= - 40ºC
Figure 15. Input high level Figure 16. Input hysteresis voltage
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC )
2
2.25
2.5
2.75
3
3.25
3.5
3.75
4
Vih (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC )
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
Vihyst (V)
Figure 17. On state resistance vs Tcase Figure 18. Input low level
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC )
0
10
20
30
40
50
60
70
80
90
100
R D S (on) (mO hm)
Io u t =1 A
Vc c=9V; 13V; 18V
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC )
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
Vil (V)
VNQ660SP Electrical specifications
15/26
Figure 19. Status leakage current Figure 20. Status low output voltage
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC )
0
0.005
0.01
0.015
0.02
0.025
0.03
0.035
0.04
0.045
0.05
Ils ta t (µA )
Vstat=5V
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC )
0
0.075
0.15
0.225
0.3
0.375
0.45
0.525
0.6
Vstat (V)
Is tat=1. 6mA
Figure 21. Status clamp voltage Figure 22. Openload Off state detection
threshold
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC )
6.6
6.7
6.8
6.9
7
7.1
7.2
7.3
7.4
Vscl (V)
Is t a t =1 m A
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC )
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Vol (V)
Vin=0V
Application information VNQ660SP
16/26
3 Application information
Figure 23. Application schematic
Note: Channels 3 & 4 have the same internal circuit as channel 1 & 2.
3.1 GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1 Solution 1: a resistor in the ground line (RGND only)
This can be used with any type of load.
The following show how to dimension the RGND resistor:
1. RGND ≤ 600mV / 2 (IS(on)max)
2. RGND ≥ ( - VCC) / ( - IGND)
where - IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC < 0 during reverse battery situations) is:
PD = ( - VCC)2/ RGND
VCC
Dld
+5V
Rprot
STATUS
INPUT1
+5V
OUTPUT3
OUTPUT1
OUTPUT2
OUTPUT4
INPUT3
INPUT4
Rprot
Rprot
Rprot
Rprot
INPUT2
µ
C
GND
DGND
RGND
VGND
.
VNQ660SP Application information
17/26
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that, if the microprocessor ground is not shared by the device ground, then the
RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same RGND .
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.
3.1.2 Solution 2: a diode (DGND) in the ground line
A resistor (RGND = 1kΩ) should be inserted in parallel to DGND if the device will be driving
an inductive load. This small signal diode can be safely shared amongst several different
HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in
the input threshold and the status output values if the microprocessor ground is not common
with the device ground. This shift will not vary if more than one HSD shares the same
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the Absolute Maximum
Rating. Safest configuration for unused INPUT and STATUS pin is to leave them
unconnected.
3.2 Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC maximum DC rating. The same applies if the device is subject to transients on the VCC
line that are greater than those shown in the ISO T/R 7637/1 table.
3.3 MCU I/O protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to
prevent the µC I/O pins from latching up.
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os:
- VCCpeak / Ilatchup ≤ Rprot ≤ (VOHµC - VIH - VGND) / IIHmax
Example
For the following conditions:
VCCpeak = - 100V
Ilatchup ≥ 20mA
VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended values are:
Rprot = 10kΩ
Application information VNQ660SP
18/26
3.4 Maximum demagnetization energy (VCC = 13.5V)
Figure 24. Maximum turn-off current versus load inductance
Note: Values are generated with RL = 0Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves B and C.
VIN, IL
t
Demagnetization Demagnetization Demagnetization
A = single pulse at TJstart = 150ºC
B= repetitive pulse at TJstart = 100ºC
C= repetitive pulse at TJstart = 125ºC
1
10
100
0.01 0.1 1 10 100
L(mH)
I
LMAX (A)
A
B
C
VNQ660SP Package and PCB thermal data
19/26
4 Package and PCB thermal data
4.1 PowerSO-10 thermal data
Figure 25. PowerSO-10 PC board
Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58mm x 58mm, PCB
thickness = 2mm, Cu thickness = 35µm, Copper areas: from minimum pad lay-out to 8 cm2).
Figure 26. Rthj-amb Vs PCB copper area in open box free air condition
RTHjamb (ºC/W)
20
25
30
35
40
45
50
55
0246810
PCB Cu heatsink area (cm^2)
Package and PCB thermal data VNQ660SP
20/26
Figure 27. Thermal impedance junction ambient single pulse
Equation 1: pulse calculation formula
Figure 28. Thermal fitting model of a quad channel HSD in PowerSO-10
0.1
1
10
100
1000
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
ZT H (°C /W)
0.5 cm2
2 cm2
4 cm2
8 cm2
ZTHδRTH δZTHtp 1δ–()+⋅=
where
δtpT⁄=
VNQ660SP Package and PCB thermal data
21/26
Table 13. Thermal parameters
Area / island (cm2)0.5248
R1 = R7 = R9 = R11 (°C/W) 0.15
R2 = R8 = R10 = R12 (°C/W) 0.5
R3 (°C/W) 0.4
R4 (°C/W) 10
R5 (°C/W) 15
R6 (°C/W) 26 14.5 10 6
C1 = C7 = C9 = C11 (W.s/°C) 0.0006
C2 = C8 = C10 = C12 (W.s/°C) 0.0021
C3 (W.s/°C) 0.02
C4 (W.s/°C) 0.5
C5 (W.s/°C) 1.5
C6 (W.s/°C) 5 10 14 18
Package and packing information VNQ660SP
22/26
5 Package and packing information
5.1 ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. ECOPACK® packages are lead-free. The category of Second Level Interconnect
is marked on the package and on the inner box label, in compliance with JEDEC Standard
JESD97. The maximum ratings related to soldering conditions are also marked on the inner
box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com.
5.2 PowerSO-10 mechanical data
Figure 29. PowerSO-10 package dimensions
DETAIL "A"
PLANE
SEATING
α
L
A1
F
A1
h
A
D
D1
= =
= =
E4
0.10 A
E
C
A
B
B
DETAIL "A"
SEATING
PLANE
E2
10
1
eB
HE
0.25
VNQ660SP Package and packing information
23/26
Table 14. PowerSO-10 mechanical data
Dim.
mm
Min. Typ. Max.
A 3.35 3.65
A(1)
1. Muar only POA P013P.
3.4 3.6
A1 0 0.10
B 0.40 0.60
B(1) 0.37 0.53
C 0.35 0.55
C(1) 0.23 0.32
D 9.40 9.60
D1 7.40 7.60
E 9.30 9.50
E2 7.20 7.60
E2(1) 7.30 7.50
E4 5.90 6.10
E4(1) 5.90 6.30
e1.27
F 1.25 1.35
F(1) 1.20 1.40
H 13.80 14.40
H(1) 13.85 14.35
h0.50
L 1.20 1.80
L(1) 0.80 1.10
α0° 8°
α(1) 2° 8°
Package and packing information VNQ660SP
24/26
5.3 PowerSO-10 packing information
Figure 32. SO-28 tape and reel shipment (suffix “TR”)
Figure 30. PowerSO-10 suggested
pad layout
Figure 31. PowerSO-10 tube shipment
(no suffix)
6.30
10.8 - 11
14.6 - 14.9
9.5
1
2
3
4
5
1.27
0.67 - 0.73
0.54 - 0.6
10
9
8
7
6
B
A
C
All dimensions are in mm.
Base Q.ty Bulk Q.ty Tube length (±
0.5) AB C (±
0.1)
Casablanca 50 1000 532 10.4 16.4 0.8
Muar 50 1000 532 4.9 17.2 0.8
C
A
B
MUARCASABLANCA
Base Q.ty 600
Bulk Q.ty 600
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 24.4
N (min) 60
T (max) 30.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
All dimensions are in mm.
Tape width W 24
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 24
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 11.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
Reel dimensions
VNQ660SP Revision history
25/26
6 Revision history
Table 15. Document revision history
Date Revision Changes
22-Jun-2004 1 Initial release.
14-Jul-2004 2 New revision.
24-Jul-2004 3
Minor changes.
Current and voltage convention update (page 2).
Configuration diagram (top view) & suggested connections for unused
and not connected pins insertion (page 3).
6 cm2 Cu condition insertion in thermal data table (page 3).
VCC - output diode section update (page 3).
Protections note insertion (page 4)
Revision history table insertion (page 18).
28-Jul-2004 4 Disclaimers Update (page 19).
03-Dec-2008 5
Document reformatted and restructured.
Added contents, list of tables and figures.
Added ECOPACK® packages information.
VNQ660SP
26/26
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