+5V
SCL
GND
SDA
V+
SMBus
Controller
8
5
7
6
TMP421
DXP
DXN
A1
A0
1
2
3
4
1ChannelLocal
1ChannelRemote
TMP422
DX1
DX2
DX3
DX4
1
2
3
4
1ChannelLocal
2ChannelsRemote
TMP423
DXP1
DXP2
DXP3
DXN
1
2
3
4
1ChannelLocal
3ChannelsRemote
TMP421
TMP422
TMP423
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SBOS398C –JULY 2007–REVISED MAY 2012
±1°C Remote and Local TEMPERATURE SENSOR
Check for Samples: TMP421,TMP422,TMP423
1FEATURES DESCRIPTION
The TMP421, TMP422, and TMP423 are remote
234• SOT23-8 and DSBGA (WCSP) PACKAGES temperature sensor monitors with a built-in local
• ±1°C REMOTE DIODE SENSOR (MAX) temperature sensor. The remote temperature sensor
• ±1.5°C LOCAL TEMPERATURE SENSOR (MAX) diode-connected transistors are typically low-cost,
NPN- or PNP-type transistors or diodes that are an
• SERIES RESISTANCE CANCELLATION integral part of microcontrollers, microprocessors, or
• n-FACTOR CORRECTION FPGAs.
• TWO-WIRE/ SMBus™ SERIAL INTERFACE Remote accuracy is ±1°C for multiple IC
• MULTIPLE INTERFACE ADDRESSES manufacturers, with no calibration needed. The two-
• DIODE FAULT DETECTION wire serial interface accepts SMBus write byte, read
byte, send byte, and receive byte commands to
• RoHS COMPLIANT AND NO Sb/Br configure the device.
APPLICATIONS The TMP421, TMP422, and TMP423 include series
resistance cancellation, programmable non-ideality
• PROCESSOR/FPGA TEMPERATURE factor, wide remote temperature measurement range
MONITORING (up to +150°C), and diode fault detection.
• LCD/ DLP®/LCOS PROJECTORS The TMP421, TMP422, and TMP423 are all available
• SERVERS in a SOT23-8 package. The TMP421C is also
• CENTRAL OFFICE TELECOM EQUIPMENT available in a DSBGA (WCSP) package.
• STORAGE AREA NETWORKS (SAN)
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2DLP is a registered trademark of Texas Instruments.
3SMBus is a trademark of Intel Corporation.
4All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2007–2012, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TMP421
TMP422
TMP423
SBOS398C –JULY 2007–REVISED MAY 2012
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE INFORMATION(1)
TWO-WIRE PACKAGE PACKAGE
PRODUCT DESCRIPTION ADDRESS PACKAGE-LEAD DESIGNATOR MARKING
TMP421 Single Channel 100 11xx SOT23-8 DCN DACI
Remote Junction
TMP421C 100 11xx DSBGA-8 YZD TMP421
Temperature Sensor
Dual Channel
TMP422 Remote Junction 100 11xx SOT23-8 DCN DADI
Temperature Sensor
TMP423A Triple Channel 100 1100 SOT23-8 DCN DAEI
Remote Junction
TMP423B 100 1101 SOT23-8 DCN DAFI
Temperature Sensor
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
Over operating free-air temperature range, unless otherwise noted. TMP421, TMP422, TMP423 UNIT
Power Supply, VS+7 V
Pins 1, 2, 3, and 4 only –0.5 to VS+ 0.5 V
Input Voltage Pins 6 and 7 only –0.5 to 7 V
Input Current 10 mA
Operating Temperature Range –55 to +127 °C
Storage Temperature Range –60 to +130 °C
Junction Temperature (TJmax) +150 °C
Human Body Model (HBM) 3000 V
ESD Rating Charged Device Model (CDM) 1000 V
Machine Model (MM) 200 V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
2Submit Documentation Feedback Copyright © 2007–2012, Texas Instruments Incorporated
Product Folder Link(s): TMP421 TMP422 TMP423
TMP421
TMP422
TMP423
www.ti.com
SBOS398C –JULY 2007–REVISED MAY 2012
ELECTRICAL CHARACTERISTICS: TMP421, TMP422, TMP423
At TA= –40°C to +125°C and V+ = 2.7V to 5.5V, unless otherwise noted. TMP421, TMP422, TMP423
PARAMETER CONDITIONS MIN TYP MAX UNIT
TEMPERATURE ERROR
Local Temperature Sensor TELOCAL TA= –40°C to +125°C ±1.25 ±2.5 °C
TA= +15°C to +85°C, V+ = 3.3V ±0.25 ±1.5 °C
Remote Temperature Sensor(1) TEREMOTE TA= +15°C to +85°C, TD= –40°C to +150°C, V+ = 3.3V ±0.25 ±1 °C
TA= –40°C to +100°C, TD= –40°C to +150°C, V+ = 3.3V ±1 ±3 °C
TA= –40°C to +125°C, TD= –40°C to +150°C ±3 ±5 °C
vs Supply (Local/Remote) V+ = 2.7V to 5.5V ±0.2 ±0.5 °C/V
TEMPERATURE MEASUREMENT
Conversion Time (per channel) 100 115 130 ms
Resolution
Local Temperature Sensor (programmable) 12 Bits
Remote Temperature Sensor 12 Bits
Remote Sensor Source Currents
High Series Resistance 3kΩMax 120 μA
Medium High 60 μA
Medium Low 12 μA
Low 6 μA
Remote Transistor Ideality Factor ηTMP421/22/23 Optimized Ideality Factor 1.008
SMBus INTERFACE
Logic Input High Voltage (SCL, SDA) VIH 2.1 V
Logic Input Low Voltage (SCL, SDA) VIL 0.8 V
Hysteresis 500 mV
SMBus Output Low Sink Current 6 mA
SDA Output Low Voltage VOL IOUT = 6mA 0.15 0.4 V
Logic Input Current 0 ≤VIN ≤6V –1 +1 μA
SMBus Input Capacitance (SCL, SDA) 3 pF
SMBus Clock Frequency 3.4 MHz
SMBus Timeout 25 30 35 ms
SCL Falling Edge to SDA Valid Time 1 μs
DIGITAL INPUTS
Input Capacitance 3 pF
Input Logic Levels
Input High Voltage VIH 0.7(V+) (V+)+0.5 V
Input Low Voltage VIL –0.5 0.3(V+) V
Leakage Input Current IIN 0V ≤VIN ≤V+ 1 μA
POWER SUPPLY
Specified Voltage Range V+ 2.7 5.5 V
Quiescent Current IQ0.0625 Conversions per Second 32 38 μA
Eight Conversions per Second 400 525 μA
Serial Bus Inactive, Shutdown Mode 3 10 μA
Serial Bus Active, fS= 400kHz, Shutdown Mode 90 μA
Serial Bus Active, fS= 3.4MHz, Shutdown Mode 350 μA
Undervoltage Lockout UVLO 2.3 2.4 2.6 V
Power-On Reset Threshold POR 1.6 2.3 V
TEMPERATURE RANGE
Specified Range –40 +125 °C
Storage Range –60 +130 °C
Thermal Resistance θJA SOT23 100 °C/W
(1) Tested with less than 5Ωeffective series resistance and 100pF differential input capacitance.
Copyright © 2007–2012, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): TMP421 TMP422 TMP423
TMP421
TMP422
TMP423
SBOS398C –JULY 2007–REVISED MAY 2012
www.ti.com
ELECTRICAL CHARACTERISTICS: TMP421C
At TA= –40°C to +125°C and V+ = 2.55V to 5.5V, unless otherwise noted. TMP421C
PARAMETER CONDITIONS MIN TYP MAX UNIT
TEMPERATURE ERROR
Local Temperature Sensor TELOCAL TA= –40°C to +125°C ±1.25 ±2.5 °C
TA= +15°C to +85°C, V+ = 3.3V ±0.25 ±1.5 °C
Remote Temperature Sensor(1) TEREMOTE TA= +15°C to +85°C, TD= –40°C to +150°C, V+ = 3.3V ±0.25 ±1 °C
TA= –40°C to +100°C, TD= –40°C to +150°C, V+ = 3.3V ±1 ±3 °C
TA= –40°C to +125°C, TD= –40°C to +150°C ±3 ±5 °C
vs Supply (Local/Remote) V+ = 2.55V to 5.5V ±0.2 ±0.5 °C/V
TEMPERATURE MEASUREMENT
Conversion Time (per channel) 100 115 130 ms
Resolution
Local Temperature Sensor (programmable) 12 Bits
Remote Temperature Sensor 12 Bits
Remote Sensor Source Currents
High Series Resistance 3kΩMax 120 μA
Medium High 60 μA
Medium Low 12 μA
Low 6 μA
Remote Transistor Ideality Factor ηTMP421C Optimized Ideality Factor 1.008
SMBus INTERFACE
Logic Input High Voltage (SCL, SDA) VIH 2.1 V
Logic Input Low Voltage (SCL, SDA) VIL 0.8 V
Hysteresis 500 mV
SMBus Output Low Sink Current 6 mA
SDA Output Low Voltage VOL IOUT = 6mA 0.15 0.4 V
Logic Input Current 0 ≤VIN ≤6V –1 +1 μA
SMBus Input Capacitance (SCL, SDA) 3 pF
SMBus Clock Frequency 3.4 MHz
SMBus Timeout 25 30 35 ms
SCL Falling Edge to SDA Valid Time 1 μs
DIGITAL INPUTS
Input Capacitance 3 pF
Input Logic Levels
Input High Voltage VIH 0.7(V+) (V+)+0.5 V
Input Low Voltage VIL –0.5 0.3(V+) V
Leakage Input Current IIN 0V ≤VIN ≤V+ 1 μA
POWER SUPPLY
Specified Voltage Range V+ 2.55 5.5 V
Quiescent Current IQ0.0625 Conversions per Second 32 38 μA
Eight Conversions per Second 400 525 μA
Serial Bus Inactive, Shutdown Mode 3 10 μA
Serial Bus Active, fS= 400kHz, Shutdown Mode 90 μA
Serial Bus Active, fS= 3.4MHz, Shutdown Mode 350 μA
Undervoltage Lockout UVLO 2.3 2.4 2.5 V
Power-On Reset Threshold POR 1.6 2.3 V
TEMPERATURE RANGE
Specified Range –40 +125 °C
Storage Range –60 +130 °C
Thermal Resistance θJA DSBGA 128 °C/W
(1) Tested with less than 5Ωeffective series resistance and 100pF differential input capacitance.
4Submit Documentation Feedback Copyright © 2007–2012, Texas Instruments Incorporated
Product Folder Link(s): TMP421 TMP422 TMP423
1
2
3
4
8
7
6
5
V+
SCL
GND
DXP
DXN
A1
A0
SDA
TMP421
V+
SCL
SDA
DXP
DXN
A1
A0
1
2
8
7
3
4
6
5GND
TMP421C
1
2
3
4
8
7
6
5
V+
SCL
GND
DX1
DX2
DX3
DX4
SDA
TMP422
TMP421
TMP422
TMP423
www.ti.com
SBOS398C –JULY 2007–REVISED MAY 2012
TMP421 PIN CONFIGURATION
DCN PACKAGE YZD PACKAGE
SOT23-8 DSBGA-8
(TOP VIEW) (TOP VIEW)
TMP421 PIN ASSIGNMENTS
TMP421
NO. NAME DESCRIPTION
1 DXP Positive connection to remote temperature sensor.
2 DXN Negative connection to remote temperature sensor.
3 A1 Address pin
4 A0 Address pin
5 GND Ground
6 SDA Serial data line for SMBus, open-drain; requires pull-up resistor to V+.
7 SCL Serial clock line for SMBus, open-drain; requires pull-up resistor to V+.
8 V+ Positive supply voltage (2.7V to 5.5V for the TMP421; 2.55V to 5.5V for the TMP421C)
TMP422 PIN CONFIGURATION
DCN PACKAGE
SOT23-8
(TOP VIEW)
TMP422 PIN ASSIGNMENTS
TMP422
NO. NAME DESCRIPTION
1 DX1 Channel 1 remote temperature sensor connection pin. Also sets the TMP422 address; see Table 10.
2 DX2 Channel 1 remote temperature sensor connection pin. Also sets the TMP422 address; see Table 10.
3 DX3 Channel 2 remote temperature sensor connection pin. Also sets the TMP422 address; see Table 10.
4 DX4 Channel 2 remote temperature sensor connection pin. Also sets the TMP422 address; see Table 10.
5 GND Ground
6 SDA Serial data line for SMBus, open-drain; requires pull-up resistor to V+.
7 SCL Serial clock line for SMBus, open-drain; requires pull-up resistor to V+.
8 V+ Positive supply voltage (2.7V to 5.5V)
Copyright © 2007–2012, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): TMP421 TMP422 TMP423
1
2
3
4
8
7
6
5
V+
SCL
GND
DXP1
DXP2
DXP3
DXN
SDA
TMP423
TMP421
TMP422
TMP423
SBOS398C –JULY 2007–REVISED MAY 2012
www.ti.com
TMP423 PIN CONFIGURATION
DCN PACKAGE
SOT23-8
(TOP VIEW)
TMP423 PIN ASSIGNMENTS
TMP423
NO. NAME DESCRIPTION
1 DXP1 Channel 1 positive connection to remote temperature sensor.
2 DXP2 Channel 2 positive connection to remote temperature sensor.
3 DXP3 Channel 3 positive connection to remote temperature sensor.
4 DXN Common negative connection to remote temperature sensors, Channel 1, Channel 2, Channel 3.
5 GND Ground
6 SDA Serial data line for SMBus, open-drain; requires pull-up resistor to V+.
7 SCL Serial clock line for SMBus, open-drain; requires pull-up resistor to V+.
8 V+ Positive supply voltage (2.7V to 5.5V)
6Submit Documentation Feedback Copyright © 2007–2012, Texas Instruments Incorporated
Product Folder Link(s): TMP421 TMP422 TMP423
3
2
1
0
-1
-2
-3
AmbientTemperature,T ( C)°
A
-50 -25 1251007550250
RemoteTemperatureError( C)°
V+=3.3V
T =+25 C
REMOTE °
30TypicalUnitsShown
h=1.008
LocalTemperatureError( )°C
AmbientTemperature,T (
A°C)
3
2
1
0
-1
-2
-3
-50 125-25 0 25 50 75 100
50UnitsShown
V+=3.3V
60
40
20
0
-20
-40
-60
LeakageResistance(M )W
0 5 10 15 20 25 30
RemoteTemperatureError( C)°
R GND-
R V+-
TMP421
TMP422
TMP423
www.ti.com
SBOS398C –JULY 2007–REVISED MAY 2012
TYPICAL CHARACTERISTICS
At TA= +25°C and V+ = +5.0V, unless otherwise noted.
REMOTE TEMPERATURE ERROR LOCAL TEMPERATURE ERROR
vs TEMPERATURE vs TEMPERATURE
Figure 1. Figure 2.
REMOTE TEMPERATURE ERROR
REMOTE TEMPERATURE ERROR vs SERIES RESISTANCE
vs LEAKAGE RESISTANCE (Diode-Connected Transistor, 2N3906 PNP)
Figure 3. Figure 4.
Copyright © 2007–2012, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): TMP421 TMP422 TMP423
3
2
1
0
-1
-2
-3
Capacitance(nF)
0 0.5 1.0 1.5 2.0 2.5 3.0
RemoteTemperatureError( C)°
25
20
15
10
5
0
-5
-10
-15
-20
-25
Frequency(MHz)
0 5 10 15
TemperatureError( C)°
Local100mV Noise
PP
Remote100mV Noise
PP
Local250mV Noise
PP
Remote250mV Noise
PP
500
450
400
350
300
250
200
150
100
50
0
ConversionRate(conversions/sec)
0.0625 0.125 0.25 0.5 1 2 4 8
I (mA)
Q
V+=2.7V
V+=5.5V
500
450
400
350
300
250
200
150
100
50
0
SCLCLockFrequency(Hz)
1k 10k 100k 1M 10M
I ( A)m
Q
V+=3.3V
V+=5.5V
I ( )
QmA
V+(V)
8
7
6
5
4
3
2
1
0
4.53.0 3.5 4.0 5.55.02.5
TMP421
TMP422
TMP423
SBOS398C –JULY 2007–REVISED MAY 2012
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TA= +25°C and V+ = +5.0V, unless otherwise noted.
REMOTE TEMPERATURE ERROR
vs SERIES RESISTANCE REMOTE TEMPERATURE ERROR
(GND Collector-Connected Transistor, 2N3906 PNP) vs DIFFERENTIAL CAPACITANCE
Figure 5. Figure 6.
TEMPERATURE ERROR QUIESCENT CURRENT
vs POWER-SUPPLY NOISE FREQUENCY vs CONVERSION RATE
Figure 7. Figure 8.
SHUTDOWN QUIESCENT CURRENT SHUTDOWN QUIESCENT CURRENT
vs SCL CLOCK FREQUENCY vs SUPPLY VOLTAGE
Figure 9. Figure 10.
8Submit Documentation Feedback Copyright © 2007–2012, Texas Instruments Incorporated
Product Folder Link(s): TMP421 TMP422 TMP423
0.1 Fm10kW
(typ)
10kW
(typ)
TMP421
DXP
DXN
V+
8
7
6
5
2
1
RS
(2)
RS
(2) CDIFF
(3)
CDIFF
(3)
RS
(2)
RS
(2)
GND
SCL
SDA
+5V
SMBus
Controller
Diode-connectedconfiguration :
(1)
SeriesResistance
Transistor-connectedconfiguration :
(1)
A1
A0
4
3
TMP421
TMP422
TMP423
www.ti.com
SBOS398C –JULY 2007–REVISED MAY 2012
APPLICATION INFORMATION
The TMP421 is a two-channel digital temperature For proper remote temperature sensing operation, the
sensor that combines a local die temperature- TMP421 requires only a transistor connected
measurement channel and a remote-junction between DXP and DXN pins. If the remote channel is
temperature-measurement channel, and is available not utilized, DXP can be left open or tied to GND.
in SOT23-8 and DSBGA-8 packages. The TMP422 The TMP422 requires transistors connected between
(three-channel), and TMP423 (four-channel) are DX1 and DX2 and between DX3 and DX4. Unused
digital temperature sensors that combine a local die channels on the TMP422 must be connected to GND.
temperature measurement channel and two or three The TMP423 requires a transistor connected to each
remote junction temperature measurement channels, positive channel (DXP1, DXP2, and DXP3), with the
respectively, in a single SOT23-8 package. These base of each channel tied to the common negative,
devices are two-wire- and SMBus interface- DXN. For an unused channel, the TMP423 DXP pin
compatible and are specified over a temperature can be left open or tied to GND.
range of –40°C to +125°C. The TMP421/22/23 each
contain multiple registers for holding configuration The TMP421/22/23 SCL and SDA interface pins each
information and temperature measurement results. require pull-up resistors as part of the communication
bus. A 0.1μF power-supply bypass capacitor is
recommended for local bypassing. Figure 11,
Figure 12, and Figure 13 show typical configurations
for the TMP421, TMP422, and TMP423, respectively.
(1) Diode-connected configuration provides better settling time. Transistor-connected configuration provides better series resistance
cancellation.
(2) RS(optional) should be < 1.5kΩin most applications. Selection of RSdepends on application; see the Filtering section.
(3) CDIFF (optional) should be < 1000pF in most applications. Selection of CDIFF depends on application; see the Filtering section and
Figure 6,Remote Temperature Error vs Differential Capacitance.
Figure 11. TMP421 Basic Connections
Copyright © 2007–2012, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): TMP421 TMP422 TMP423
TMP422
DX1(4)
DX2(4)
5
2
1
RS
(2)
RS
(2) CDIFF
(3)
CDIFF
(3)
RS
(2)
RS
(2)
GND
Diode-connectedconfiguration :
(1)
SeriesResistance
Transistor-connectedconfiguration :
(1)
DX3(4)
DX4(4)
4
3
RS
(2)
RS
(2) CDIFF
(3)
0.1 Fm10kW
(typ)
10kW
(typ)
V+
8
7
6
SCL
SDA
+5V
SMBus
Controller
DXP1
DXN1
DXP2
DXN2
+5V
TMP423
DXP1
DXP2
DXP3
DXP
DXN
DXN
SCL
GND
SDA
V+
2
3
4
7
1
6
8
RS
(2)
RS
(2)
RS
(2)
RS
(2) RS
(2) RS
(2) CDIFF
(3)
CDIFF
(3)
CDIFF
(3)
Transistor-connectedconfiguration :
(1)
CDIFF
(3)
RS
(2)
RS
(2)
Diode-connectedconfiguration :
(1)
5
0.1 Fm10kW
(typ)
10kW
(typ)
SMBus
Controller
SeriesResistance
TMP421
TMP422
TMP423
SBOS398C –JULY 2007–REVISED MAY 2012
www.ti.com
(1) Diode-connected configuration provides better settling time. Transistor-connected configuration provides better series resistance
cancellation.
(2) RS(optional) should be < 1.5kΩin most applications. Selection of RSdepends on application; see the Filtering section.
(3) CDIFF (optional) should be < 1000pF in most applications. Selection of CDIFF depends on application; see the Filtering section and
Figure 6,Remote Temperature Error vs Differential Capacitance.
(4) TMP422 SMBus slave address is 1001 100 when connected as shown.
Figure 12. TMP422 Basic Connections
(1) Diode-connected configuration provides better settling time. Transistor-connected configuration provides better series resistance
cancellation.
(2) RS(optional) should be < 1.5kΩin most applications. Selection of RSdepends on application; see the Filtering section.
(3) CDIFF (optional) should be < 1000pF in most applications. Selection of CDIFF depends on application; see the Filtering section and
Figure 6,Remote Temperature Error vs Differential Capacitance.
Figure 13. TMP423 Basic Connections
10 Submit Documentation Feedback Copyright © 2007–2012, Texas Instruments Incorporated
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TMP422
TMP423
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SBOS398C –JULY 2007–REVISED MAY 2012
SERIES RESISTANCE CANCELLATION changing bit 2 (RANGE) of Configuration Register 1
from low to high. The change in measurement range
Series resistance in an application circuit that typically and data format from standard binary to extended
results from printed circuit board (PCB) trace binary occurs at the next temperature conversion. For
resistance and remote line length is automatically data captured in the extended temperature range
cancelled by the TMP421/22/23, preventing what configuration, an offset of 64 (40h) is added to the
would otherwise result in a temperature offset. A total standard binary value, as shown in the Extended
of up to 3kΩof series line resistance is cancelled by Binary column of Table 1. This configuration allows
the TMP421/22/23, eliminating the need for additional measurement of temperatures as low as –64°C, and
characterization and temperature offset correction. as high as +191°C; however, most temperature-
See the two Remote Temperature Error vs Series sensing diodes only measure with the range of –55°C
Resistance typical characteristic curves (Figure 4 and to +150°C. Additionally, the TMP421/22/23 are rated
Figure 5) for details on the effects of series resistance only for ambient temperatures ranging from –40°C to
and power-supply voltage on sensed remote +125°C. Parameters in the Absolute Maximum
temperature error. Ratings table must be observed.
DIFFERENTIAL INPUT CAPACITANCE Table 1. Temperature Data Format (Local and
Remote Temperature High Bytes)
The TMP421/22/23 tolerate differential input
capacitance of up to 1000pF with minimal change in LOCAL/REMOTE TEMPERATURE REGISTER
HIGH BYTE VALUE (1°C RESOLUTION)
temperature error. The effect of capacitance on
sensed remote temperature error is illustrated in STANDARD BINARY(1) EXTENDED BINARY(2)
TEMP
Figure 6,Remote Temperature Error vs Differential (°C) BINARY HEX BINARY HEX
Capacitance.–64 1100 0000 C0 0000 0000 00
–50 1100 1110 CE 0000 1110 0E
TEMPERATURE MEASUREMENT DATA –25 1110 0111 E7 0010 0111 27
0 0000 0000 00 0100 0000 40
Temperature measurement data may be taken over
an operating range of –40°C to +127°C for both local 1 0000 0001 01 0100 0001 41
and remote locations. 5 0000 0101 05 0100 0101 45
10 0000 1010 0A 0100 1010 4A
However, measurements from –55°C to +150°C can 25 0001 1001 19 0101 1001 59
be made both locally and remotely by reconfiguring 50 0011 0010 32 0111 0010 72
the TMP421/22/23 for the extended temperature
range, as described below. 75 0100 1011 4B 1000 1011 8B
100 0110 0100 64 1010 0100 A4
Temperature data that result from conversions within 125 0111 1101 7D 1011 1101 BD
the default measurement range are represented in 127 0111 1111 7F 1011 1111 BF
binary form, as shown in Table 1, Standard Binary 150 0111 1111 7F 1101 0110 D6
column. Note that although the device is rated to only
measure temperatures down to –55°C, it may read 175 0111 1111 7F 1110 1111 EF
temperatures below this level. However, any 191 0111 1111 7F 1111 1111 FF
temperature below –64°C results in a data value of (1) Resolution is 1°C/count. Negative numbers are represented in
–64 (C0h). Likewise, temperatures above +127°C two's complement format.
result in a value of 127 (7Fh). The device can be set (2) Resolution is 1°C/count. All values are unsigned with a –64°C
to measure over an extended temperature range by offset.
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One-ShotStartRegister
ConfigurationRegisters
StatusRegister
IdentificationRegisters
N-FactorCorrectionRegisters
ConversionRateRegister
LocalandRemoteTemperatureRegisters
SDA
SCL
PointerRegister
I/O
Control
Interface
SoftwareReset
TMP421
TMP422
TMP423
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Standard Decimal to Binary Temperature Data
Both local and remote temperature data use two Calculation Example
bytes for data storage. The high byte stores the
temperature with 1°C resolution. The second or low For positive temperatures (for example, +20°C):
byte stores the decimal fraction value of the (+20°C)/(+1°C/count) = 20 →14h →0001 0100
temperature and allows a higher measurement Convert the number to binary code with 8-bit,
resolution, as shown in Table 2. The measurement right-justified format, and MSB = '0' to denote a
resolution for the both the local and remote channels positive sign.
is 0.0625°C, and is not adjustable. +20°C is stored as 0001 0100 →14h.
Table 2. Decimal Fraction Temperature Data For negative temperatures (for example, –20°C):
Format (Local and Remote Temperature Low (|–20|)/(+1°C/count) = 20 →14h →0001 0100
Bytes) Generate the two's complement of a negative
TEMPERATURE REGISTER LOW BYTE VALUE
(0.0625°C RESOLUTION)(1) number by complementing the absolute value
TEMP binary number and adding 1.
(°C) STANDARD AND EXTENDED BINARY HEX
0 0000 0000 00 –20°C is stored as 1110 1100 →ECh.
0.0625 0001 0000 10 REGISTER INFORMATION
0.1250 0010 0000 20
0.1875 0011 0000 30 The TMP421/22/23 contain multiple registers for
0.2500 0100 0000 40 holding configuration information, temperature
0.3125 0101 0000 50 measurement results, and status information. These
0.3750 0110 0000 60 registers are described in Figure 14 and Table 3.
0.4375 0111 0000 70 POINTER REGISTER
0.5000 1000 0000 80
0.5625 1001 0000 90 Figure 14 shows the internal register structure of the
0.6250 1010 0000 A0 TMP421/22/23. The 8-bit Pointer Register is used to
0.6875 1011 0000 B0 address a given data register. The Pointer Register
identifies which of the data registers should respond
0.7500 1100 0000 C0 to a read or write command on the two-wire bus. This
0.8125 1101 0000 D0 register is set with every write command. A write
0.8750 1110 0000 E0 command must be issued to set the proper value in
0.9385 1111 0000 F0 the Pointer Register before executing a read
(1) Resolution is 0.0625°C/count. All possible values are shown. command. Table 3 describes the pointer address of
the TMP421/22/23 registers. The power-on reset
Standard Binary to Decimal Temperature Data (POR) value of the Pointer Register is 00h (0000
Calculation Example 0000b).
High byte conversion (for example, 0111 0011):
Convert the right-justified binary high byte to
hexadecimal.
From hexadecimal, multiply the first number by
160= 1 and the second number by 161= 16.
The sum equals the decimal equivalent.
0111 0011b →73h →(3 × 160) + (7 × 161) = 115
Low byte conversion (for example, 0111 0000):
To convert the left-justified binary low-byte to
decimal, use bits 7 through 4 and ignore bits 3
through 0 because they do not affect the value of
the number.
0111b →(0 × 1/2)1+ (1 × 1/2)2+ (1 × 1/2)3+ (1
× 1/2)4= 0.4375 Figure 14. Internal Register Structure
Note that the final numerical result is the sum of the
high byte and low byte. In negative temperatures, the
unsigned low byte adds to the negative high byte to
result in a value less than the high byte (for instance,
–15 + 0.75 = –14.25, not –15.75).
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Table 3. Register Map
BIT DESCRIPTION
POINTER
(HEX) POR (HEX) 7 6 5 4 3 2 1 0 REGISTER DESCRIPTION
00 00 LT11 LT10 LT9 LT8 LT7 LT6 LT5 LT4 Local Temperature (High Byte) (1)
Remote Temperature 1
01 00 RT11 RT10 RT9 RT8 RT7 RT6 RT5 RT4 (High Byte)(1)
Remote Temperature 2
02 00 RT11 RT10 RT9 RT8 RT7 RT6 RT5 RT4 (High Byte)(1) (2) (3)
Remote Temperature 3
03 00 RT11 RT10 RT9 RT8 RT7 RT6 RT5 RT4 (High Byte)(1) (3)
08 BUSY 0 0 0 0 0 0 0 Status Register
09 00 0 SD 0 0 0 RANGE 0 0 Configuration Register 1
1C/3C(2)/
0A 0 REN3(3) REN2(2) (3) REN LEN RC 0 0 Configuration Register 2
7C(3)
0B 07 0 0 0 0 0 R2 R1 R0 Conversion Rate Register
0F X X X X X X X X One-Shot Start(4)
10 00 LT3 LT2 LT1 LT0 0 0 PVLD 0 Local Temperature (Low Byte)
11 00 RT3 RT2 RT1 RT0 0 0 PVLD OPEN Remote Temperature 1 (Low Byte)
Remote Temperature 2
12 00 RT3 RT2 RT1 RT0 0 0 PVLD OPEN (Low Byte)(2) (3)
13 00 RT3 RT2 RT1 RT0 0 0 PLVD OPEN Remote Temperature 3 (Low Byte)(3)
21 00 NC7 NC6 NC5 NC4 NC3 NC2 NC1 NC0 N Correction 1
22 00 NC7 NC6 NC5 NC4 NC3 NC2 NC1 NC0 N Correction 2(2) (3)
23 00 NC7 NC6 NC5 NC4 NC3 NC2 NC1 NC0 N Correction 3(3)
FC X X X X X X X X Software Reset(5)
FE 55 0 1 0 1 0 1 0 1 Manufacturer ID
0 0 1 0 0 0 0 1 TMP421 Device ID
FF 21 0 0 1 0 0 0 1 0 TMP422 Device ID
0 0 1 0 0 0 1 1 TMP423 Device ID
(1) Compatible with Two-Byte Read; see Figure 19.
(2) TMP422.
(3) TMP423.
(4) X = undefined. Writing any value to this register initiates a one-shot start; see the One-Shot Conversion section.
(5) X = undefined. Writing any value to this register initiates a software reset; see the Software Reset section.
The TMP421/22/23 contain circuitry to assure that a
TEMPERATURE REGISTERS low byte register read command returns data from the
same ADC conversion as the immediately preceding
The TMP421/22/23 have multiple 8-bit registers that high byte read command. This assurance remains
hold temperature measurement results. The local valid only until another register is read. For proper
channel and each of the remote channels have a high operation, the high byte of a temperature register
byte register that contains the most significant bits should be read first. The low byte register should be
(MSBs) of the temperature analog-to-digital converter read in the next read command. The low byte register
(ADC) result and a low byte register that contains the may be left unread if the LSBs are not needed.
least significant bits (LSBs) of the temperature ADC Alternatively, the temperature registers may be read
result. The local channel high byte address is 00h; as a 16-bit register by using a single two-byte read
the local channel low byte address is 10h. The command from address 00h for the local channel
remote channel high byte is at address 01h; the result, or from address 01h for the remote channel
remote channel low byte address is 11h. For the result (02h for the second remote channel result, and
TMP422, the second remote channel high byte 03h for the third remote channel). The high byte is
address is 02h; the second remote channel low byte output first, followed by the low byte. Both bytes of
is 12h. The TMP 423 uses the same local and remote this read operation are from the same ADC
address as the TMP421 and TMP422, with the third conversion. The power-on reset value of all
remote channel high byte of 03h; the third remote temperature registers is 00h.
channel low byte is 13h. These registers are read-
only and are updated by the ADC each time a
temperature measurement is completed.
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STATUS REGISTER shutdown mode. When SD is set to '0' again, the
TMP421/22/23 resume continuous conversions.
The Status Register reports the state of the When SD = '1', a single conversion can be started by
temperature ADCs. Table 4 summarizes the Status writing to the One-Shot Register. See the One-Shot
Register bits. The Status Register is read-only, and is Conversion section for more information.
read by accessing pointer address 08h. The temperature range is set by configuring the
The BUSY bit = '1' if the ADC is making a conversion; RANGE bit (bit 2) of the Configuration Register.
it is set to '0' if the ADC is not converting. Setting this bit low configures the TMP421/22/23 for
the standard measurement range (–40°C to +127°C);
CONFIGURATION REGISTER 1 temperature conversions will be stored in the
standard binary format. Setting bit 2 high configures
Configuration Register 1 (pointer address 09h) sets the TMP421/22/23 for the extended measurement
the temperature range and controls the shutdown range (–55°C to +150°C); temperature conversions
mode. The Configuration Register is set by writing to will be stored in the extended binary format (see
pointer address 09h and read by reading from pointer Table 1).
address 09h. Table 5 summarizes the bits of
Configuration Register 1. The remaining bits of the Configuration Register are
reserved and must always be set to '0'. The power-on
The shutdown (SD) bit (bit 6) enables or disables the reset value for this register is 00h.
temperature measurement circuitry. If SD = '0', the
TMP421/22/23 convert continuously at the rate set in CONFIGURATION REGISTER 2
the conversion rate register. When SD is set to '1',
the TMP421/22/23 stop converting when the current Configuration Register 2 (pointer address 0Ah)
conversion sequence is complete and enter a controls which temperature measurement channels
are enabled and whether the external channels have
the resistance correction feature enabled or not.
Table 6 summarizes the bits of Configuration
Register 2.
Table 4. Status Register Format
STATUS REGISTER (Read = 08h, Write = NA)
BIT # D7 D6 D5 D4 D3 D2 D1 D0
BIT NAME BUSY0000000
POR VALUE 0(1) 0000000
(1) FOR TMP421/TMP423: The BUSY changes to '1' almost immediately (< 100μs) following power-up, as the TMP421/TMP423 begin the
first temperature conversion. It is high whenever the TMP421/TMP423 convert a temperature reading.
FOR TMP422: The BUSY bit changes to '1' approximately 1ms following power-up. It is high whenever the TMP422 converts a
temperature reading.
Table 5. Configuration Register 1 Bit Descriptions
CONFIGURATION REGISTER 1 (Read/Write = 09h, POR = 00h)
POWER-ON RESET
BIT NAME FUNCTION VALUE
7 Reserved — 0
0 = Run
6 SD 0
1 = Shut Down
5, 4, 3 Reserved — 0
0 = –40°C to +127°C
2 Temperature Range 0
1 = –55°C to +150°C
1, 0 Reserved — 0
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The RC bit (bit 2) enables the resistance correction For the TMP423 only, the REN3 bit (bit 6) enables
feature for the external temperature channels. If RC = the third external measurement channel. If REN3 =
'1', series resistance correction is enabled; if RC = '0', '1', the third external channel is enabled; if REN3 =
resistance correction is disabled. Resistance '0', the third external channel is disabled.
correction should be enabled for most applications. The temperature measurement sequence is: local
However, disabling the resistance correction may channel, external channel 1, external channel 2,
yield slightly improved temperature measurement external channel 3, shutdown, and delay (to set
noise performance, and reduce conversion time by conversion rate, if necessary). The sequence starts
about 50%, which could lower power consumption over with the local channel. If any of the channels are
when conversion rates of two per second or less are disabled, they are bypassed in the sequence.
selected.
The LEN bit (bit 3) enables the local temperature CONVERSION RATE REGISTER
measurement channel. If LEN = '1', the local channel The Conversion Rate Register (pointer address 0Bh)
is enabled; if LEN = '0', the local channel is disabled. controls the rate at which temperature conversions
The REN bit (bit 4) enables external temperature are performed. This register adjusts the idle time
measurement for channel 1. If REN = '1', the first between conversions but not the conversion timing
external channel is enabled; if REN = '0', the external itself, thereby allowing the TMP421/22/23 power
channel is disabled. dissipation to be balanced with the temperature
register update rate. Table 7 describes the
For the TMP422 and TMP423 only, the REN2 bit (bit conversion rate options and corresponding current
5) enables the second external measurement consumption. A one-shot command can be used
channel. If REN2 = '1', the second external channel is during the idle time between conversions to
enabled; if REN2 = '0', the second external channel is immediately start temperature conversions on all
disabled. enabled channels.
Table 6. Configuration Register 2 Bit Descriptions
CONFIGURATION REGISTER 2 (Read/Write = 0Ah, POR = 1Ch for TMP421; 3Ch for TMP422; 7Ch for TMP423)
POWER-ON RESET
BIT NAME FUNCTION VALUE
7 Reserved — 0
0 = External Channel 3 Disabled 1 (TMP423)
6 REN3 1 = External Channel 3 Enabled 0 (TMP421, TMP422)
0 = External Channel 2 Disabled 1 (TMP422, TMP423)
5 REN2 1 = External Channel 2 Enabled 0 (TMP421)
0 = External Channel 1 Disabled
4 REN 1
1 = External Channel 1 Enabled
0 = Local Channel Disabled
3 LEN 1
1 = Local Channel Enabled
0 = Resistance Correction Disabled
2 RC 1
1 = Resistance Correction Enabled
1, 0 Reserved — 0
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=heff
1.008 300´
300 NADJUST
-
N =300
ADJUST -300 1.008´
heff
=V V
BE2 BE1
-hkT
qln I2
I1
TMP421
TMP422
TMP423
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Table 7. Conversion Rate Register
CONVERSION RATE REGISTER (Read/Write = 0Bh, POR = 07h)
AVERAGE IQ(TYP) (μA)
R7 R6 R5 R4 R3 R2 R1 R0 CONVERSIONS/SEC V+ = 2.7V V+ = 5.5V
0 0 0 0 0 0 0 0 0.0625 11 32
0 0 0 0 0 0 0 1 0.125 17 38
0 0 0 0 0 0 1 0 0.25 28 49
0 0 0 0 0 0 1 1 0.5 47 69
0 0 0 0 0 1 0 0 1 80 103
0 0 0 0 0 1 0 1 2 128 155
00000110 4(1) 190 220
00000111 8(2) 373 413
(1) Conversion rate shown is for only one or two enabled measurement channels. When three channels are enabled, the conversion rate is
2 and 2/3 conversions-per-second. When four channels are enabled, the conversion rate is 2 per second.
(2) Conversion rate shown is for only one enabled measurement channel. When two channels are enabled, the conversion rate is 4
conversions-per-second. When three channels are enabled, the conversion rate is 2 and 2/3 conversions-per-second. When four
channels are enabled, the conversion rate is 2 conversions-per-second.
The value ηin Equation 1 is a characteristic of the
ONE-SHOT CONVERSION particular transistor used for the remote channel. The
power-on reset value for the TMP421/22/23 is η=
When the TMP421/22/23 are in shutdown mode 1.008. The value in the η-Factor Correction Register
(SD = 1 in the Configuration Register 1), a single may be used to adjust the effective η-factor according
conversion is started on all enabled channels by to Equation 2 and Equation 3.
writing any value to the One-Shot Start Register,
pointer address 0Fh. This write operation starts one
conversion; the TMP421/22/23 return to shutdown
mode when that conversion completes. The value of (2)
the data sent in the write command is irrelevant and
is not stored by the TMP421/22/23. When the
TMP421/22/23 are in shutdown mode, the conversion
sequence currently in process must be completed (3)
before a one-shot command can be issued. One-shot The η-correction value must be stored in two's-
commands issued during a conversion are ignored. complement format, yielding an effective data range
from –128 to +127. The n-correction value may be
η-FACTOR CORRECTION REGISTER written to and read from pointer address 21h. The η-
The TMP421/22/23 allow for a different η-factor value correction value for the second remote channel
to be used for converting remote channel (TMP422 and TMP423) may be written and read from
measurements to temperature. The remote channel pointer address 22h. The η-correction value for the
uses sequential current excitation to extract a third remote channel (TMP423 only) may be written
differential VBE voltage measurement to determine to and read from pointer address 23h. The register
the temperature of the remote transistor. Equation 1 power-on reset value is 00h, thus having no effect
describes this voltage and temperature. unless the register is written to.
(1)
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SOFTWARE RESET address FEh. The device ID is obtained by reading
from pointer address FFh. The TMP421/22/23 each
The TMP421/22/23 may be reset by writing any value return 55h for the manufacturer code. The TMP421
to the Software Reset Register (pointer address returns 21h for the device ID; the TMP422 returns
FCh). This action restores the power-on reset state to 22h for the device ID; and the TMP423 returns 23h
all of the TMP421/22/23 registers as well as aborts for the device ID. These registers are read-only.
any conversion in process. The TMP421/22/23 also
support reset via the two-wire general call address BUS OVERVIEW
(0000 0000). The General Call Reset section contains
more information. The TMP421/22/23 are SMBus interface-compatible.
In SMBus protocol, the device that initiates the
Table 8. η-Factor Range transfer is called a master, and the devices controlled
by the master are slaves. The bus must be controlled
NADJUST by a master device that generates the serial clock
BINARY HEX DECIMAL η(SCL), controls the bus access, and generates the
0111 1111 7F 127 1.747977 START and STOP conditions.
0000 1010 0A 10 1.042759 To address a specific device, a START condition is
0000 1000 08 8 1.035616 initiated. START is indicated by pulling the data line
0000 0110 06 6 1.028571 (SDA) from a high-to-low logic level while SCL is
0000 0100 04 4 1.021622 high. All slaves on the bus shift in the slave address
0000 0010 02 2 1.014765 byte, with the last bit indicating whether a read or
0000 0001 01 1 1.011371 write operation is intended. During the ninth clock
0000 0000 00 0 1.008 pulse, the slave being addressed responds to the
1111 1111 FF –1 1.004651 master by generating an Acknowledge and pulling
1111 1110 FE –2 1.001325 SDA low.
1111 1100 FC –4 0.994737 Data transfer is then initiated and sent over eight
1111 1010 FA –6 0.988235 clock pulses followed by an Acknowledge bit. During
1111 1000 F8 –8 0.981818 data transfer SDA must remain stable while SCL is
1111 0110 F6 –10 0.975484 high, because any change in SDA while SCL is high
1000 0000 80 –128 0.706542 is interpreted as a control signal.
Once all data have been transferred, the master
GENERAL CALL RESET generates a STOP condition. STOP is indicated by
pulling SDA from low to high, while SCL is high.
The TMP421/22/23 support reset via the two-wire
General Call address 00h (0000 0000b). The SERIAL INTERFACE
TMP421/22/23 acknowledge the General Call
address and respond to the second byte. If the The TMP421/22/23 operate only as a slave device on
second byte is 06h (0000 0110b), the TMP421/22/23 either the two-wire bus or the SMBus. Connections to
execute a software reset. This software reset restores either bus are made via the open-drain I/O lines, SDA
the power-on reset state to all TMP421/22/23 and SCL. The SDA and SCL pins feature integrated
registers, and aborts any conversion in progress. The spike suppression filters and Schmitt triggers to
TMP421/22/23 take no action in response to other minimize the effects of input spikes and bus noise.
values in the second byte. The TMP421/22/23 support the transmission protocol
for fast (1kHz to 400kHz) and high-speed (1kHz to
IDENTIFICATION REGISTERS 3.4MHz) modes. All data bytes are transmitted MSB
first.
The TMP421/22/23 allow for the two-wire bus
controller to query the device for manufacturer and
device IDs to enable software identification of the
device at the particular two-wire bus address. The
manufacturer ID is obtained by reading from pointer
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DX1
DX2
DX3
DX4
SCL
SDA
V+
Q0
Address=1001100 Address=1001101 Address=1001110 Address=1001111
Q1
Q2
Q3
Q4
Q5
V+
SCL
SDA
GND Q7
DX1
DX2
DX3
DX4
V+
SCL
SDA
GND
DX1
DX2
DX3
DX4
V+
SCL
SDA
GND
DX1
DX2
DX3
DX4
V+
SCL
SDA
GND
Q6
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SERIAL BUS ADDRESS DXN connection should be left unconnected. The
polarity of the transistor for external channel 2 (pins 3
To communicate with the TMP421/22/23, the master and 4) sets the least significant bit of the slave
must first address slave devices via a slave address address. The polarity of the transistor for external
byte. The slave address byte consists of seven channel 1 (pins 1 and 2) sets the next least
address bits, and a direction bit indicating the intent significant bit of the slave address.
of executing a read or write operation. Table 9. TMP421 Slave Address Options
Two-Wire Interface Slave Device Addresses TWO-WIRE SLAVE
The TMP421 supports nine slave device addresses ADDRESS A1 A0
and the TMP422 supports four slave device 0011 100 Float 0
addresses. The TMP423 has one of two factory- 0011 101 Float 1
preset slave addresses. 0011 110 0 Float
The slave device address for the TMP421 is set by 0011 111 1 Float
the A1 and A0 pins according to Table 9.0101 010 Float Float
The slave device address for the TMP422 is set by 1001 100 0 0
the connections between the external transistors and 1001 101 0 1
the TMP422 according to Figure 15 and Table 10. If 1001 110 1 0
one of the channels is unused, the respective DXP 1001 111 1 1
connection should be connected to GND, and the
Table 10. TMP422 Slave Address Options
TWO-WIRE SLAVE ADDRESS DX1 DX2 DX3 DX4
1001 100 DXP1 DXN1 DXP2 DXN2
1001 101 DXP1 DXN1 DXN2 DXP2
1001 110 DXN1 DXP1 DXP2 DXN2
1001 111 DXN1 DXP1 DXN2 DXP2
Figure 15. TMP422 Connections for Device Address Setup
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The TMP422 checks the polarity of the external READ/WRITE OPERATIONS
transistor at power-on, or after software reset, by Accessing a particular register on the TMP421/22/23
forcing current to pin 1 while connecting pin 2 to is accomplished by writing the appropriate value to
approximately 0.6V. If the voltage on pin 1 does not the Pointer Register. The value for the Pointer
pull up to near the V+ of the TMP422, pin 1 functions Register is the first byte transferred after the slave
as DXP for channel 1, and the second LSB of the address byte with the R/W bit low. Every write
slave address is '0'. If the voltage on pin 1 does pull operation to the TMP421/22/23 requires a value for
up to near V+, the TMP422 forces current to pin 2 the Pointer Register (see Figure 17).
while connecting pin 1 to 0.6V. If the voltage on pin 2
does not pull up to near V+, the TMP422 uses pin 2 When reading from the TMP421/22/23, the last value
for DXP of channel 1, and sets the second LSB of the stored in the Pointer Register by a write operation is
slave address to '1'. If both pins are shorted to GND used to determine which register is read by a read
or if both pins are open, the TMP422 uses pin 1 as operation. To change which register is read for a read
DXP and sets the address bit to '0'. This process is operation, a new value must be written to the Pointer
then repeated for channel 2 (pins 3 and 4). Register. This transaction is accomplished by issuing
a slave address byte with the R/W bit low, followed
If the TMP422 is to be used with transistors that are by the Pointer Register byte; no additional data are
located on another IC (such as a CPU, DSP, or required. The master can then generate a START
graphics processor), it is recommended to use pin 1 condition and send the slave address byte with the
or pin 3 as DXP to ensure correct address detection. R/W bit high to initiate the read command. See
If the other IC has a lower supply voltage or is not Figure 19 for details of this sequence. If repeated
powered when the TMP422 tries to detect the slave reads from the same register are desired, it is not
address, a protection diode may turn on during the necessary to continually send the Pointer Register
detection process and the TMP422 may incorrectly bytes, because the TMP421/22/23 retain the Pointer
choose the DXP pin and corresponding slave Register value until it is changed by the next write
address. Using pin 1 and/or pin 3 for transistors that operation. Note that register bytes are sent MSB first,
are on other ICs ensures correct operation followed by the LSB.
independent of supply sequencing or levels. Read operations should be terminated by issuing a
The TMP423 has a factory-preset slave address. The Not-Acknowledge command at the end of the last
TMP423A slave address is 1001100b, and the byte to be read. For a single-byte operation, the
TMP423B slave address is 1001101b. The master should leave the SDA line high during the
configuration of the DXP and DXN channels are Acknowledge time of the first byte that is read from
independent of the address. Unused DXP channels the slave. For a two-byte read operation, the master
can be left open or tied to GND. must pull SDA low during the Acknowledge time of
the first byte read, and should leave SDA high during
the Acknowledge time of the second byte read from
the slave.
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SCL
SDA
t(LOW) tRtFt(HDSTA)
t(HDSTA)
t(HDDAT)
t(BUF)
t(SUDAT)
t(HIGH) t(SUSTA) t(SUSTO)
P S S P
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TIMING DIAGRAMS Data Transfer: The number of data bytes transferred
between a START and a STOP condition is not
The TMP421/22/23 are two-wire and SMBus- limited and is determined by the master device. The
compatible. Figure 16 to Figure 19 describe the receiver acknowledges data transfer.
timing for various operations on the TMP421/22/23.
Parameters for Figure 16 are defined in Table 11.Acknowledge: Each receiving device, when
Bus definitions are: addressed, is obliged to generate an Acknowledge
bit. A device that acknowledges must pull down the
Bus Idle: Both SDA and SCL lines remain high. SDA line during the Acknowledge clock pulse in such
a way that the SDA line is stable low during the high
Start Data Transfer: A change in the state of the period of the Acknowledge clock pulse. Setup and
SDA line, from high to low, while the SCL line is high, hold times must be taken into account. On a master
defines a START condition. Each data transfer receive, data transfer termination can be signaled by
initiates with a START condition. Denoted as Sin the master generating a Not-Acknowledge on the last
Figure 16.byte that has been transmitted by the slave.
Stop Data Transfer: A change in the state of the
SDA line from low to high while the SCL line is high
defines a STOP condition. Each data transfer
terminates with a repeated START or STOP
condition. Denoted as Pin Figure 16.
Figure 16. Two-Wire Timing Diagram
Table 11. Timing Characteristics for Figure 16
FAST MODE HIGH-SPEED MODE
PARAMETER MIN MAX MIN MAX UNIT
SCL Operating Frequency f(SCL) 0.001 0.4 0.001 3.4 MHz
Bus Free Time Between STOP and START Condition t(BUF) 600 160 ns
Hold time after repeated START condition. After this period, the first clock t(HDSTA) 100 100 ns
is generated.
Repeated START Condition Setup Time t(SUSTA) 100 100 ns
STOP Condition Setup Time t(SUSTO) 100 100 ns
Data Hold Time t(HDDAT) 0(1) 0(2) ns
Data Setup Time t(SUDAT) 100 10 ns
SCL Clock LOW Period t(LOW) 1300 160 ns
SCL Clock HIGH Period t(HIGH) 600 60 ns
Clock/Data Fall Time tF300 160 ns
Clock/Data Rise Time tR300 160 ns
for SCL ≤100kHz tR1000
(1) For cases with fall time of SCL less than 20ns and/or the rise or fall time of SDA less than 20ns, the hold time should be greater than
20ns.
(2) For cases with a fall time of SCL less than 10ns and/or the rise or fall time of SDA less than 10ns, the hold time should be greater than
10ns.
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Product Folder Link(s): TMP421 TMP422 TMP423
Frame1Two-WireSlaveAddressByte Frame2PointerRegisterByte
1
StartBy
Master
ACKBy
TMP421/22/23
ACKBy
TMP421/22/23
1 9 1
Frame3DataByte1
ACKBy
TMP421/22/23
1
D7
SDA
(Continued)
SCL
(Continued)
D6 D5 D4 D3 D2 D1 D0
9
9
SDA
SCL
0 0 1 1 0 0(1) R/WP7 P6 P5 P4 P3 P2 P1 P0
¼
¼
StopBy
Master
Frame1Two-WireSlaveAddressByte Frame2PointerRegisterByte
1
StartBy
Master
ACKBy
TMP421/22/23
ACKBy
TMP421/22/23
Frame3Two-WireSlaveAddressByte Frame4DataByte1ReadRegister
StartBy
Master
ACKBy
TMP421/22/23
NACKBy
Master(2)
From
TMP421/22/23
1 9 1 9
1 9 1 9
SDA
SCL
0 0 1 R/WP7 P6 P5 P4 P3 P2 P1 P0 ¼
¼
¼
¼
SDA
(Continued)
SCL
(Continued)
1 0 0 1
1 0 0(1)
1 0 0(1) R/WD7 D6 D5 D4 D3 D2 D1 D0
TMP421
TMP422
TMP423
www.ti.com
SBOS398C –JULY 2007–REVISED MAY 2012
(1) Slave address 1001100 shown.
Figure 17. Two-Wire Timing Diagram for Write Word Format
(1) Slave address 1001100 shown.
(2) Master should leave SDA high to terminate a single-byte read operation.
Figure 18. Two-Wire Timing Diagram for Single-Byte Read Format
Copyright © 2007–2012, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Link(s): TMP421 TMP422 TMP423
Frame1Two-WireSlaveAddressByte Frame2PointerRegisterByte
1
StartBy
Master
ACKBy
TMP421/22/23
ACKBy
TMP421/22/23
Frame3Two-WireSlaveAddressByte Frame4DataByte1ReadRegister
StartBy
Master
ACKBy
TMP421/22/23
ACKBy
Master
From
TMP421/22/23
1 9 1 9
1 9 1 9
SDA
SCL
0 0 1 R/WP7 P6 P5 P4 P3 P2 P1 P0 ¼
¼
¼
¼
SDA
(Continued)
SCL
(Continued)
SDA
(Continued)
SCL
(Continued)
1 0 0 1
1 0 0(1)
1 0 0(1) R/WD7 D6 D5 D4 D3 D2 D1 D0
Frame5DataByte2ReadRegister
StopBy
Master
NACKBy
Master(2)
From
TMP421/22/23
19
D7 D6 D5 D4 D3 D2 D1 D0
TMP421
TMP422
TMP423
SBOS398C –JULY 2007–REVISED MAY 2012
www.ti.com
(1) Slave address 1001100 shown.
(2) Master should leave SDA high to terminate a two-byte read operation.
Figure 19. Two-Wire Timing Diagram for Two-Byte Read Format
HIGH-SPEED MODE to initiate a data transfer operation. The bus
continues to operate in Hs-mode until a STOP
In order for the two-wire bus to operate at frequencies condition occurs on the bus. Upon receiving the
above 400kHz, the master device must issue a High- STOP condition, the TMP421/22/23 switch the input
Speed mode (Hs-mode) master code (0000 1xxx) as and output filters back to fast mode operation.
the first byte after a START condition to switch the
bus to high-speed operation. The TMP421/22/23 do TIMEOUT FUNCTION
not acknowledge this byte, but switch the input filters
on SDA and SCL and the output filter on SDA to The TMP421/22/23 reset the serial interface if either
operate in Hs-mode, allowing transfers at up to SCL or SDA are held low for 30ms (typical) between
3.4MHz. After the Hs-mode master code has been a START and STOP condition. If the TMP421/22/23
issued, the master transmits a two-wire slave address are holding the bus low, the device releases the bus
and waits for a START condition. To avoid activating
the timeout function, it is necessary to maintain a
communication speed of at least 1kHz for the SCL
operating frequency.
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Product Folder Link(s): TMP421 TMP422 TMP423
T =
ERR
h1.008-
1.008 (273.15+T( C))°´
TMP421
TMP422
TMP423
www.ti.com
SBOS398C –JULY 2007–REVISED MAY 2012
SHUTDOWN MODE (SD) DX4 (TMP422), to minimize the effects of noise.
However, a bypass capacitor placed differentially
The TMP421/22/23 Shutdown Mode allows the user across the inputs of the remote temperature sensor is
to save maximum power by shutting down all device recommended to make the application more robust
circuitry other than the serial interface, reducing against unwanted coupled signals. The value of this
current consumption to typically less than 3μA; see capacitor should be between 100pF and 1nF. Some
Figure 10,Shutdown Quiescent Current vs Supply applications attain better overall accuracy with
Voltage. Shutdown Mode is enabled when the SD bit additional series resistance; however, this increased
(bit 6) of Configuration Register 1 is high; the device accuracy is application-specific. When series
shuts down once the current conversion is completed. resistance is added, the total value should not be
When SD is low, the device maintains a continuous greater than 3kΩ. If filtering is needed, suggested
conversion state. component values are 100pF and 50Ωon each input;
exact values are application-specific.
SENSOR FAULT REMOTE SENSING
The TMP421 can sense a fault at the DXP input
resulting from incorrect diode connection. The The TMP421/22/23 are designed to be used with
TMP421/22/23 can all sense an open circuit. Short- either discrete transistors or substrate transistors built
circuit conditions return a value of –64°C. The into processor chips and ASICs. Either NPN or PNP
detection circuitry consists of a voltage comparator transistors can be used, as long as the base-emitter
that trips when the voltage at DXP exceeds junction is used as the remote temperature sense.
(V+) – 0.6V (typical). The comparator output is NPN transistors must be diode-connected. PNP
continuously checked during a conversion. If a fault is transistors can either be transistor- or diode-
detected, the OPEN bit (bit 0) in the temperature connected (see Figure 11,Figure 12, and Figure 13).
result register is set to '1' and the rest of the register
bits should be ignored. Errors in remote temperature sensor readings are
typically the consequence of the ideality factor and
When not using the remote sensor with the TMP421, current excitation used by the TMP421/22/23 versus
the DXP and DXN inputs must be connected together the manufacturer-specified operating current for a
to prevent meaningless fault warnings. When not given transistor. Some manufacturers specify a high-
using a remote sensor with the TMP422, the DX pins level and low-level current for the temperature-
should be connected (refer to Table 10) such that sensing substrate transistors. The TMP421/22/23 use
DXP connections are grounded and DXN connections 6μA for ILOW and 120μA for IHIGH.
are left open (unconnected). Unused TMP423 DXP
pins can be left open or connected to GND. The ideality factor (η) is a measured characteristic of
a remote temperature sensor diode as compared to
an ideal diode. The TMP421/22/23 allow for different
UNDERVOLTAGE LOCKOUT η-factor values; see the N-Factor Correction Register
The TMP421/22/23 sense when the power-supply section.
voltage has reached a minimum voltage level for the The ideality factor for the TMP421/22/23 is trimmed
ADC to function. The detection circuitry consists of a to be 1.008. For transistors that have an ideality
voltage comparator that enables the ADC after the factor that does not match the TMP421/22/23,
power supply (V+) exceeds 2.45V (typical). The Equation 4 can be used to calculate the temperature
comparator output is continuously checked during a error. Note that for the equation to be used correctly,
conversion. The TMP421/22/23 do not perform a actual temperature (°C) must be converted to kelvins
temperature conversion if the power supply is not (K).
valid. The PVLD bit (bit 1, see Table 3) of the
individual Local/Remote Temperature Register is set
to '1' and the temperature result may be incorrect. (4)
FILTERING Where:
Remote junction temperature sensors are usually η= ideality factor of remote temperature sensor
implemented in a noisy environment. Noise is most T(°C) = actual temperature
often created by fast digital signals, and it can corrupt TERR = error in TMP421/22/23 because η ≠ 1.008
measurements. The TMP421/22/23 have a built-in Degree delta is the same for °C and K
65kHz filter on the inputs of DXP and DXN
(TMP421/TMP423), or on the inputs of DX1 through
Copyright © 2007–2012, Texas Instruments Incorporated Submit Documentation Feedback 23
Product Folder Link(s): TMP421 TMP422 TMP423
TERR +ǒ1.004 *1.008
1.008 Ǔ ǒ273.15 )100°CǓ
TERR +1.48°C
TMP421
TMP422
TMP423
SBOS398C –JULY 2007–REVISED MAY 2012
www.ti.com
For η= 1.004 and T(°C) = 100°C: power dissipated as a result of exciting the remote
temperature sensor is negligible because of the small
currents used. For a 5.5V supply and maximum
conversion rate of eight conversions per second, the
TMP421/22/23 dissipate 2.3mW (PDIQ = 5.5V ×
(5) 415μA). A θJA of 100°C/W (for SOT23 package)
causes the junction temperature to rise approximately
If a discrete transistor is used as the remote +0.23°C above the ambient.
temperature sensor with the TMP421/22/23, the best
accuracy can be achieved by selecting the transistor LAYOUT CONSIDERATIONS
according to the following criteria: Remote temperature sensing on the TMP421/22/23
1. Base-emitter voltage > 0.25V at 6μA, at the measures very small voltages using very low
highest sensed temperature. currents; therefore, noise at the IC inputs must be
2. Base-emitter voltage < 0.95V at 120μA, at the minimized. Most applications using the
lowest sensed temperature. TMP421/22/23 will have high digital content, with
3. Base resistance < 100Ω.several clocks and logic level transitions creating a
4. Tight control of VBE characteristics indicated by noisy environment. Layout should adhere to the
small variations in hFE (that is, 50 to 150). following guidelines:
1. Place the TMP421/22/23 as close to the remote
Based on these criteria, two recommended small- junction sensor as possible.
signal transistors are the 2N3904 (NPN) or 2N3906
(PNP). 2. Route the DXP and DXN traces next to each
other and shield them from adjacent signals
MEASUREMENT ACCURACY AND THERMAL through the use of ground guard traces; see
CONSIDERATIONS Figure 20. If a multilayer PCB is used, bury these
traces between ground or V+ planes to shield
The temperature measurement accuracy of the them from extrinsic noise sources. 5 mil
TMP421/22/23 depends on the remote and/or local (0.127mm) PCB traces are recommended.
temperature sensor being at the same temperature 3. Minimize additional thermocouple junctions
as the system point being monitored. Clearly, if the caused by copper-to-solder connections. If these
temperature sensor is not in good thermal contact junctions are used, make the same number and
with the part of the system being monitored, then approximate locations of copper-to-solder
there will be a delay in the response of the sensor to connections in both the DXP and DXN
a temperature change in the system. For remote connections to cancel any thermocouple effects.
temperature-sensing applications using a substrate
transistor (or a small, SOT23 transistor) placed close 4. Use a 0.1μF local bypass capacitor directly
to the device being monitored, this delay is usually between the V+ and GND of the TMP421/22/23;
not a concern. see Figure 21. Minimize filter capacitance
between DXP and DXN to 1000pF or less for
The local temperature sensor inside the optimum measurement performance. This
TMP421/22/23 monitors the ambient air around the capacitance includes any cable capacitance
device. The thermal time constant for the between the remote temperature sensor and the
TMP421/22/23 is approximately two seconds. This TMP421/22/23.
constant implies that if the ambient air changes 5. If the connection between the remote
quickly by 100°C, it would take the TMP421/22/23 temperature sensor and the TMP421/22/23 is
about 10 seconds (that is, five thermal time less than 8 in (20.32 cm) long, use a twisted-wire
constants) to settle to within 1°C of the final value. In pair connection. Beyond 8 in, use a twisted,
most applications, the TMP421/22/23 package is in shielded pair with the shield grounded as close to
electrical, and therefore thermal, contact with the the TMP421/22/23 as possible. Leave the remote
printed circuit board (PCB), as well as subjected to sensor connection end of the shield wire open to
forced airflow. The accuracy of the measured avoid ground loops and 60Hz pickup.
temperature directly depends on how accurately the
PCB and forced airflow temperatures represent the 6. Thoroughly clean and remove all flux residue in
temperature that the TMP421/22/23 is measuring. and around the pins of the TMP421/22/23 to
Additionally, the internal power dissipation of the avoid temperature offset readings as a result of
TMP421/22/23 can cause the temperature to rise leakage paths between DXP or DXN and GND,
above the ambient or PCB temperature. The internal or between DXP or DXN and V+.
24 Submit Documentation Feedback Copyright © 2007–2012, Texas Instruments Incorporated
Product Folder Link(s): TMP421 TMP422 TMP423
V+
DXP
DXN
GND
GroundorV+layer
onbottomand/or
top,ifpossible.
1
2
3
4
8
7
6
5
TMP421
0.1mFCapacitor
V+
GND
PCBVia
DXP
DXN
A1
A0
1
2
3
4
8
7
6
5
TMP422
0.1mFCapacitor
V+
GND
PCBVia
DX1
DX2
DX3
DX4
1
2
3
4
8
7
6
5
TMP423
0.1mFCapacitor
V+
GND
PCBVia
DXP1
DXP2
DXP3
DXN
TMP421C
0.1mFCapacitor
V+
GND
PCBVia
DXP
DXN
A1
A0
1
2
8
7
3
4
6
5
TMP421
TMP422
TMP423
www.ti.com
SBOS398C –JULY 2007–REVISED MAY 2012
NOTE: Use minimum 5 mil (0.127mm) traces with 5 mil spacing.
Figure 20. Suggested PCB Layer Cross-Section
Figure 21. Suggested Bypass Capacitor Placement and Trace Shielding
Copyright © 2007–2012, Texas Instruments Incorporated Submit Documentation Feedback 25
Product Folder Link(s): TMP421 TMP422 TMP423
TMP421
TMP422
TMP423
SBOS398C –JULY 2007–REVISED MAY 2012
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REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (March 2008) to Revision C Page
• Removed package name from title ....................................................................................................................................... 1
• Added new DSBGA package to feature bullet ...................................................................................................................... 1
• Added TMP421C device to Description section ................................................................................................................... 1
• Added TMP421C device with DSBGA package to Package Information table .................................................................... 2
• Added new Electrical Characteristics table for TMP421C .................................................................................................... 4
• Changed V+ pin voltage range in all Pin Assignment tables from 2.7V to 2.55V ................................................................ 5
• Added DSBGA package to TMP421 Pin Configuration section ........................................................................................... 5
• Changed supply voltage minimum range for pin 8 from 2.55V to 2.7V in TMP422 Pin Assignments table ........................ 5
• Changed supply voltage minimum range for pin 8 from 2.55V to 2.7V in TMP423 Pin Assignments table ........................ 6
• Changed label from VSto V+ and value from 2.7V to 2.55V in Figure 4 ............................................................................. 7
• Changed label from VSto V+ and value from 2.7V to 2.55V in Figure 5 ............................................................................. 8
• Changed label from VSto V+ and value from 2.7V to 2.55V in Figure 8 ............................................................................. 8
• Added new DSBGA package text to first paragraph of Application Information section ...................................................... 9
• Changed text in first paragraph of Application Information section ...................................................................................... 9
• Changed text in first paragraph of Application Information section to clarify temperature measurement channels ............ 9
• Changed text in last paragraph of Application Information section ...................................................................................... 9
• Changed minimum temperature value for bit 2 = 0 from –55°C to –40°C in Table 5 ......................................................... 14
• Changed header row for Table 6 ........................................................................................................................................ 15
• Changed VSto V+ in Table 7 .............................................................................................................................................. 16
• Added "(for SOT23 package)" to end of Measurement Accuracy and Thermal Considerations section ........................... 24
• Changed VDD to V+ in bullet 2 of Layout Considerations section ....................................................................................... 24
• Added TMP421C to Figure 21 ............................................................................................................................................ 25
26 Submit Documentation Feedback Copyright © 2007–2012, Texas Instruments Incorporated
Product Folder Link(s): TMP421 TMP422 TMP423
PACKAGE OPTION ADDENDUM
www.ti.com 15-May-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TMP421AIDCNR ACTIVE SOT-23 DCN 8 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TMP421AIDCNRG4 ACTIVE SOT-23 DCN 8 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TMP421AIDCNT ACTIVE SOT-23 DCN 8 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TMP421AIDCNTG4 ACTIVE SOT-23 DCN 8 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TMP421YZDR ACTIVE DSBGA YZD 8 3000 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
TMP421YZDT ACTIVE DSBGA YZD 8 250 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
TMP422AIDCNR ACTIVE SOT-23 DCN 8 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TMP422AIDCNRG4 ACTIVE SOT-23 DCN 8 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TMP422AIDCNT ACTIVE SOT-23 DCN 8 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TMP422AIDCNTG4 ACTIVE SOT-23 DCN 8 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TMP423AIDCNR ACTIVE SOT-23 DCN 8 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TMP423AIDCNRG4 ACTIVE SOT-23 DCN 8 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TMP423AIDCNT ACTIVE SOT-23 DCN 8 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TMP423AIDCNTG4 ACTIVE SOT-23 DCN 8 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TMP423BIDCNR ACTIVE SOT-23 DCN 8 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TMP423BIDCNRG4 ACTIVE SOT-23 DCN 8 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TMP423BIDCNT ACTIVE SOT-23 DCN 8 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
PACKAGE OPTION ADDENDUM
www.ti.com 15-May-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TMP423BIDCNTG4 ACTIVE SOT-23 DCN 8 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TMP422 :
•Enhanced Product: TMP422-EP
NOTE: Qualified Version Definitions:
•Enhanced Product - Supports Defense, Aerospace and Medical Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TMP421AIDCNR SOT-23 DCN 8 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TMP421AIDCNT SOT-23 DCN 8 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TMP421YZDR DSBGA YZD 8 3000 180.0 8.4 1.1 2.29 0.69 4.0 8.0 Q1
TMP421YZDT DSBGA YZD 8 250 180.0 8.4 1.1 2.29 0.69 4.0 8.0 Q1
TMP422AIDCNR SOT-23 DCN 8 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TMP422AIDCNT SOT-23 DCN 8 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TMP423AIDCNR SOT-23 DCN 8 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TMP423AIDCNT SOT-23 DCN 8 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TMP423BIDCNR SOT-23 DCN 8 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TMP423BIDCNT SOT-23 DCN 8 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 25-May-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TMP421AIDCNR SOT-23 DCN 8 3000 195.0 200.0 45.0
TMP421AIDCNT SOT-23 DCN 8 250 195.0 200.0 45.0
TMP421YZDR DSBGA YZD 8 3000 210.0 185.0 35.0
TMP421YZDT DSBGA YZD 8 250 210.0 185.0 35.0
TMP422AIDCNR SOT-23 DCN 8 3000 195.0 200.0 45.0
TMP422AIDCNT SOT-23 DCN 8 250 195.0 200.0 45.0
TMP423AIDCNR SOT-23 DCN 8 3000 195.0 200.0 45.0
TMP423AIDCNT SOT-23 DCN 8 250 195.0 200.0 45.0
TMP423BIDCNR SOT-23 DCN 8 3000 195.0 200.0 45.0
TMP423BIDCNT SOT-23 DCN 8 250 195.0 200.0 45.0
PACKAGE MATERIALS INFORMATION
www.ti.com 25-May-2012
Pack Materials-Page 2
D: Max =
E: Max =
2.122 mm, Min =
0.932 mm, Min =
2.062 mm
0.872 mm
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