BlueCore 2-Flash Device Features n n n n n n n Single Chip Bluetooth TM System Fully qualified Bluetooth system Low power 1.8V operation Advance Information Data Sheet for Minimum external components Integrated 1.8V regulator 15-bit linear audio CODEC Dual UART ports Available in TFBGA and LFBGA packages BC215159A BC219159A January 2003 Also available in `RF Plug and Go' package for low cost manufacture General Description Applications BlueCore2-Flash is a single chip radio and baseband IC for BluetoothTM 2.4GHz systems. It is implemented in 0.18m CMOS technology. n Headsets n Cellular Handsets n Personal Digital Assistants n Mice n Keyboards BlueCore2-Flash has the same pinout and electrical characteristics as available in BlueCore2-ROM to enable development of custom code before committing to ROM. The integrated mono audio CODEC allows for more compact designs and low power consumption for battery powered applications. BlueCore2-Flash has been designed to reduce the number of external components required which ensures production costs are minimised. The device incorporates auto-calibration and built-in self-test (BIST) routines to simplify development, type approval and production test. All hardware and device firmware is fully compliant with the Bluetooth specification v1.1. BlueCore2-Flash System Architecture BC216013A-ds-001Pb Advance Information Page 1 of 54 BlueCore2-Flash Product Data Sheet n TM Contents Contents 1 2 3 2.2 Device Terminal Functions .................................................................................................................................6 10 x 10 Package Information........................................................................................................................................9 3.1 BC219159A-BN Pinout Diagram .......................................................................................................................9 3.2 Device Terminal Functions .............................................................................................................................. 10 Electrical Characteristics........................................................................................................................................... 14 Radio Characteristics ................................................................................................................................................. 19 Device Diagrams .......................................................................................................................................................... 22 Description of Functional Blocks ............................................................................................................................ 24 7.1 RF Receiver........................................................................................................................................................ 24 7.1.1 Low Noise Amplifier .......................................................................................................................... 24 7.1.2 Analogue to Digital Converter.......................................................................................................... 24 7.2 RF Transmitter................................................................................................................................................... 24 7.2.1 IQ Modulator....................................................................................................................................... 24 7.2.2 Power Amplifier.................................................................................................................................. 24 7.2.3 Auxiliary DAC...................................................................................................................................... 24 7.3 RF Synthesiser .................................................................................................................................................. 24 7.4 Clock Input and Generation............................................................................................................................. 24 7.5 8 9 Baseband and Logic ......................................................................................................................................... 25 7.5.1 Memory Management Unit............................................................................................................... 25 7.5.2 Burst Mode Controller....................................................................................................................... 25 7.5.3 Physical Layer Hardware Engine DSP .......................................................................................... 25 7.5.4 RAM..................................................................................................................................................... 25 7.5.5 Flash ROM.......................................................................................................................................... 25 7.5.6 USB...................................................................................................................................................... 25 7.5.7 Synchronous Serial Interface .......................................................................................................... 25 7.5.8 UART ................................................................................................................................................... 26 7.5.9 Audio PCM Interface ......................................................................................................................... 26 7.6 Microcontroller ................................................................................................................................................... 26 7.6.1 Programmable I/O ............................................................................................................................. 26 7.6.2 Extended Programmable I/O Port................................................................................................... 26 7.6.3 Audio CODEC.................................................................................................................................... 26 CSR Bluetooth Software Stacks.............................................................................................................................. 27 BlueCore HCI Stack....................................................................................................................................................... 27 8.1.1 Key Features of the HCI Stack........................................................................................................ 28 BlueCore RFCOMM Stack............................................................................................................................................ 30 8.2.1 Key Features of the BlueCore2-Flash RFCOMM Stack.............................................................. 30 BlueCore Virtual Machine Stack.................................................................................................................................. 31 8.4 Host-Side Software ........................................................................................................................................... 32 8.5 Additional Software for Other Embedded Applications ............................................................................... 32 8.6 CSR Development Systems ............................................................................................................................ 32 External Interfaces....................................................................................................................................................... 33 9.1 Transmitter/Receiver Inputs and Outputs ...................................................................................................... 33 9.2 RF Plug and Go ................................................................................................................................................. 34 9.3 Asynchronous Serial Data Port (UART) and USB Port............................................................................... 34 9.4 9.5 UART Bypass..................................................................................................................................................... 35 9.4.1 UART Configuration while RESET is Active.................................................................................. 35 9.4.2 UART Bypass Mode.......................................................................................................................... 35 PCM CODEC Interface..................................................................................................................................... 36 9.6 Serial Peripheral Interface ............................................................................................................................... 36 BC216013A-ds-001Pb Advance Information Page 2 of 54 BlueCore2-Flash Product Data Sheet 4 5 6 7 Key Features.....................................................................................................................................................................4 6 x 6 Package Information ............................................................................................................................................5 2.1 BC215159A-HK and BC215159A-TK Pinout Diagram ...................................................................................5 Contents 9.7 9.8 I/O Parallel Ports ............................................................................................................................................... 36 9.7.1 PIO Defaults for BTv1.1 HCI level Bluetooth Stack ..................................................................... 37 I2C Interface....................................................................................................................................................... 37 9.9 TCXO Enable OR Function ............................................................................................................................. 38 9.10 Reset ................................................................................................................................................................... 38 9.11 10.2 10 x 10 LFBGA 96-Ball Package.................................................................................................................... 44 11 Package Dimensions................................................................................................................................................... 45 11.1 6 x 6 TFBGA 84-Ball Package ........................................................................................................................ 45 11.2 10 x 10 LFBGA 96-Ball Package.................................................................................................................... 47 12 Ordering Information................................................................................................................................................... 48 12.1 BlueCore2-Flash................................................................................................................................................ 48 13 Contact Information..................................................................................................................................................... 49 14 Document References................................................................................................................................................ 50 15 Acronyms and Definitions ......................................................................................................................................... 51 16 Record of Changes...................................................................................................................................................... 54 List of Figures Figure 2.1: BlueCore2-Flash 6 x 6mm Packages (BC215159A-HK and BC215159A-TK)................... 5 Figure 3.1: BlueCore2-Flash 10 x 10mm LFBGA Package (BC219159A-BN).................................... 9 Figure 6.1: BlueCore2-Flash Device Diagram for 6 x 6mm TFBGA Package................................... 22 Figure 8.1: BlueCore HCI Stack................................................................................................... 27 Figure 8.2: BlueCore RFCOMM Stack.......................................................................................... 30 Figure 8.3: Virtual Machine .......................................................................................................... 31 Figure 9.1: Circuit TX/RX_A and TX/RX_B ................................................................................... 33 Figure 9.2: Circuit RF_IN............................................................................................................. 33 Figure 9.3: Circuit for RF_CONNECT........................................................................................... 34 Figure 9.4: UART Bypass Architecture ......................................................................................... 35 Figure 9.5: Example EEPROM Connection................................................................................... 37 Figure 9.6: Example TXCO Enable OR Function........................................................................... 38 Figure 9.7: VDD_DIG Output Circuit............................................................................................. 39 Figure 10.2: Application Circuit for Radio Characteristics Specification 10 x 10 LFBGA Package...... 44 Figure 11.1: BlueCore2-Flash TFBGA Package Dimensions.......................................................... 46 Figure 11.2: BlueCore2-Flash LFBGA Package Dimensions .......................................................... 47 BC216013A-ds-001Pb Advance Information Page 3 of 54 BlueCore2-Flash Product Data Sheet Power Supply..................................................................................................................................................... 39 9.11.1 Voltage Regulator.............................................................................................................................. 39 9.11.2 Sequencing......................................................................................................................................... 39 9.11.3 Sensitivity to Disturbances ............................................................................................................... 39 9.12 Audio CODEC.................................................................................................................................................... 40 9.12.1 Input Stage ......................................................................................................................................... 40 9.12.2 Microphone Input............................................................................................................................... 41 9.12.3 Line Input............................................................................................................................................ 41 9.12.4 Output stage....................................................................................................................................... 42 10 Application Schematic................................................................................................................................................ 43 10.1 6 x 6 TFBGA 84-Ball Package ........................................................................................................................ 43 Key Features 1 Key Features Radio Auxiliary Features (continued) n Operation with common TX/RX terminals simplifies external matching circuitry and eliminates external antenna switch n n Extensive built-in self-test minimises production test time Baseband and Software n No external trimming is required in production n Full RF reference designs are available Uncommitted 8-bit ADC and 8-bit DAC are available to application programs Internal programmed 4Mbit ROM for complete system solution n 32Kbyte on-chip RAM allows full speed Bluetooth data transfer, mixed voice and data, plus full 7 Slave piconet operation n Dedicated logic for forward error correction, header error control, access code correlation, demodulation, cyclic redundancy check, encryption bitstream generation, whitening and transmit pulse shaping Transcoders for A-law, -law and linear voice from host and A-law, -law and CVSD voice over air Transmitter n Up to +6dBm RF transmit power with level control from the on-chip 6-bit DAC over a dynamic range greater than 30dB n Supports Class 2 and Class 3 radios without the need for an external power amplifier or TX/RX switch n Supports Class 1 radios with an external power amplifier, provided by a power control terminal controlled by an internal 8-bit voltage DAC and an external RF TX/RX switch Physical Interfaces n n Synchronous serial interface up to 4Mbaud for system debugging Receiver n Integrated channel filters n n Digital demodulator for improved sensitivity and co-channel rejection UART interface with programmable Baud rate up to 1.5Mbaud with an optional bypass mode n n Digitised RSSI available in real time over the HCI interface Full speed USB interface supports OHCI and UHCI host interfaces. Compliant with USB v2.0 n n Fast AGC for enhanced dynamic range Synchronous bi-directional serial programmable audio interface n Optional I2CT M compatible interface Synthesiser n Fully integrated synthesizer; no external VCO varactor diode, resonator or loop filter Bluetooth Stack Running on an Internal Microcontroller n Compatible with crystals between 8 and 32MHz (in multiples of 250kHz) or an external clock CSR's Bluetooth Protocol Stack runs on-chip in a variety of configurations: n Accepts 15.36, 16.2, 16.8, 19.2, 19.44, 19.68, 19.8 and 38.4MHz TCXO frequencies for GSM and CDMA devices with either sinusoidal or logic level signals n Standard HCI (UART or USB) n Fully embedded to RFCOMM n Customer specific builds with embedded application code Auxiliary Features Audio CODEC n n 15-bit resolution with 8kHz sampling frequency n Designed for use in voice applications such as headsets and hands-free kits n Integrated input/output amplifiers capable of driving a microphone and speaker with minimum external components n Crystal oscillator with built-in digital trimming Power management includes digital shut down and wake up commands and an integrated low power oscillator for ultra-low power consumption during Park/Sniff/Hold modes n Device can be used with an external Master oscillator and provides a `clock request signal' to control external clock source n On-chip linear regulator, producing 1.8V output from 2.2-4.2V input n Power-on-reset cell detects low supply voltage n Arbitrary sequencing of power supplies is permitted BC216013A-ds-001Pb Package Options n 84-ball TFBGA 6 x 6 x 1.2mm 0.5mm pitch n 96-ball LFBGA 10 x 10 x 1.4mm 0.8mm pitch (RF Plug and GO package) Advance Information Page 4 of 54 BlueCore2-Flash Product Data Sheet n Device Pinout Diagram 2 2.1 6 x 6 Package Information BC215159A-HK and BC215159A-TK Pinout Diagram Orientation from top of device 2 3 4 5 6 7 8 9 10 A A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 B B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 C C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 D D1 D2 D3 D8 D9 D10 E E1 E2 E3 E8 E9 E10 F F1 F2 F3 F8 F9 F10 G G1 G2 G3 G8 G9 G10 H H1 H2 H3 H4 H5 H6 H7 H8 H9 H10 J J1 J2 J3 J4 J5 J6 J7 J8 J9 J10 K K1 K2 K3 K4 K5 K6 K7 K8 K9 K10 Figure 2.1: BlueCore2-Flash 6 x 6mm Packages (BC215159A-HK and BC215159A-TK) BC216013A-ds-001Pb Advance Information Page 5 of 54 BlueCore BlueCore2-Audio 2-Flash Product Product Data Data Sheet Sheet 1 Device Pinout Diagram 2.2 Device Terminal Functions Ball Pad Type Description RF_IN D1 Analogue Single ended receiver input PIO[0]/RXEN B1 Bi-directional with programmable strength internal pull-up/down Control output for external LNA (if fitted) PIO[1]/TXEN B2 Bi-directional with programmable strength internal pull-up/down Control output for external PA, Class 1 only TX_A F1 Analogue Transmitter output/switched receiver input TX_B E1 Analogue Complement of TX_A AUX_DAC D3 Analogue Voltage DAC output Synthesiser and Oscillator Ball Pad Type Description XTAL_IN K3 Analogue For crystal or external clock input XTAL_OUT J3 Analogue Drive for crystal LOOP_FILTER H2 Analogue PCM Interface Ball Pad Type Connection to external PLL loop filter (Do not connect) Description CMOS output, tristatable with weak internal pull-down CMOS input, with weak internal pull-down Bi-directional with weak internal pull-down Bi-directional with weak internal pull-down PCM_OUT G8 PCM_IN G9 PCM_SYNC G10 PCM_CLK H10 USB and UART Ball Pad Type Description UART_TX J10 CMOS output, tristatable with weak internal pull-up UART data output active high UART_RX H9 CMOS input with weak internal pull-down UART data input active high UART_RTS H7 CMOS output, tristatable with weak internal pull-up UART request to send active low UART_CTS H8 CMOS input with weak internal pull-down UART clear to send active low USB_DP J8 Bi-directional USB data plus with selectable internal 1.5k pull-up resistor USB_DN K8 Bi-directional USB data minus CODEC Ball Pad Type Description MIC_P H3 Analogue Microphone input positive MIC_N G3 Analogue Microphone input negative SPKR_P J1 Analogue Speaker output positive SPKR_N K1 Analogue Speaker output negative BC216013A-ds-001Pb Synchronous data output Synchronous data input Synchronous data sync Synchronous data clock Advance Information Page 6 of 54 BlueCore BlueCore2-Audio 2-Flash Product Product Data Data Sheet Sheet Radio Device Pinout Diagram Test and Debug Pad Type Description RESET C7 CMOS input with weak internal pull-down Reset if high. Input debounced so must be high for >5ms to cause a reset RESETB D8 CMOS input with weak internal pull-up Reset if low. Input debounced so must be low for >5ms to cause a reset SPI_CSB C9 CMOS input with weak internal pull-up Chip select for Serial Peripheral Interface, active low SPI_CLK C10 CMOS input with weak internal pull-down Serial Peripheral Interface clock SPI_MOSI C8 CMOS input with weak internal pull-down Serial Peripheral Interface data input SPI_MISO B9 CMOS output, tristatable with weak internal pull-down Serial Peripheral Interface data output TEST_EN C6 CMOS input with strong internal pull-down For test purposes only (leave unconnected) FLASH_EN B8 CMOS input with weak internal pull-down Pull high to VDD_MEM PIO Port Ball Pad Type Description PIO[2] B3 PIO[3] B4 PIO[4] E8 PIO[5] F8 PIO[6] F10 PIO[7] F9 PIO[8] C5 PIO[9] C3 PIO[10] C4 PIO[11] E3 AIO[0] H4 Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional AIO[1] H5 Bi-directional Programmable input/output line AIO[2] J5 Bi-directional Programmable input/output line BC216013A-ds-001Pb Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Advance Information Page 7 of 54 BlueCore BlueCore2-Audio 2-Flash Product Product Data Data Sheet Sheet Ball Device Pinout Diagram Ball Pad Type Description VREG_IN K6 VDD 2.2-3.6V Voltage input VDD_USB K9 VDD Positive supply for UART/USB ports VDD_PIO A3 VDD Positive supply for PIO and AUX DAC (1) VDD_PADS D10 VDD Positive supply for all other digital input/output ports (2) VDD_MEM A6,A7, A9, H6, J6, K7 VDD Positive supply for ROM memory and AIO ports VDD_CORE E10 VDD Positive supply for internal digital circuitry VDD_RADIO C1, C2 VDD Positive supply for RF circuitry VDD_VCO H1 VDD Positive supply for VCO and synthesiser circuitry VDD_ANA K4 VDD Positive supply for analogue circuitry and 1.8V regulated output VSS_USB J9, K10 VSS Ground connections for UART/USB ports VSS_PIO A1, A2 VSS Ground connections for PIO and AUX DAC VSS_PADS D9 VSS Ground connection for input/output VSS_MEM A10, B5, B7, B10, J7 VSS Ground connections for ROM memory and AIO ports VSS_CORE E9 VSS Ground connection for internal digital circuitry VSS_RADIO D2, E2, F2 VSS Ground connections for RF circuitry VSS_VCO G1, G2 VSS Ground connections for VCO and synthesiser VSS_ANA J2, J4, K2 VSS Ground connections for analogue circuitry VSS F3 VSS Ground connection for internal package shield Unconnected Terminals Ball Description A4, A5, A8, B6 and K5 Leave unconnected Notes: (1) Positive supply for PIO[3:0] and PIO[11:8]. (2) Positive supply for SPI/PCM ports and PIO[7:4]. BC216013A-ds-001Pb Advance Information Page 8 of 54 BlueCore BlueCore2-Audio 2-Flash Product Product Data Data Sheet Sheet Power Supplies and Control 10 x 10 Package Information 3 3.1 10 x 10 Package Information BC219159A-BN Pinout Diagram Orientation from top of device 2 3 4 5 6 7 8 9 10 11 A A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 B B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 C C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 D D1 D2 D3 D9 D10 D11 E E1 E2 E3 E9 E10 E11 F F1 F2 F3 F9 F10 F11 G G1 G2 G3 G9 G10 G11 H H1 H2 H3 H9 H10 H11 J J1 J2 J3 J4 J5 J6 J7 J8 J9 J10 J11 K K1 K2 K3 K4 K5 K6 K7 K8 K9 K10 K11 L L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 Figure 3.1: BlueCore2-Flash 10 x 10mm LFBGA Package (BC219159A-BN) BC216013A-ds-001Pb Advance Information Page 9 of 54 BlueCore BlueCore2-Audio 2-Flash Product Product Data Data Sheet Sheet 1 10 x 10 Package Information 3.2 Device Terminal Functions Ball Pad Type Description RF_IN D2 Analogue Single ended receiver input PIO[0]/RXEN D3 Bi-directional with programmable strength internal pull-up/down Control output for external LNA (if fitted) PIO[1]/TXEN C4 Bi-directional with programmable strength internal pull-up/down Control output for external PA Class 1 only BAL_MATCH A1 Analogue Tie to VSS_RADIO RF_CONNECT B1 Analogue 50O RF matched I/O AUX_DAC C2 Analogue Voltage DAC output Synthesiser and Oscillator Ball Pad Type Description XTAL_IN L3 Analogue For crystal or external clock input XTAL_OUT L4 Analogue Drive for crystal LOOP_FILTER J2 Analogue PCM Interface Ball Pad Type PCM_OUT G10 PCM_IN H11 PCM_SYNC G11 PCM_CLK H10 USB and UART Ball Pad Type Description UART_TX J10 CMOS output, tristatable with weak internal pull-up UART data output active high UART_RX J11 CMOS input with weak internal pull-down UART data input active high UART_RTS L11 CMOS output, tristatable with weak internal pull-up UART request to send active low UART_CTS K11 CMOS input with weak internal pull-down UART clear to send active low USB_DP L9 Bi-directional USB data plus with selectable internal 1.5k pull-up resistor USB_DN L8 Bi-directional USB data minus CODEC Ball Pad Type Description MIC_P K2 Analogue Microphone input positive MIC_N L2 Analogue Microphone input negative SPKR_P J5 Analogue Speaker output positive SPKR_N J4 Analogue Speaker output negative BC216013A-ds-001Pb Connection to external PLL loop filter (Do not connect) Description CMOS output, tristatable with weak internal pull-down CMOS input, with weak internal pull-down Bi-directional with weak internal pull-down Bi-directional with weak internal pull-down Synchronous data output Synchronous data input Synchronous data sync Synchronous data clock Advance Information Page 10 of 54 BlueCore BlueCore2-Audio 2-Flash Product Product Data Data Sheet Sheet Radio 10 x 10 Package Information Ball Pad Type Description RESET F9 CMOS input with weak internal pull-down Reset if high. Input debounced so must be high for >5ms to cause a reset RESETB G9 CMOS input with weak internal pull-up Reset if low. Input debounced so must be low for >5ms to cause a reset SPI_CSB C10 CMOS input with weak internal pull-up Chip select for Synchronous Peripheral Interface, active low SPI_CLK D10 CMOS input with weak internal pull-down Serial Peripheral Interface clock SPI_MOSI D11 CMOS input with weak internal pull-down Serial Peripheral Interface data input SPI_MISO C11 CMOS output, tristatable with weak internal pull-down Serial Peripheral Interface data output TEST_EN E9 CMOS input with strong internal pull-down For test purposes only (leave unconnected) FLASH_EN B10 CMOS input with weak internal pull-down Pull high to VDD_MEM PIO Port Ball Pad Type Description PIO[2] C3 PIO[3] B2 PIO[4] H9 PIO[5] J8 PIO[6] K8 PIO[7] K9 PIO[8] B3 PIO[9] B4 PIO[10] A4 PIO[11] A5 AIO[0] K5 Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional with programmable strength internal pull-up/down Bi-directional AIO[1] J6 Bi-directional Programmable input/output line AIO[2] K7 Bi-directional Programmable input/output line BC216013A-ds-001Pb Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Advance Information Page 11 of 54 BlueCore BlueCore2-Audio 2-Flash Product Product Data Data Sheet Sheet Test and Debug 10 x 10 Package Information Ball D[0] B5 D[1] C6 D[2] B6 D[3] A7 D[4] A8 D[5] B8 D[6] A9 D[7] A10 D[8] C5 D[9] A6 D[10] C7 D[11] B7 D[12] C8 D[13] C9 D[14] B9 D[15] A11 BC216013A-ds-001Pb Pad Type Description Bi-directional with weak internal pull-down Bi-directional with weak internal pull-down Bi-directional with weak internal pull-down Bi-directional with weak internal pull-down Bi-directional with weak internal pull-down Bi-directional with weak internal pull-down Bi-directional with weak internal pull-down Bi-directional with weak internal pull-down Bi-directional with weak internal pull-down Bi-directional with weak internal pull-down Bi-directional with weak internal pull-down Bi-directional with weak internal pull-down Bi-directional with weak internal pull-down Bi-directional with weak internal pull-down Bi-directional with weak internal pull-down Bi-directional with weak internal pull-down Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Programmable input/output line Advance Information Page 12 of 54 BlueCore BlueCore2-Audio 2-Flash Product Product Data Data Sheet Sheet PIO Port 10 x 10 Package Information Ball Pad Type Description VREG_IN L7 VDD 2.2-3.6V Voltage input VDD_USB L10 VDD Positive supply for UART/USB ports VDD_PIO A3 VDD Positive supply for PIO and AUX DAC (1) VDD_PADS E11 VDD Positive supply for all other digital input/output ports (2) VDD_DIG L6 VDD Positive 1.8V supply for VDD_MEM and VDD_CORE VDD_MEM B11, K6 VDD Positive supply for ROM memory and AIO and Extended PIO ports VDD_CORE F11 VDD Positive supply for internal digital circuitry VDD_RADIO E3 VDD Positive supply for RF circuitry VDD_ANA L5 VDD Positive supply for analogue circuitry and 1.8V regulated output VDD_BALUN F1 VDD Positive supply for balun VSS_USB K10 VSS Ground connection for UART/USB ports VSS_PIO A2 VSS Ground connection for PIO and AUX DAC VSS_PADS E10 VSS Ground connection for input/output VSS_MEM D9, J9 VSS Ground connections for ROM memory and AIO ports VSS_CORE F10 VSS Ground connection for internal digital circuitry VSS_RADIO E2, F3, G2 VSS Ground connections for RF circuitry VSS_VCO G3, H2, H3 VSS Ground connections for VCO and synthesiser VSS_ANA K4 VSS Ground connection for analogue circuitry VSS_BAL G1,J1, K1 VSS Ground connections for balun Unconnected Terminals Ball Description C1, D1, E1, F2, H1, J3, J7, K3 and L1 Leave unconnected Notes: (1) Positive supply for PIO[3:0] and PIO[11:8]. (2) Positive supply for SPI/PCM ports and PIO[7:4]. BC216013A-ds-001Pb Advance Information Page 13 of 54 BlueCore BlueCore2-Audio 2-Flash Product Product Data Data Sheet Sheet Power Supplies and Control Electrical Characteristics 4 Electrical Characteristics Absolute Maximum Ratings Rating Max -40C 150C Supply Voltage: VDD_RADIO, VDD_VCO, VDD_ANA, VDD_CORE, VDD_MEM, VDD_BAL -0.40V 1.90V Supply Voltage: VDD_PADS, VDD_PIO, VDD_USB -0.40V 3.70V Supply Voltage: VREG_IN -0.40V 4.20V VSS-0.4V VDD+0.4V Min Max -40C 105C -25C 85C Supply Voltage: VDD_RADIO, VDD_VCO, VDD_ANA, VDD_CORE, VDD_MEM, VDD_BAL 1.70V 1.90V Supply Voltage: VDD_PADS, VDD_PIO, VDD_USB 1.70V 3.60V Supply Voltage: VREG_IN 2.20V 4.20V Other Terminal Voltages Recommended Operating Conditions Operating Condition Operating Temperature Range Guaranteed RF performance range (1) Note: (1) Typical figures are given for RF performance between -40C and +105C. BC216013A-ds-001Pb Advance Information Page 14 of 54 BlueCore2-Flash Product Data Sheet Min Storage Temperature Electrical Characteristics Input/Output Terminal Characteristics Linear Regulator Min Typ Max Unit Output Voltage (Iload = 70mA / Vreg_IN = 3.0V) 1.70 1.78 1.85 V Temperature Coefficient Normal Operation -250 - 250 ppm/C Output Noise(1)(2) - - 1 mV rms Load Regulation (Iload < 100mA) - - 50 mV/A - - 50 s (1)(3) Settling Time Line Regulation (1)(4) - - dB - - mA Minimum Load Current 5 - - A Input Voltage - - 3.6 V Dropout Voltage (Iload = 70mA) Quiescent Current (excluding Ioad, Iload < 1mA) - - 350 mV 25 35 50 A 4 7 10 A 1.5 2.5 3.5 A Low Power Mode(5) Quiescent Current (excluding Ioad, Iload < 100A) Disabled Mode(6) Quiescent Current Notes: (1) Regulator output connected to 47nF pure and 4.7F 2.2 ESR capacitors. (2) Frequency range 100Hz to 100kHz. (3) 1mA to 70mA pulsed load. (4) Frequency range 100Hz to 10MHz. (5) Low power mode is entered and exited automatically when the chip enters/leaves Deep Sleep mode. (6) Regulator is disabled when VREG_IN is either open circuit or driven to the same voltage as VDD_ANA. BC216013A-ds-001Pb Advance Information Page 15 of 54 BlueCore2-Flash Product Data Sheet -20 100 Maximum Output Current Electrical Characteristics Input/Output Terminal Characteristics (Continued) Digital Terminals Min Typ Max Unit (VDD=3.0V) -0.4 - 0.8 V (VDD=1.8V) -0.4 - 0.4 V 0.7VDD - VDD+0.4 V - - 0.2 V V OL output logic level low, (lO = 4.0mA), VDD=1.8V - - 0.4 V V OH output logic level high, (lO = -4.0mA), VDD=3.0V VDD-0.2 - - V V OH output logic level high, (lO = -4.0mA), VDD=1.8V VDD-0.4 - - V Input Voltage Levels VIL input logic level low VIH input logic level high Output Voltage Levels V OL output logic level low, (lO = 4.0mA), VDD=3.0V -100 -20 -10 A Strong pull-down 10 20 100 A Weak pull-up -5 -1 0 A Weak pull-down 0 1 5 A I/O pad leakage current -1 0 1 A CI Input Capacitance 1.0 - 5.0 pF Min Typ Max Unit - 0.3VDD_USB 0.57VDD_USB - - V V VSS_USB< VIN< VDD_USB (1) -1 - 1 A CI Input capacitance 2.5 - 10.0 pF 0.0 2.8 - 0.2 VDD_USB V V Min Typ Max Unit - - 8 Bits 12.5 14.2 monotonic(2) 16.5 mV VSS_PIO -10.0 0.0 VDD_PIO-0.3 -1 -120 -1.5 - - VDD_PIO +0.1 0.2 VDD_PIO 1 120 1.5 10 5 V mA V V A mV LSB s s Strong pull-up Input/Output Terminal Characteristics (Continued) USB Terminals Input threshold VIL input logic level low VIH input logic level high Input leakage current Output Voltage levels To correctly terminated USB Cable VOL output logic level low VOH output logic level high Input/Output Terminal Characteristics (Continued) Auxiliary DAC, 8-Bit Resolution Resolution Average output step size Output Voltage (2) Voltage range (IO=0mA) Current range Minimum output voltage (IO=100A) Maximum output voltage (IO=10mA) High Impedance leakage current Offset Integral non-linearity (2) Starting time (50pF load) Settling time (50pF load) BC216013A-ds-001Pb Advance Information Page 16 of 54 BlueCore2-Flash Product Data Sheet Input and Tristate Current with: Electrical Characteristics Input/Output Terminal Characteristics (Continued) Crystal Oscillator (3) Digital trim range (4) Crystal frequency Trim step size Min (4) Transconductance Negative resistance (5) Typ Max Unit 8.0 - 32.0 MHz 5.0 6.2 8.0 pF - 0.1 - pF 2.0 - - mS 870 1500 2400 8.0 - 40.0 MHz External Clock Input frequency (6) Clock input level (7) - VDD_ANA V pk-pk - - 15 ps rms XTAL_IN input impedance - 10 - k XTAL_IN input capacitance - 4 - pF Power-on reset Min Typ Max Unit VDD_CORE falling threshold 1.40 1.50 1.60 V VDD_CORE rising threshold 1.50 1.60 1.70 V Hysteresis 0.05 0.10 0.15 V Input/Output Terminal Characteristics (Continued) Notes: VDD_CORE, VDD_RADIO, VDD_VCO, VDD_ANA, VDD_BAL and VDD_MEM are at 1.8V unless shown otherwise. VDD_PADS, VDD_PIO and VDD_USB are at 3.0V unless shown otherwise. The same setting of the digital trim is applied to both XTAL_IN and XTAL_OUT. Current drawn into a pin is defined as positive, current supplied out of a pin is defined as negative. (1) Internal USB pull-up disabled. (2) Specified for an output voltage between 0.2V and VDD_PIO -0.2V. (3) Integer multiple of 250kHz. (4) The difference between the internal capacitance at minimum and maximum settings of the internal digital trim. (5) XTAL frequency = 16MHz; XTAL C 0 = 0.75pF; XTAL load capacitance = 8.5pF. (6) Clock input can be any frequency between 8 and 40MHz in steps of 250kHz + CDMA/3G TCXO frequencies of 15.36, 16.2, 16.8, 19.2, 19.44, 19.68, 19.8 and 38.4MHz. (7) Clock input can either be sinusoidal or square wave. If the peaks of the signal are below VSS_ANA or above VDD_ANA a DC blocking capacitor is required between the signal and XTAL_IN. BC216013A-ds-001Pb Advance Information Page 17 of 54 BlueCore2-Flash Product Data Sheet 0.4 Phase noise (at zero crossing) Electrical Characteristics Input/Output Terminal Characteristics (Continued) Audio CODEC, 15-bit Resolution Min Typ Max Unit - 3 350 3 5 20 20 -78 - mV rms mV rms dB dB V rms kHz k Input sample rate (3) Output sample rate (4) Distortion and noise at 1kHz (relative to full scale) Digital to Analog Converter - 1 8 - MSamples/s KSamples/s - -78 -75 dB Gain Resolution Min Gain (5) Max Gain (5) Loudspeaker Driver - 3 -14 +6 - dB dB dB 10 8 - 2.0 20 75 18.5 -75 - 40 OC 500 V Pk-Pk mA mA kHz dB pF Microphone Amplifier Input full scale at maximum gain Input full scale at minimum gain Gain resolution (1) Distortion at 1kHz Input referenced rms noise (2) Bandwidth Input impedance Analog to Digital Converter Notes: (1) 42dB range of gain control (under software control) (2) Noise in bandwidth from 100Hz to 4kHz gain setting >17dB (3) Single bit, 2 nd order - ADC clocked at 1MHz (4) This is the decimated and filtered output at 15-bit resolution (5) 21dB gain range (under software control) (6) Output for 0.1% THD, signal level of 2V Pk-Pk (7) Output for 1%THD, Signal level of 1V Pk-Pk BC216013A-ds-001Pb Advance Information Page 18 of 54 BlueCore2-Flash Product Data Sheet Output voltage full scale swing Output current drive (at full scale swing) (6) Output full scale current (at reduced swing) (7) Output -3dB bandwidth Distortion and noise (relative to full scale) Allowed Load: resistive Allowed Load: capacitive Radio Characteristics 5 Radio Characteristics BlueCore2-Flash meets the Bluetooth specification v1.1 when used in a suitable application circuit between -40C and +105C. Radio Characteristics, VDD = 1.8V Sensitivity at 0.1% BER Maximum RF transmit power (1) Frequency (GHz) Min Typ Max Bluetooth Specification 2.402 - -83 - 2.441 - -84 - 2.480 - -84 - dBm 2.402 - +3 - dBm 2.441 - +3 - 2.480 - +3 - 2.402 - 6.0 - Unit dBm -70 dBm -20 dBm dBm dBm 2.441 - 6.0 - 2.480 - 6.0 - dBm 2.402 - 12 - kHz 2.441 - 10 - 2.480 - 9 - kHz 2.402 - 879 - kHz 2.441 - 816 - 2.480 - 819 - kHz 2.402 - 9 - kHz 2.441 - 9 - 2.480 - 9 - 2.402 - 10 - 2.441 - 10 - 2.480 - 10 - kHz 2.402 - 8 - kHz/50 s 2.441 - 8 - 2.480 - 8 - RF power control range - 35 - 16 dB RF power range control resolution - 1.8 - - dB Initial carrier frequency tolerance 20dB bandwidth for modulated carrier Drift (single slot packet) Drift (five slot packet) Drift Rate BC216013A-ds-001Pb Advance Information -6 to +4 (2) 75 1000 25 dBm kHz kHz kHz kHz kHz 40 20 kHz kHz/50 s kHz/50 s Page 19 of 54 BlueCore2-Flashio Product Data Sheet Maximum received signal at 0.1% BER Temperature = +20C Radio Characteristics Radio Characteristics, VDD = 1.8V Temperature = +20C Frequency (GHz) Min Typ Max 2.402 - 165 - 2.441 - 165 - 2.480 - 165 - 2.402 - 150 - 2.441 - 150 - 2.480 - 150 - - 9 - 11 dB - -4 - 0 dB - -4 - 0 dB - -35 - -30 dB - -21 - -20 dB Adjacent channel selectivity C/I FF0 +3MHz - -45 - -40 dB Adjacent channel selectivity C/I FF0 -5MHz - -45 - -40 dB - -18 - -9 dB Adjacent channel transmit power F=F02MHz - -35 - -20 dBc Adjacent channel transmit power F=F03MHz - -55 - -40 dBc f1 avg "Maximum Modulation" f2 max "Minimum Modulation" (3) (5) Adjacent channel selectivity C/I F=F 0+1MHz (3) (5) Adjacent channel selectivity C/I F=F 0-1MHz (3) (5) Adjacent channel selectivity C/I F=F 0+2MHz (3) (5) Adjacent channel selectivity C/I F=F 0-2MHz (3) (5) (3) (5) (3) (5) Adjacent channel selectivity C/I F=FImage (4) (5) (4) (5) Unit kHz 140<f1 avg <175 kHz kHz kHz 115 kHz kHz Notes: (1) BlueCore2-Flash firmware maintains the transmit power to be within the Bluetooth specification v1.1 limits. (2) Class 2 RF transmit power range, Bluetooth specification v1.1. (3) Up to five exceptions are allowed in v1.1 of the Bluetooth specification. (4) Up to three exceptions are allowed in v1.1 of the Bluetooth specification. (5) Measured at F0 = 2441MHz. BC216013A-ds-001Pb Advance Information Page 20 of 54 BlueCore2-Flashio Product Data Sheet C/I co-channel Bluetooth Specification Radio Characteristics Typical Average Current Consumption VDD=1.8V Temperature = +20C Output Power = +3dBm Avg Unit SCO connection HV3 (30ms interval Sniff Mode) (Slave) 26.0 mA SCO connection HV3 (30ms interval Sniff Mode) (Master) 26.0 mA SCO connection HV3 (No Sniff Mode) (Slave) 32.0 mA SCO connection HV1 (Slave) 43.0 mA SCO connection HV1 (Master) 43.0 mA ACL data transfer 115.2kbps UART no traffic (Master) 7.0 mA ACL data transfer 115.2kbps UART no traffic (Slave) 24.0 mA ACL data transfer 720kbps UART (Master or Slave) 50.0 mA ACL data transfer 720kbps USB (Master or Slave) 50.0 mA ACL connection, Sniff Mode 40ms interval, 38.4kbps UART 4.0 mA ACL connection, Sniff Mode 1.28s interval, 38.4kbps UART 0.5 mA Parked Slave, 1.28s beacon interval, 38.4kbps UART 0.6 mA Standby Mode (Connected to host, no RF activity) 85.0 A Reset (RST high or RSTB low) 55.0 A BC216013A-ds-001Pb Advance Information Page 21 of 54 BlueCore2-Flashio Product Data Sheet Mode Device Diagrams 6 Device Diagrams BlueCore2-Flash Product Data Sheet Figure 6.1: BlueCore2-Flash Device Diagram for 6 x 6mm TFBGA Package BC216013A-ds-001Pb Advance Information Page 22 of 54 Device Diagrams BlueCore2-Flash Product Data Sheet Figure 6.2: BlueCore2-Flash Device Diagram for 10 x 10mm LFBGA Package BC216013A-ds-001Pb Advance Information Page 23 of 54 Description of Functional Blocks 7 7.1 Description of Functional Blocks RF Receiver The receiver features a near-zero Intermediate Frequency (IF) architecture that allows the channel filters to be integrated on to the die. Sufficient out-of-band blocking specification at the Low Noise Amplifier (LNA) input allows the radio to be used in close proximity to Global System for Mobile Communications (GSM) and Wideband Code Division Multiple Access (W-CDMA) cellular phone transmitters without being desensitised. The use of a digital Frequency Shift Keying (FSK) discriminator means that no discriminator tank is needed and its excellent performance in the presence of noise allows BlueCore2-Flash to exceed the Bluetooth requirements for co-channel and adjacent channel rejection. 7.1.1 Low Noise Amplifier The LNA can be configured to operate in single-ended or differential mode. Single-ended mode is used for Class 1 Bluetooth operation and differential mode is used for Class 2 operation. 7.1.2 Analogue to Digital Converter The Analogue to Digital Converter (ADC) is used to implement fast Automatic Gain Control (AGC). The ADC samples the Received Signal Strength Indicator (RSSI) voltage on a slot-by-slot basis. The front-end LNA gain is changed according to the measured RSSI value, keeping the first mixer input signal within a limited range. This improves the dynamic range of the receiver, improving performance in interference limited environments. 7.2 RF Transmitter 7.2.1 IQ Modulator The transmitter features a direct IQ modulator to minimise the frequency drift during a transmit timeslot which results in a controlled modulation index. A digital baseband transmit filter provides the required spectral shaping. 7.2.2 Power Amplifier The internal Power Amplifier (PA) has a maximum output power of +6dBm allowing BlueCore2-Flash to be used in Class 2 and Class 3 radios without an external RF PA. Support for transmit power control allows a simple implementation for Class 1 with an external RF PA. 7.2.3 Auxiliary DAC An 8-bit voltage Auxiliary DAC is provided for power control of an external PA for Class 1 operation. 7.3 RF Synthesiser The radio synthesiser is fully integrated onto the die with no requirement for an external Voltage Controlled Oscillator (VCO) screening can, varactor tuning diodes or LC resonators. 7.4 Clock Input and Generation The reference clock for the system is generated from a TCXO or crystal input between 8 and 40MHz. All internal reference clocks are generated using a phase locked loop, which is locked to the external reference frequency. BC216013A-ds-001Pb Advance Information Page 24 of 54 Description of Functional Blocks 7.5 Baseband and Logic 7.5.1 Memory Management Unit The Memory Management Unit (MMU) provides a number of dynamically allocated ring buffers that hold the data which is in transit between the host and the air or vice versa. The dynamic allocation of memory ensures efficient use of the available Random Access Memory (RAM) and is performed by a hardware MMU to minimise the overheads on the processor during data/voice transfers. 7.5.2 Burst Mode Controller During radio transmission the Burst Mode Controller (BMC) constructs a packet from header information previously loaded into memory-mapped registers by the software and payload data/voice taken from the appropriate ring buffer in the RAM. During radio reception, the BMC stores the packet header in memory-mapped registers and the payload data in the appropriate ring buffer in RAM. This architecture minimises the intervention required by the processor during transmission and reception. 7.5.3 Physical Layer Hardware Engine DSP Dedicated logic is used to perform the following: Forward error correction Header error control Cyclic redundancy check Encryption Data whitening Access code correlation Audio transcoding The following voice data translations and operations are performed by firmware: A-law/-law/linear voice data (from host) A-law/-law/Continuously Variable Slope Delta (CVSD) (over the air) Voice interpolation for lost packets Rate mismatches 7.5.4 RAM 32Kbytes of on-chip RAM is provided and is shared between the ring buffers used to hold voice/data for each active connection and the general purpose memory required by the Bluetooth stack. 7.5.5 Flash ROM 4Mbits of Flash ROM is provided for system firmware implementation in the BC215159A packages and 8Mbits is available in the BC219159A package. 7.5.6 USB This is a full speed Universal Serial Bus (USB) interface for communicating with other compatible digital devices. BlueCore2-Flash acts as a USB peripheral, responding to requests from a Master host controller such as a PC. 7.5.7 Synchronous Serial Interface This is a synchronous serial port interface (SPI) for interfacing with other digital devices. The SPI port can be used for system debugging. BC216013A-ds-001Pb Advance Information Page 25 of 54 Description of Functional Blocks 7.5.8 UART This is a standard Universal Asynchronous Receiver Transmitter (UART) interface for communicating with other serial devices. 7.5.9 Audio PCM Interface The Audio Pulse Code Modulation (PCM) Interface supports continuous transmission and reception of PCM encoded audio data over Bluetooth. 7.6 Microcontroller The microcontroller, interrupt controller and event timer run the Bluetooth software stack and control the radio and host interfaces. A 16-bit Reduced Instruction Set Computer (RISC) microcontroller is used for low power consumption and efficient use of memory. 7.6.1 Programmable I/O BlueCore2-Flash has a total of 15 (12 digital and 3 analogue) programmable I/O terminals. These are controlled by firmware running on the device. 7.6.2 Extended Programmable I/O Port BC219159A-BN has an extra 16 I/O lines available. These are controlled by firmware running on the device. Normal functions running on PIO ports [11:0] should not be transferred to the extended ports. An example application for these extra lines could be keyboard scanning. Extended PIO lines can only be used for certain functions, please contact CSR for details. 7.6.3 Audio CODEC BlueCore2-Flash has a 15-bit Audio CODEC that has a 8kHz sampling frequency. This has been designed for use in voice applications such as headsets and hands-free kits. The CODEC has integrated input/output amplifiers capable of driving a microphone and speaker with minimum external components. BC216013A-ds-001Pb Advance Information Page 26 of 54 CSR Bluetooth Software Stacks 8 CSR Bluetooth Software Stacks BlueCore2-Flash is supplied with Bluetooth stack firmware which runs on the internal RISC microcontroller. This is compliant with the Bluetooth specification v1.1. The BlueCore2-Flash software architecture allows Bluetooth processing overheads to be shared in different ways between the internal RISC microcontroller and the host processor. The upper layers of the Bluetooth stack (above HCI) can be run either on-chip or on the host processor. Running the upper stack on BlueCore2-Flash reduces (or eliminates, in the case of a virtual machine (VM) application) the need for host-side software and processing time. Running the upper layers on the host processor allows greater flexibility. Integrated ROM BlueCore HCI Stack HCI LM LC 32KB RAM Baseband Micro UART Host Host I/O USB Radio PCM I/O Figure 8.1: BlueCore HCI Stack In this implementation the internal processor runs the Bluetooth stack up to the Host Controller Interface (HCI). All upper layers must be provided by the Host processor. BC216013A-ds-001Pb Advance Information Page 27 of 54 BlueCore2-Flash Product Data Sheet 8.1 CSR Bluetooth Software Stacks 8.1.1 Key Features of the HCI Stack Standard Bluetooth Functionality The firmware has been written against the Bluetooth Core Specification v1.1. Bluetooth components: Baseband (including LC), LM and HCI Standard USB v1.1 and UART (H4) HCI Transport Layers All standard radio packet types Full Bluetooth data rate, up to 723.2kb/s asymmetric (1) Operation with up to 7 active slaves (1) Maximum number of simultaneous active ACL connections: 7 (2) Maximum number of simultaneous active SCO connections: 3 (2) Operation with up to 3 SCO links, routed to one or more slaves Role switch: can reverse Master/Slave relationship All standard SCO voice codings, plus "transparent SCO" Standard operating modes: page, inquiry, page-scan and inquiry-scan All standard pairing, authentication, link key and encryption operations Standard Bluetooth power saving mechanisms: Hold, Sniff and Park modes, including "Forced Hold" Dynamic control of peers' transmit power via LMP Master/Slave switch Broadcast Channel quality driven data rate All standard Bluetooth Test Modes The firmware's supported Bluetooth features are detailed in the standard Protocol Implementation Conformance Statement (PICS) documents, available from www.csr.com . Notes: (1) Maximum allowed by Bluetooth specification v1.1. (2) BlueCore2-Flash supports all combinations of active ACL and SCO channels for both Master and Slave operation, as specified by the Bluetooth specification v1.1. BC216013A-ds-001Pb Advance Information Page 28 of 54 BlueCore2-Flash Product Data Sheet CSR Bluetooth Software Stacks Extra Functionality The firmware extends the standard Bluetooth functionality with the following features: Supports BlueCore Serial Protocol (BCSP) - a proprietary, reliable alternative to the standard Bluetooth H4 UART Host Transport. Provides a set of approximately 50 manufacturer-specific HCI extension commands. This command set (called BCCMD - "BlueCore Command"), provides: Access to the chip's general-purpose PIO port Access to the chip's Bluetooth clock - this can help transfer connections to other Bluetooth devices The negotiated effective encryption key length on established Bluetooth links Access to the firmware's random number generator Controls to set the default and maximum transmit powers - these can help minimise interference between overlapping, fixed-location piconets Dynamic UART configuration Radio transmitter enable/disable - a simple command connects to a dedicated hardware switch that determines whether the radio can transmit The firmware can read the voltage on a pair of the chip's external pins. This is normally used to build a battery monitor, using either VM or host code. A block of BCCMD commands provides access to the chip's "persistent store" configuration database (PS). The database sets the device's Bluetooth address, Class of Device, radio (transmit class) configuration, SCO routing, LM, USB and DFU constants, etc. A UART "break" condition can be used in three ways: Presenting a UART break condition to the chip can force the chip to perform a hardware reboot Presenting a break condition at boot time can hold the chip in a low power state, preventing normal initialisation while the condition exists With BCSP, the firmware can be configured to send a break to the host before sending data - normally used to wake the host from a deep sleep state A block of "radio test" or BIST commands allows direct control of the chip's radio. This aids the development of modules' radio designs, and can be used to support Bluetooth qualification. Virtual Machine (VM). The firmware provides the VM environment in which to run application-specific code. Although the VM is mainly used with BlueLab and "RFCOMM builds" (alternative firmware builds providing L2CAP, SDP and RFCOMM), the VM can be used with this build to perform simple tasks such as flashing LED's via the chip's PIO port. Hardware low power modes: shallow sleep and deep sleep. The chip drops into modes that significantly reduce power consumption when the software goes idle. SCO channels are normally routed over HCI (over BCSP). However, a single SCO channel can be routed over the chip's single PCM port (at the same time as routing up to two other SCO channels over HCI). [Future versions of the BlueCore2 firmware will be able to exploit the hardware's ability to route up to three SCO channels through the single PCM port]. BC216013A-ds-001Pb Advance Information Page 29 of 54 BlueCore2-Flash Product Data Sheet CSR Bluetooth Software Stacks 8.2 BlueCore RFCOMM Stack Integrated ROM RFCOMM SDP L2CAP LM LC 32KB RAM Baseband Micro UART Host I/O USB Radio PCM I/O Figure 8.2: BlueCore RFCOMM Stack In this version of the firmware the upper layers of the Bluetooth stack up to RFCOMM are run on-chip. This reduces host-side software and hardware requirements at the expense of some of the power and flexibility of the HCI only stack. 8.2.1 Key Features of the BlueCore2-Flash RFCOMM Stack Interfaces to Host RFCOMM, an RS-232 serial cable emulation protocol SDP, a service database look-up protocol Connectivity Maximum number of active slaves: 3 Maximum number of simultaneous active ACL connections: 3 Maximum number of simultaneous active SCO connections: 3 Data Rate: up to 350Kb/s Security Full support for all Bluetooth security features up to and including strong (128-bit) encryption. Power Saving Full support for all Bluetooth power saving modes (Park, Sniff and Hold). Data Integrity CQDDR increases the effective data rate in noisy environments. RSSI used to minimise interference to other radio devices using the ISM band. BC216013A-ds-001Pb Advance Information Page 30 of 54 BlueCore2-Flash Product Data Sheet Host CSR Bluetooth Software Stacks 8.3 BlueCore Virtual Machine Stack Integrated ROM VM Application Software RFCOMM SDP L2CAP LM LC 32KB RAM Baseband Micro Host I/O Radio PCM I/O Figure 8.3: Virtual Machine This version of the stack firmware requires no host processor. All software layers, including application software, run on the internal RISC processor in a protected user software execution environment known as a Virtual Machine (VM). The user may write custom application code to run on the BlueCore VM using BlueLabTM software development kit (SDK) supplied with the BlueLab and Casira development kits, available separately from CSR. This code will then execute alongside the main BlueCore firmware. The user is able to make calls to the BlueCore firmware for various operations. The execution environment is structured so the user application does not adversely affect the main software routines, thus ensuring that the Bluetooth stack software component does not need re-qualification when the application is changed. Using the VM and the BlueLab SDK the user is able to develop applications such as a cordless headset or other profiles without the requirement of a host controller. BlueLab is supplied with example code including a full implementation of the headset profile. On successful completion of firmware development and testing using BlueCore2-Flash (BC215159A), CSR can commit the code to a mask set for mass production of the device. A Non Recurring Engineering (NRE) charge will be required. Note: Sample applications to control PIO lines can also be written with BlueLab SDK and the VM for the HCI stack. BC216013A-ds-001Pb Advance Information Page 31 of 54 BlueCore2-Flash Product Data Sheet UART Host CSR Bluetooth Software Stacks 8.4 Host-Side Software BlueCore2-Flash can be ordered with companion host-side software: BlueCore2-PC includes software for a full Windows 98/ME, Windows 2000 or Windows XP Bluetooth host-side stack together with IC hardware described in this document. BlueCore2-Mobile includes software for a full host-side stack designed for modern ARM based mobile handsets together with IC hardware described in this document. 8.5 Additional Software for Other Embedded Applications When the upper layers of the Bluetooth protocol stack are run as firmware on BlueCore2-Flash, a UART software driver is supplied that presents the L2CAP, RFCOMM and Service Discovery (SDP) APIs to higher Bluetooth stack layers running on the host. The code is provided as `C' source or object code. CSR Development Systems CSR's BlueLab and Casira development kits are available to allow the evaluation of the BlueCore2 hardware and software, and as toolkits for developing on-chip and host software. BC216013A-ds-001Pb Advance Information Page 32 of 54 BlueCore2-Flash Product Data Sheet 8.6 External Interfaces 9 9.1 External Interfaces Transmitter/Receiver Inputs and Outputs Terminals TX_A and TX_B form a balanced current output. They require a DC path to VDD and should be connected through a balun to the antenna. The output impedance is capacitive and remains constant, irrespective of whether the transmitter is enabled or disabled. For Class 2 operation these terminals also act as differential receive input terminals with an internal TX/RX switch. BlueCore2-Flash L2 1.5nH - + RF Switch TX_A R2 10 0.9pF L3 1.5nH TX_B + LNA RF Switch R3 10 - 0.9pF Figure 9.1: Circuit TX/RX_A and TX/RX_B For Class 1 operation the RF_IN ball is provided which is single-ended. A swing of up to 0.5V root mean squared (rms) can be tolerated at this terminal. An external antenna switch can be connected to RF_IN. BlueCore2-Flash L1 1.5nH RF_IN R1 6.8 C1 0.68pF Figure 9.2: Circuit RF_IN BC216013A-ds-001Pb Advance Information Page 33 of 54 BlueCore2-Flash Product Data Sheet PA External Interfaces 9.2 RF Plug and Go For BC219159A-BN, terminal RF_CONNECT forms an unbalanced output/input with a nominally 50 impedance which means it can be directly connected to an antenna requiring no impedance matching networks. BlueCoreTM2-Flash RF_CONNECT 50 9.3 Asynchronous Serial Data Port (UART) and USB Port UART_TX, UART_RX, UART_RTS and UART_CTS form a conventional asynchronous serial data port. The interface is designed to operate correctly when connected to other UART devices such as the 16550A. The signalling levels are 0V and VDD_USB and are inverted with respect to the signaling on an RS232 cable. The interface is programmable over a variety of bit rates; no, even or odd parity; one or two stop bits and hardware flow control on or off. The default condition on power-up is pre-assigned in the ROM memory. The maximum UART data rate is 1.5MBaud. Two-way hardware flow control is implemented by UART_RTS and UART_CTS. UART_RTS is an output and is active low. UART_CTS is an input and is active low. These signals operate according to normal industry convention. The port carries a number of logical channels: HCI data (both SCO and ACL), HCI commands and events, L2CAP API, RFCOMM API, SDP and device management. For the UART, these are combined into a robust tunnelling protocol, BlueCore Serial Protocol (BCSP), where each channel has its own software flow control and cannot block other data channels. In addition, the Bluetooth specification v1.1, HCI UART Transport Layer (part H4) format is supported. Full speed USB (12Mbit/s) is supported in accordance with the Bluetooth specification v1.1, HCI USB Transport Layer (H2). USB_DP and USB_DN are available on dedicated terminals. Both Open Host Controller Interface (OHCI) and Universal Host Controller Interfaces (UHCI) are supported. BC216013A-ds-001Pb Advance Information Page 34 of 54 BlueCore2-Flash Product Data Sheet Figure 9.3: Circuit for RF_CONNECT External Interfaces 9.4 UART Bypass RESET RXD CTS RTS TXD UART_TX PIO4 TX UART_RTS PIO5 RTS UART_CTS PIO6 CTS UART_RX PIO7 RX Host Processor Another Device UART Test Interface Figure 9.4: UART Bypass Architecture 9.4.1 UART Configuration while RESET is Active The UART interface for BlueCore2-Flash while the chip is being held in reset is tri-state. This will allow the user to daisy chain devices onto the physical UART bus. The constraint on this method is that any devices connected to this bus must tri-state when BlueCore2-Flash reset is de-asserted and the firmware begins to run. 9.4.2 UART Bypass Mode Alternatively, for devices that do not tri-state the UART bus, the UART bypass mode on BlueCore2-Flash can be used. The default state of BlueCore2-Flash after reset is de-asserted is for the host UART bus to be connected to the BlueCore2-Flash UART, thereby allowing communication to BlueCore2-Flash via the UART. In order to apply the UART bypass mode, a BCCMD command will be issued to BlueCore2-Flash upon this, it will switch the bypass to PIO[7:4] as shown in Figure 9.4. Once the bypass mode has been invoked, BlueCore2Flash will enter the deep sleep state indefinitely. In order to re-establish communication with BlueCore2-Flash, the chip must be reset so that the default configuration takes affect. It is important for the host to ensure a clean Bluetooth disconnection of any active links before the bypass mode is invoked. Therefore it is not possible to have active Bluetooth links while operating the bypass mode. BC216013A-ds-001Pb Advance Information Page 35 of 54 BlueCore2-Flash Product Data Sheet BlueCore2-Flash External Interfaces 9.5 PCM CODEC Interface PCM_OUT, PCM_IN, PCM_CLK and PCM_SYNC carry up to three bi-directional channels of voice data, each at 8ksamples/s. The format of the PCM samples can be 8-bit A-law, 8-bit -law, 13-bit linear or 16-bit linear. The PCM_CLK and PCM_SYNC terminals can be configured as inputs or outputs, depending on whether BlueCore2Flash is the Master or Slave of the PCM interface. BlueCore2-Flash interfaces directly to PCM audio devices including the following: Qualcomm MSM 3000 series and MSM 5000 series CDMA baseband devices OKI MSM7705 four channel A-law and -law CODEC Motorola MC145481 8-bit A-law and -law CODEC Motorola MC145483 13-bit linear CODEC STW 5093 and 5094 14-bit linear CODECs BlueCore2-Flash is also compatible with the Motorola SSITM interface. 9.6 Serial Peripheral Interface BlueCore2-Flash is a slave device that uses terminals SPI_MOSI, SPI_MISO, SPI_CLK and SPI_CSB. This interface is used for program emulation/debug and IC test. Note: The designer should be aware that no security protection is built into the hardware or firmware associated with this port, so the terminals should not be permanently connected in a PC application. 9.7 I/O Parallel Ports Fifteen lines of programmable bi-directional input/outputs (I/O) are provided. PIO[11:8] and PIO[3:0] are powered from VDD_PIO. PIO[7:4] are powered from VDD_PADS. AIO [2:0] are powered from VDD_MEM. Extended I/O lines D[15:0] are also powered from VDD_MEM. PIO lines can be configured through software to have either weak or strong pull-ups or pull-downs. All PIO lines are configured as inputs with weak pull-downs at reset. BlueCore2-Flash has three general purpose analogue interface pins, AIO[0], AIO[1] and AIO[2]. These are used to access internal circuitry and control signals. One pin is allocated to decoupling for the on-chip bandgap reference voltage, the other two may be configured to provide additional functionality. Auxiliary functions available via these pins include an 8-bit ADC and an 8-bit DAC. Typically the ADC is used for battery voltage measurement. Signals selectable at these pins include the bandgap reference voltage and a variety of clock signals ; 48, 24, 16, 8MHz and the XTAL clock frequency. When used with analogue signals the voltage range is constrained by the analogue supply voltage (1.8V). When configured to drive out digital level signals (clocks) generated from within the analogue part of the device, the output voltage level is determined by VDD_MEM (1.8V). BC216013A-ds-001Pb Advance Information Page 36 of 54 BlueCore2-Flash Product Data Sheet External Interfaces 9.7.1 PIO Defaults for BTv1.1 HCI level Bluetooth Stack Pull-high on boot to select USB transport rather than BCSP PIO[0] Control output for external LNA after boot up completion Pull-high on boot to select 16MHz reference clock frequency rather than 26MHz PIO[1] Control output for external PA (Class 1 operation) after boot up completion PIO[2] Clock request output PIO[3] Clock request "OR" gate input PIO[4] UART bypass (UART_TX) PIO[5] UART bypass (UART_RTS) UART bypass (UART_CTS) PIO[6] E2 SCL E2 SDA PIO[8] E2 write protect AIO[2] Vref output. Must be decoupled Notes: PIO[7:6] are used for two purposes, UART bypass and EEPROM support, therefore devices using an EEPROM cannot support UART bypass mode. CSR cannot guarantee that these terminal functions remain the same. Please refer to the software release note for the implementation of these PIO lines, as they are firmware build specific. 9.8 I2C Interface PIO[8:6] can be used to form a Master I2C interface. The interface is formed using software to drive these lines. Therefore it is suited only to relatively slow functions such as driving a dot matrix liquid crystal display (LCD), keyboard scanner or EEPROM. Note: PIO lines need to be pulled-up through 2.2k resistor For connection to EEPROM's, Refer to Document bcore-an-008Pa for information on the type of devices which are currently supported. 1V8 10n 2k2 2k2 2k2 U2 8 PIO[8] 7 PIO[6] 6 PIO[7] 5 VCC A0 WP A1 SCL A2 SDA GND 1 2 3 4 Serial EEPROM (AT24C16A) Figure 9.5: Example EEPROM Connection BC216013A-ds-001Pb Advance Information Page 37 of 54 BlueCore2-Flash Product Data Sheet UART bypass (UART_RX) PIO[7] External Interfaces 9.9 TCXO Enable OR Function An OR function exists for clock enable signals from a host controller and BlueCore2-Flash where either device can turn on the clock without having to wake up the other device. PIO[3] can be used as the Host clock enable input and PIO[2] can be used as the OR output with the TCXO enable signal from BlueCore2-Flash. VDD GSM System TCXO CLK IN CLK REQ OUT Enable CLK REQ IN PIO[3] CLK IN CLK REQ OUT PIO[2] Figure 9.6: Example TXCO Enable OR Function On reset and up to the time the PIO has been configured, PIO[2] will be tri-stated. Therefore, the developer must ensure that the circuitry connected to this pin is pulled via a 470k resistor to the appropriate power rail. This ensures that the TCXO is oscillating at start up. 9.10 Reset BlueCore2-Flash may be reset from several sources: RESET or RESETB pins, power on reset, a UART break character or via a software configured watchdog timer. The RESET pin is an active high reset and is internally filtered using the internal low frequency clock oscillator. A reset will be performed between 1.5 and 4.0ms following RESET being active. It is recommended that RESET is applied for a period greater than 5ms. The RESETB pin is the active low version of RESET and is `ORed' on chip with the active high RESET with either causing the reset function. The power on reset occurs when the VDD_CORE supply falls below typically 1.5V and is released when VDD_CORE rises above typically 1.6V. At reset the digital I/O pins are set to inputs for bi-directional pins and outputs are tristated. The PIOs have weak pull-downs. Following a reset, BlueCore2-Flash assumes the maximum XTAL_IN frequency which ensures that the internal clocks run at a safe (low) frequency until BlueCore-ROM is configured for the actual XTAL_IN frequency. If no clock is present at XTAL_IN, the oscillator in BlueCore2-Flash free runs, again at a safe frequency. BC216013A-ds-001Pb Advance Information Page 38 of 54 BlueCore2-Flash Product Data Sheet BlueCore System External Interfaces 9.11 Power Supply 9.11.1 Voltage Regulator An on-chip linear voltage regulator can be used to power the 1.8V dependant supplies. It is advised that a smoothing circuit using a 2.2F low ESR capacitor and 2.2 resistor be placed on the output VDD_ANA. The regulator is switched into a low power mode when the device is sent into deep sleep mode. When the on chip regulator is not required VDD_ANA is a 1.8V input and VREG_IN must be either open circuit or tied to VDD_ANA. On the BC219159A-BN VDD_DIG is a filtered output for digital circuitry. VDD_DIG VREG_IN 1.8V VDD_ANA 1.8V Regulator 2.2R Figure 9.7: VDD_DIG Output Circuit 9.11.2 Sequencing It is recommended that VDD_CORE, VDD_RADIO, VDD_VCO and VDD_MEM are powered at the same time. The order of powering supplies for VDD_CORE, VDD_PIO, VDD_PADS and VDD_USB is not important. However if VDD_CORE is not present, all inputs have a weak pull-down irrespective of the reset state. 9.11.3 Sensitivity to Disturbances It is recommended that if you are supplying BlueCore2-Flash from an external voltage source that VDD_VCO, VDD_ANA and VDD_RADIO should have less than 10mV rms noise levels between 0 to 10MHz. Single tone frequencies are also to be avoided. A simple RC filter is recommended for VDD_CORE as this reduces transients put back onto the power supply rails. The transient response of the regulator is also important as at the start of a packet, power consumption will jump to the levels defined in average current consumption section. It is essential that the power rail recovers quickly, so the regulator should have a response time of 20s or less. BC216013A-ds-001Pb Advance Information Page 39 of 54 BlueCore2-Flash Product Data Sheet 22 External Interfaces 9.12 Audio CODEC The BlueCore2-Flash audio CODEC is compatible with the direct speaker drive and microphone input using a minimum number of external components. It is primarily intended for voice applications and it is fully operational from a single 1.8 Volt power supply. A fully differential architecture has been implemented for optimal power supply rejection and low noise performance. The digital format is 15-bit/sample linear PCM with a data rate of 8kHz. The CODEC has an input stage containing a microphone amplifier, variable gain amplifier and a - ADC. Its output stage contains a DAC, low-pass filter and output amplifier. The CODEC functional diagram is shown below. Input Amplifier MIC_N Digital Circuity Reconstruction Filter DAC SPKR_P Output Amplifier SPKR_N Figure 9.8: BlueCore2-Flash CODEC Diagram 9.12.1 Input Stage A low noise variable gain amplifier amplifies the signal difference between inputs MIC_N and MIC_P. The input may be from either a microphone or line. The amplified signal is then digitised by a second order - ADC. The high frequency single bit output from the ADC is converted to 15-bit 8kHz linear PCM data. The gain is programmable via a PSKEY and has a 42dB range with 3dB resolution. At maximum gain the full scale input level is 3mV rms. A bias network is required for operation with a microphone whereas the line input may be simply a.c. coupled. The following sections explain each of these modes. Single ended signals are supported by BlueCore2-Flash: a single ended signal may be driven into either MIC_N or MIC_P with the undriven input coupled to ground by a capacitor. At the maximum gain the signal to noise ratio is better than 60dB and distortion is better than -75dB relative to a full-scale sine wave. At lower gain settings (such as used for line input) the signal to noise ratio improves to better than -75dB. BC216013A-ds-001Pb Advance Information Page 40 of 54 BlueCore2-Flash Product Data Sheet - ADC MIC_P External Interfaces 9.12.2 Microphone Input The BlueCore2-Flash audio CODEC has been designed for use with microphones that have sensitivities between -60 and -40dBV. The sensitivity of -60dBV is equivalent to a microphone output of 1 A when presented with an input level of 94dB SPL and loaded with 1k. The microphone should be biased as shown in Figure 9.9. V bias C1 MIC_P RL Input Amplifier C2 MIC_N Figure 9.9: BlueCore2-Flash Microphone Biasing The input impedance at MIC_N and MIC_P is typically 20k. C1 and C2 should be 47nF. R L sets the microphone load impedance and is normally between 1 and 2k. V bias should be chosen to suit the microphone and have sufficient low noise. It may be obtained by filtering the output of a PIO line. 9.12.3 Line Input If the input gain is set to less than 21dB BlueCore2-Flash automatically selects line input mode. In this mode the input impedance at MIC_N and MIC_P is increased to 130k typical. At the minimum gain setting the maximum input signal level is 380 mV rms. Figures 9.11 and 9.12 show two circuits for line input operation and show connections for either differential or single ended inputs. C1 MIC_P C2 MIC_N Figure 9.11: Differential Microphone Input C1 MIC_P C2 MIC_N Figure 9.12: Single-ended Microphone Input Note: C1 and C 2 should be 15nF. BC216013A-ds-001Pb Advance Information Page 41 of 54 BlueCore2-Flash Product Data Sheet MIC External Interfaces 9.12.4 Output stage The digital data is converted to an analogue value by a DAC, then it is filtered prior to amplification by the output amplifier and it is available as a differential signal between SPKR_P and SPKR_N. The output amplifier is capable of driving a speaker directly if its impedance is greater than or equal to 8. The amplifier is stable with capacitive loads up to 500pF. The gain is programmable with a range of 21dB and a resolution of 3dB. Maximum output level is typically 700 mV rms for high impedance loads, or 20mA rms for low impedance loads. The signal to noise is better than 70dB and the distortion is less than -75dB. SPKR_P BlueCore2-Flash Product Data Sheet SPKR_N Figure 9.13: Speaker Output BC216013A-ds-001Pb Advance Information Page 42 of 54 Application Schematic 10 Application Schematic 10.1 6 x 6 TFBGA 84-Ball Package BlueCore2-Flash Product Data Sheet Figure 10.1: Example of a Headset Design for 6 x 6 TFBGA Package BC216013A-ds-001Pb Advance Information Page 43 of 54 Application Schematic 10.2 10 x 10 LFBGA 96-Ball Package BC216013A-ds-001Pb Advance Information Page 44 of 54 BlueCore2-Flash Product Data Sheet Figure 10.2: Application Circuit for Radio Characteristics Specification 10 x 10 LFBGA Package Package Dimensions 11 Package Dimensions 11.1 6 x 6 TFBGA 84-Ball Package Top View Bottom View BlueCore2-Flash Product Data Book BC216013A-ds-001Pb Advance Information Page 45 of 54 Package Dimensions BlueCore2-Flash Product Data Book Figure 11.1: BlueCore2-Flash TFBGA Package Dimensions BC216013A-ds-001Pb Advance Information Page 46 of 54 Ordering Information 11.2 10 x 10 LFBGA 96-Ball Package Top View Bottom View BlueCore2-Flash Product Data Sheet Figure 11.2: BlueCore2-Flash LFBGA Package Dimensions BC216013A-ds-001Pb Advance Information Page 47 of 54 Ordering Information 12 Ordering Information 12.1 BlueCore2-Flash Package Interface Version Size Shipment Method 84-Ball TFBGA 6x6x1.2mm Tape and reel BC215159A-HK-E4 6x6x1.2mm Tape and reel BC215159A-TK-E4 10x10x1.4mm Tape and reel BC219159A-BN-E4 84-Ball TFBGA (Pb free) 96-Ball LFBGA Minimum Order Quantity 2kpcs Taped and Reeled BC216013A-ds-001Pb Advance Information Page 48 of 54 BlueCore2-Flash Product Data Sheet UART and USB Order Number Type Contact Information 13 Contact Information CSR U.K. Cambridge Science Park Milton Road Cambridge, CB4 0WH United Kingdom Tel: +44 (0) 1223 692 000 Fax: +44 (0) 1223 692 001 e-mail: sales@csr.com CSR Denmark Novi Science Park Niels Jernes Vej 10 9220 Aalborg East Denmark Tel: +45 72 200 380 Fax: +45 96 354 599 e-mail: sales@csr.com CSR Japan CSR KK Miyasaka LK Bld. 3F 43-23, 3 Chome Shimorenjaku Mitaka-shi, Tokyo Japan 181-0013 Tel: +81 0422 40 4760 Fax: +81 0422 40 4765 e-mail: sales@csr.com CSR Singapore Blk 5, Ang Mo Kio Industrial Park 2A, AMK Tech II, #07-08 Singapore 567760 Tel: +65 6484 2212 Fax: +65 6484 2219 e-mail: sales@csr.com CSR Korea Room 1111 Keumgang Venturetel, #1108, Beesan-dong, DongAn-ku, Anyang-city, Kyunggi-do 431-050, Korea Tel: +82 31 389 0541 Fax: +82 31 389 0545 e-mail: sales@csr.com To contact a CSR representative, go to www.csr.com/contacts.htm BC216013A-ds-001Pb Advance Information Page 49 of 54 BlueCore2-Flash Product Data Sheet CSR U.S. 1651 N. Collins Blvd. Suite 210 Richardson TX75080 Tel: +1 (972) 238 2300 Fax: +1 (972) 231 1440 e-mail: sales@csr.com Document References 14 Document References Document References Version Specification of the Bluetooth system v1.1, 22 February 2001 Universal Serial Bus Specification v1.1, 23 September 1998 I2C EEPROMS for use with BlueCore bcore-an-008Pa October 2002 BlueCore2-Flash Product Data Sheet BC216013A-ds-001Pb Advance Information Page 50 of 54 Acronyms and Definitions 15 Acronyms and Definitions Definition: BlueCore Bluetooth Group term for CSR's range of Bluetooth chips. A set of technologies providing audio and data transfer over short-range radio connections Asynchronous Connection-Less. A Bluetooth data packet. Alternating Current Analogue to Digital Converter Automatic Gain Control Audio encoding standard Application Programming Interface Application Specific Integrated Circuit BlueCoreTM Serial Protocol Bit Error Rate. Used to measure the quality of a link Ball Grid Array Built-In Self-Test Bill of Materials. Component part list and costing for a product Burst Mode Controller Carrier Over Interferer Complementary Metal Oxide Semiconductor Coder Decoder Central Processing Unit Channel Quality Driven Data Rate Chip Select (Active Low) Cambridge Silicon Radio Clear to Send Continuous Variable Slope Delta Modulation Digital to Analogue Converter Decibels relative to 1mW Direct Current Device Firmware Upgrade Frequency Shift Keying General Circuit Interface. Standard synchronous 2B+D ISDN timing interface Global System for Mobile communications Host Controller Interface Header Value In-Phase and Quadrature Modulation Inquiry Access Code Intermediate Frequency Integrated Services Digital Network Industrial, Scientific and Medical kilosamples per second Logical Link Control and Adaptation Protocol (protocol layer) Link Controller Liquid Crystal Display Land Grid Array Low Noise Amplifier Least-Significant Bit Audio Encoding Standard Memory Management Unit Master In Serial Out Open Host Controller Interface ACL AC ADC AGC A-law API ASIC BCSP BER BGA BIST BOM BMC C/I CMOS CODEC CPU CQDDR CSB CSR CTS CVSD DAC dBm DC DFU FSK GCI GSM HCI HV IQ Modulation IAC IF ISDN ISM ksamples/s L2CAP LC LCD LGA LNA LSB -law MMU MISO OHCI BC216013A-ds-001Pb Advance Information Page 51 of 54 BlueCore2-Flash Product Data Sheet Term: Acronyms and Definitions BC216013A-ds-001Pb Power Amplifier Printed Circuit Board Pulse Code Modulation. Refers to digital voice data Personal Digital Assistant Parallel Input Output Phase Lock Loop parts per million Persistent Store Key Random Access Memory Read enable (Active Low) Reference. Represents dimension for reference use only. Radio Frequency Protocol layer providing serial port emulation over L2CAP Reduced Instruction Set Computer root mean squared Read Only Memory Receive Signal Strength Indication Ready To Send Receive or Receiver Synchronous Connection-Oriented. Voice oriented Bluetooth packet Secure Digital Software Development Kit Service Discovery Protocol Special Interest Group Short Message Service System On Chip Serial Peripheral Interface Serial Port Profile Static Random Access Memory Supplementary Services Signal Strength Indication Secure Sockets Layer System Under Test Software Shared Wireless Access Protocol Terminal Adaptor Terminal Adaptor Equipment To Be Defined Transmit or Transmitter Universal Asynchronous Receiver Transmitter Universal Serial Bus or Upper Side Band (depending on context) Voltage Controlled Oscillator Virtual Machine Wideband Code Division Multiple Access Write Enable (Active Low) world wide web Advance Information Page 52 of 54 BlueCore2-Flash Product Data Sheet PA PCB PCM PDA PIO PLL ppm PS Key RAM REB REF RF RFCOMM RISC rms ROM RSSI RTS RX SCO SD SDK SDP SIG SMS SOC SPI SPP SRAM SS SSI SSL SUT SW SWAP TA TAE TBD TX UART USB VCO VM W-CDMA WEB www Status of Information Status of Information The progression of CSR Product Data Sheets follows the following format: Advance Information Information for designers on the target specification for a CSR product in development. All detailed specifications including pinouts and electrical specifications may be changed by CSR without notice. Pre-Production Information Final pinout and mechanical dimensions. All electrical specifications may be changed by CSR without notice. Final Data Sheet including the guaranteed minimum and maximum limits for the electrical specifications. Production Data Sheets supersede all previous document versions. The status of this Data Sheet is Advance Information. Life Support Policy and Use in Safety-Critical Applications CSR's products are not authorised for use in life-support or safety-critical applications. Trademarks, Patents and Licenses BlueCoreT M, BlueLabT M, CasiraT M, CompactSiraT M and MicroSiraT M are trademarks of CSR Ltd. BluetoothT M and the Bluetooth logos are trademarks owned by Bluetooth SIG Inc, USA and licensed to CSR. Windows T M, Windows 98T M, Windows 2000 T M, Windows XP T M and Windows NTT M are registered trademarks of the Microsoft Corporation. I2CT M is a trademark of Philips Corporation. All other product, service and company names are trademarks, registered trademarks or service marks of their respective owners. The publication of this information does not imply that any license is granted under any patent or other rights owned by CSR Ltd. CSR Ltd reserves the right to make technical changes to its products as part of its development programme. While every care has been taken to ensure the accuracy of the contents of this document, CSR cannot accept responsibility for any errors. BC216013A-ds-001Pb Advance Information Page 53 of 54 BlueCore2-Flash Product Data Sheet Production Information Record of Changes 16 Record of Changes Date: Revision: Reason for Change: JANUARY 2002 a Latest information for BlueCore2-Flash JANUARY 2003 b Latest release of new package information TM BC216013A-ds-001Pb January 2003 BC216013A-ds-001Pb Advance Information Page 54 of 54 BlueCore BlueCore2-Audio 2-Flash Product Product Data DataSheet Sheet BlueCore 2-Flash Product Data Sheet