SF8J41(N,Q) - TOSHIBA - Datasheet.Directory

1/25

www.rohm.com 2012.08 - Rev.B

GPIO ICs

Keyencoder IC

BU1852GUW, BU1852GXW

●Description

Keyencoder IC BU1852 can monitor up to 8x12 matrix (96 keys), which means to be adaptable to Qwerty keyboard. We

adopt the architecture that the information of the onl y key wh ich status is changed, like push or releas e, is encoded into the

8 bits data. This can greatly reduce the CPU load which tends to become heavier as the number of keys increase.

(Previously, all key's status is stored in the registers.) When the number of keys is small, the extra ports can be used as

GPIO. Furthermore, auto sleep function contributes to low power consumption, when no keys are pressed. It is also

equipped with the various functions such as ghost key rejection, N-key Rollover, Built-in power on reset and oscillator.

●Features

1) Monitor up to 96 matrix keys.

2) Under 3µA Stand-by Current

3) Built-in Power on Reset.

4) Ghost key rejection.

5) Keyscan / GPIO selectable

6) 3 volt tolerant Input

●Absolute maximum ratings (Ta=25℃)

Parameter Symbol Ratings Unit Conditions

Supply Voltage VDD -0.3 ~ +2.5 V VDD≦VDDIO

VDDIO -0.3 ~ +4.5 V

Input voltage

VI1 -0.3 ~ VDD +0.3※1 V XRST, XI, TW, PORENB

VI2 -0.3 ~ VDDIO +0.3※1 V ADR

VIT -0.3 ~ +4.5 V XINT, SCL, SDA,

COL[11:0], ROW[7:0]

Storage temperature range Tstg -55 ~ +125 ℃

Package power PD 272※2 mW

※ This IC is not designed to be X-ray proof.

※1 It is prohibited to exceed the absolute maximum ratings even including +0.3 V.

※2 Package dissipation will be reduced each 2.72mW/℃ when the ambient temperature increases beyond 25℃.

●Operating conditions

Parameter Symbol Ratings Unit Conditions

Min. Typ. Max.

Supply voltage range

(VDD) VDD 1.65 1.80 1.95 V

Supply voltage range

(VDDIO) VDDIO 1.65 1.80 3.60 V

Input voltage range

VI1 -0.2 - VDD+0.2 V XRST, XI, TW, PORENB

VI2 -0.2 - VDDIO+0.2 V ADR

VIT -0.2 - 3.60 V

XINT, SCL, SDA,

COL[11:0], ROW[7:0]

Operating temperature range Topr -30 25 +85 ℃

No.11098EBT04

Technical Note

2/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

●Electrical characteristics

1. DC characteristics (VDD=1.8V, VDDIO=1.8V, Ta=25℃)

Parameter Symbol Limits Unit Conditions

Min. Typ. Max.

Input H Voltage1 VIH1 0.8xVDD - 3.6 V

※1

Input H Voltage2 VIH2 0.8xVDD - VDD+0.2 V

※2

Input H Voltage3 VIH3 0.8xVDDIO - 3.6 V COL[11:0]

Input H Voltage4 VIH4 0.8xVDDIO - VDDIO+0.2 V ADR

Input L Voltage1 VIL1 -0.2 - 0.2xVDD V

※3

Input L Voltage2 VIL2 -0.2 - 0.2xVDDIO V ADR, COL[11:0]

Input H Current1 IIH1 -1.0 - 1.0 µA

VIN=3.60V※4

Pull-down/up OFF

Input H Current2 IIH2 -1.0 - 1.0 µA VIN=1.80V※5

Input L Current IIL -1.0 - 1.0 µA

VIN=0V

Pull-down/up OFF

Output H Voltage1 VOH1 0.75xVDD - - V IOH=-2mA, ROW[7:0]

Output H Voltage2 VOH2 0.75xVDDIO - - V IOH=-2mA, COL[11:0]

Output L Voltage1 VOL1 - - 0.25xVDD V IOL=2mA, ※6

Output L Voltage2 VOL2 - - 0.25xVDDIO V IOL=2mA, COL[11:0]

※1 XINT,SCL,SDA,ROW[7:0]

※2 XRST,XI,TW,PORENB

※3 XINT,SCL,SDA,ROW[7:0],XRST,XI,TW,PORENB

※4 XINT,SCL,SDA,ROW[7:0],COL[11:0]

※5 XRST,XI,TW,PORENB,ADR

※6 XINT,SDA,ROW[7:0]

2. Circuit Current (VDD=1.8V, VDDIO=1.8V, Ta=25℃)

Parameter Symbol Limits Unit Conditions

Min. Typ. Max.

Power Down Current

(VDD) IPD - - 1.0 µA

XRST=VSS

Power Down Current

(VDDIO) IPDIO - - 1.0 µA

Standby Current1

(VDD) ISTBY1 - - 3.0 µA

XRST=VDD,

PORENB=VSS,

SCL=VDD, SDA=VDD

Standby Current1

(VDDIO) ISTBYIO1 - - 1.0 µA

Standby Current2

(VDD) ISTBY2 - - 1.0 µA

XRST=VDD,

PORENB=VDD,

SCL=VDD, SDA=VDD

Standby Current2

(VDDIO) ISTBYIO2 - - 1.0 µA

Operating Current

(VDD) IOP - 50 110 µA

Internal oscillator is used.

one key is pressed.

Technical Note

3/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

3. I2C AC Characteristics

Fig.1 I2C AC timing

VDD=1.8V, VDDIO=1.8V, Topr=25℃, TW=VSS

Parameter Symbol Limits Unit Conditions

Min. Typ. Max.

SCL Clock Freque ncy fSCL - - 400 kHz

Bus free time tBUF 1.3 - - µs

(Repeated) START Condition

Setup T ime tSU;STA 0.6 - - µs

(Repeated) START Condition

Hold T ime tHD;STA 0.6 - - µs

SCL Low Time tLOW 1.3 - - µs

SCL High Time tHIGH 0.6 - - µs

Data Setup Time tSU;DAT 100 - - ns

Data Hold Time tHD;DAT 0 - - ns

STOP Condition Setup Time tSU;STO 0.6 - - µs

SCL

SDA

tSU;STA

(Repeated)

START BIT7 Ack STOP

Condition

BIT6

tLOW tHIGH

tHD;STA tSU;DAT tHD;DAT tSU;STO

tBUF

1/fSCLK

Technical Note

4/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

4. GPIO AC Characteristics

Fig.2 GPIO AC timing

VDD=1.8V, VDDIO=1.8V, Topr=25℃, TW=VSS

Parameter Symbol Limits Unit Conditions

Min. Typ. Max.

Output Data Valid Time tDV - - 0.8 µs

Interrupt Valid Time tIV - - 5 µs

Interrupt Reset Time tIR - - 5 µs

SCL

GPIO[7:0](Output) tDV

State BIT 0BIT 1

XINT

tIV

GPIO[7:0](Input)

tIR

Technical Note

5/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

5. Startup sequence

Fig.3 Start Sequence timing

VDD=1.8V, VDDIO=1.8V, Topr=25℃, TW=VSS

Parameter Symbol Limits Unit Conditions

Min. Typ. Max.

VDD Stable Time tVDD - - 5 ms

VDD and VDDIO are ON

at the same time.

Reset Wait Time tRWAIT 0 - - µs XRST controlling※1

Reset Valid Time tRV 10 - - µs

I2C Wait Time tI2CWAIT 10 - - µs

※1 Even if XRST port is not used, it operates because Power On Reset is built in.

In this case, connect XRST port with VDD on the set PCB.

Note) At VDD=0V, when SCL port is changed fr om 0V to 0.5V o r more, SCL port pulls the current. It is same in SDA, XINT,

and ROW[7:0] ports of 3V tolerant I/O. (VDDIO=0V in case of COL[11:0] ports)

Fig.4 Port operating at VDD=0V

VDD

VDDIO

XRST

SCL

SDA

tVDD

tRWAIT

tI2CWAIT

tRV

tI2CWAIT

tVDD

tRWAIT

tVDD

VDD

Port

(~2kΩ Pull-up) 0V

Port

Pull Current

2～

3ms

0.1～

1mA

Technical Note

6/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

U1852

Lot No.

●Package Specification

Fig.5 Package Specification (VBGA035W040)

Technical Note

7/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

Fig.6 Package Specification (UBGA035W030)

Lot No.

Technical Note

8/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

●Pin Assignment

Fig.7 Pin Diagram (Top View)

●Block diagram

Fig.8 Functional Block Diagram

TESTM0 XI ROW0 ROW2 ROW4

XRS

ROW1 ROW3 ROW6

XINT VDD PORENB VSS ROW7

VDD VDDIO VSS COL2

SCL COL10 COL8 COL6 COL4

1 2 3 4 5

ROW5

COL0

COL1

COL3

TESTM1 COL11 COL9 COL7 COL5

Key Scan

GPIO

Control

I2C / 3wire

Control

XINT

SCL

SDA

XRST

COL[11:0]/

GPIO[19:8]

VDD

Power

Reset

VSS

Reset

Gen

ROW[7:0]/

GPIO[7:0]

Oscillator

Key

Encoder

FIFO

TESTM[1:0]

PORENB

ADR

Interrupt

Filter Interrupt

Logic

Input

Filter

VDDIO

Technical Note

9/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

●Pin Functional Descriptions

PIN name I/O Function Init Cell Type

VDD - Power supply (Core, I/O except for COL[11:0], ADR) - -

VDDIO - Power supply (I/O for COL[11:0], ADR) - -

VSS - GND - -

XRST I Reset(Low Active) I A

XI I External clock i nput (32kHz) I I

TW I

Select protocol

H: original 3 wire

L: I2C I B

ADR I

(TW=L) Select Device Address for I2C

(TW=H) H : Key scan rate 1/2

L : Key scan rate original I B

XINT O Key/GPIO Interrupt H(TW=H)

Hi-z(TW=L) E

SCL I Clock for serial interface I D

SDA I/O Serial data inout for serial interface I F

ROW0 I/O ROW0 / GPIO0

[100kΩ Pull-up] G

ROW1 I/O ROW1 / GPIO1

ROW2 I/O ROW2 / GPIO2

ROW3 I/O ROW3 / GPIO3

ROW4 I/O ROW4 / GPIO4

ROW5 I/O ROW5 / GPIO5

ROW6 I/O ROW6 / GPIO6

ROW7 I/O ROW7 / GPIO7

COL0 I/O COL0 / GPIO8

L(TW=H)

[150kΩ Pull-down]

(TW=L)

COL1 I/O COL1 / GPIO9

COL2 I/O COL2 / GPIO10

COL3 I/O COL3 / GPIO11

COL4 I/O COL4 / GPIO12

COL5 I/O COL5 / GPIO13

COL6 I/O COL6 / GPIO14

COL7 I/O COL7 / GPIO15

COL8 I/O COL8 / GPIO16

COL9 I/O COL9 / GPIO17

COL10 I/O COL10 / GPIO18

COL11 I/O COL11 / GPIO19

PORENB I Power on reset enable (Low Active) I B

TESTM0 I

Test Pins※1 I C

TESTM1 I

※1 Note: All these pins must be tied down to GND in normal operation.

Technical Note

10/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

●I/O equivalence circuit

A B C D

E F G H

Fig.9 Equivalent I/O circuit diagram

Technical Note

11/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

●Functional Description

1. Power mode

The device enters the state of Power Down when XRST =”0”. When XRST becomes High after powered, the device

enters the standby state.

Power On Reset

A Power On Reset logic is implemented in this device. Therefore, it will operate correctly even if the XRST port is not

used. In this case, the XRST port must be connected to “1” (VDD), an d the PORENB port must be connected to “0”

(VSS). If you don’t want to use Power On reset, you must connect PORENB port to “1” (VDD).

Power Down State

The device ent ers Power Down state by XRST=”0”. An inte rnal circuit is initializ ed, and key enc oding and 3 wire/I2C

interface are invalid. Power On Reset becomes inactive during this state.

Stand-by State

The device enters the stand-by state by setting XRST to "1". In this state, the device is waiting for keys pressed or

I2C communication (TW=”0”). When a key is pressed or I2C start condition, the state will change to operation. Po wer

On Reset is active in this state if PORENB = “0”.

Operating State

The device enters the operating state by pressing keys. The device will scan the key matrix and encode the key code,

and then the 3wire/I2C interface tries to start communication by driving XINT “0”. See next section for the details.

After communicating with host device, when no keys are pr e ssed, the device returns to th e stand-by state. Power On

Reset is active in this state if PORENB=”0”.

2. Protocol of serial interface

I2C

When set to TW=”0”, SCL and SDA are used for I2C communication. Any register shown in section 4 can be

accessed through I2C. Initially, all GPIO ports are set to GPI and pull-up/down ON. When the application requires

GPO or key scan, proper register setting should be done through I2C.

3 wire (Original)

When set to TW=”1”, SCL and SDA are used for original 3wire communication, which is not the standard interface.

Any register shown in section 4 cannot be accessed through 3wire. With TW=”1”, only keyscan and key encoding

are supposed to be performed. GPIO function is inactive. When the application needs kind of complex system (for

instance, GPO+keyscan or GPIO+keyscan…), I2C mode is recommended.

See appendix for the details.

Technical Note

12/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

3. I2C Bus Interface (TW=”0”)

Each function of GPIO is controlled by internal registers. The I2C Slave interface is used to write or read those internal

registers. The device supports 400kHz Fast-mode data transfer rate.

Slave address

Two device addresses (Slave address) can be selected by ADR port.

A7 A6 A5 A4 A3 A2 A1 R/W

ADR=0 0 0 0 1 0 1 0

1/0

ADR=1 0 0 0 1 1 0 1

Data transfer

One bit of data is transferred during SCL = “1”. During the bit transfer SCL = “1” cycle, the signal SDA should keep

the value. If SDA changes during SCL = “1”, START condition or STOP condition occur and it is interpreted as a

control signal.

Fig.10 Data transfer

START・STOP・Repeated START conditions

When SDA and SCL are “1”, the data isn’t transferred on the I 2C bus. If SCL remains “1” and SDA transfers from “1”

to “0”, it means “Start condition” is occurred and access is started. If SCL remains “1” and SDA transfers from “0” to

“1”, it means “Stop condition” is occurred and access is stopped. It becomes repeated START condition (Sr) the

START condition enters again although the STOP condition is not done.

Fig.11 START・STOP・Repeated START conditions

SDA

SCL

Data is valid

when SDA is stable

SDA is

variable

SDA

SCL S S

START Condition Repeated START Condition P

STOP Condition

Technical Note

13/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

Acknowledge

After start condition is occurred, 8 bits data will b e transferred. SDA is latched by the rising edge of SCL. After 8 bits

data transfer is finished by the “Master”, “Master” opens SDA to “1”. And then, “Slave” de-asserts SDA to “0” as

“Acknowledge”.

Fig.12 Acknowledge

Writing protocol

register which defined by the 2 nd byte. However, when the register address increased to the final a ddress (18h), it will

be reset to (00h) after the byte transfer.

Fig.13 Writing protocol

dataRegister addressSlave address

Transmit from maste

Transmit from slave

=acknowledge

=not acknowledge

S=S tart condi tion

P=Stop condition

W=0(write)

data

increment Register address

incremen

D7D6D5D4D3D2D1D0 D7D6D5D4D3D2D1D0

SCL 1 2 8 9

SDA output

from “Master”

SDA output

from “Slave”Acknowledge

Not acknowledge

START condition Clock pulse

For Acknowledgs

Technical Note

14/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

Reading protocol

After Writing the slave address and Read command bit, the next byte is supposed to be read data. The reading

the incremented address reaches the last address, the following read address will be reset to (00h).

1S A P

Transmit from master

Transmit from slave

A=acknowledge

A=not acknowledge

S=Start condition

P=Stop condition

R/W=1(Read)

data

Salve address

XXX X X X X D7D6D5D4D3D2D1D0 D7D6D5D4D3D2D1D0

increment Register address

increment

Fig.14 Readout protocol

Complex reading protocol

There is the complex reading protocol to read the specific address of regist ers that master wants to read.

After the specifying the internal register addr ess as writing command, master occurs rep eated START condition with

read command. Then, the reading access of the specified registers is supposed to start. The register address

increment is the same as normal reading pr otocol. If the address is i ncreased to the last, it will be reset to (00h).

S A A A

Transmit from master

Transmit from slave

A=acknowledge

A=not aclno wledge

S=Start condition

P=Stop condit io n

Sr=Repeated Start cond ition

R/W=0(write)

Sr 1

R/W=1(read)

Slave addres s

XXXX XX 0

X X X A4A3A2A1A0

Slave addres s

XXXX XXX

data data

increment

D7D6D5D4D3D2D1D0

increment

D7D6D5D4D3D2D1D0 A

Fig.15 Complex reading protocol

Illegal access of I2C

When illegal access hap pens, the data is annulled.

The illegal accesses are as follows.

・The START condition or the STOP condition is continuously generated.

・When the Slave address and the R/W bit are written, repeated START condition or the STOP condition are

generated.

・Repeated START condition or the STOP condition is generated while writing data.

Technical Note

15/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

4. Register configuration

Table1 shows the register map and Table2 indicates each function in the correspon ding bit . Onl y when TW is “0”, these

registers can be accessed with I2C. By making XRST “0”, the setting regi ster value will be initialized s hown in follo wing

Table1 Register map

Address Init Type D7 D6 D5 D4 D3 D2 D1 D0

00h 00h R/W RESET reserved reserved reserved reserved reserved reserved reserved

01h 00h R/W reserved reserved reserved reserved reserved reserved reserved CLKSEL

02h 11h R/W reserved KS_RATE *1

03h 00h R/W reserved reserved reserved reserved KS_C11 KS_C10 KS_C9 KS_C8

04h 00h R/W KS_C7 KS_C6 KS_C5 KS_C4 KS_C3 KS_C2 KS_C1 KS_C0

05h 00h R/W KS_R7 KS_R6 KS_R5 KS_R4 KS_R3 KS_R2 KS_R1 KS_R0

06h 00h R/W reserved reserved reserved reserved IOD19 IOD18 IOD17 IOD16

07h 00h R/W IOD15 IOD14 IOD13 IOD12 IOD11 IOD10 IOD9 IOD8

08h 00h R/W IOD7 IOD6 IOD5 IOD4 IOD3 IOD2 IOD1 IOD0

09h 00h R/W reserved reserved reserved reserved INTEN19 INTEN18 INTEN17 INTEN16

0Ah 00h R/W INTEN15 INTEN14 INTEN13 INTEN12 INTEN11 INTEN10 INTEN9 INTEN8

0Bh 00h R/W INTEN7 INTEN6 INTEN5 INTEN4 INTEN3 INTEN2 INTEN1 INTEN0

0Ch 00h R/W reserved reserved reserved reserved GPO19 GPO18 GPO17 GPO16

0Dh 00h R/W GPO15 GPO14 GPO13 GPO12 GPO11 GPO10 GPO9 GPO8

0Eh 00h R/W GPO7 GPO6 GPO5 GPO4 GPO3 GPO2 GPO1 GPO0

0Fh 00h R/W reserved reserved reserved reserved XPD19 XPD18 XPD17 XPD16

10h 00h R/W XPD15 XPD14 XPD13 XPD12 XPD11 XPD10 XPD9 XPD8

11h 00h R/W XPU7 XPU6 XPU5 XPU4 XPU3 XPU2 XPU1 XPU0

12h 00h R/W reserved reserved reserved reserved reserved reserved reserved INTFLT

13h 00h - reserved reserved reserved reserved reserved reserved reserved reserved

14h 00h R keycode

15h 00h R reserved reserved reserved Reserved reserved reserved fifo_ovf fifo_ind

16h 00h R reserved reserved reserved Reserved GPI19 GPI18 GPI17 GPI16

17h 00h R GPI15 GPI14 GPI13 GPI12 GPI11 GPI10 GPI9 GPI8

18h FFh R GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0

*1 Do not write more than 0x7F in KS_RATE

※ Do not write “1” in the reserved resisters. The write commands to 13h-18h addresses’ registers are ignored.

Technical Note

16/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

Table2 Register function

Symbol Address Description

RESET 00h

Software reset. All registers are initialized by writing "1".

This register value is returned to "0" automatically.

Exceptionally, GPIn register is not initialized.

CLKSEL 01h “1” : External clock from XI is used.

“0” : Internal CR oscillator is used.

KS_RATE 02h Key scan rate control

KS_Cx 03h-04h

When set to “1”, port is used as COLx for key scan.

When set to “0”, it is used as GPIO port.

KS_Ry 05h

When set to “1”, port is used as ROWy for key scan.

When set to “0”, it is used as GPIO port.

IODn 06h-08h

GPIOn’s IO direction.

When set to “1”, GPIOn direction is output. When set to “0”, GPIOn direction is input.

INTENn 09h-0Bh Interrupt of GPIOn port is enabled by "1". It is masked by "0".

GPOn 0Ch-0Eh Output value of GPIOn port.

XPDn 0Fh-10h Pull-down of GPIOn port is on by "0" and off by "1". GPIOn should be input.

XPUn 11h Pull-up of GPIOn port is on by "0" and off by "1". GPIOn should be input.

INTFLT 12h

“1” : interrupt filter ON (1us pulse rejection)

“0” : interrupt filter OFF (bypass)

keycode 14h Keycode that Host can read currently

fifo_ind 15h When there are keycode data in FIFO, fifo_ind is set to “1”. “0” means fifo empty.

fifo_ovf 15h When FIFO overflow happens, fifo_ovf is set to “1”. Initially “0” is stored.

GPIn 16h-18h

Input value of GPIOn port. Write command is ignored.

When interrupt happens, these registers must be read.

Each bit is valid only when W RSELn= 0(input). The bits at WRSELn=1(output) are fixed.

※"n" is the number of GPIO[19:0] ports. “x” is the number of COL[11:0]. “y” is the number of ROW[7:0].

Technical Note

17/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

5. GPIO function

GPIO configuration

When some ports of COL[11:0] and ROW[7:0] are needed to be used as GPIO, TW must be “0”. Then, set the proper

value in the appropriate registers through I2C. ROW[7:0] and COL[11:0] correspond to GPIO[7:0] and GPIO[19:8],

respectively. By def ault, GPIO[19:0] ports are set to input(IODn=0) and Pull-up/down ON(XPUn/XPDn=0).

(n is the number of GPIO[19:0] ports.)

Refer to the following for the configuration of GPIO.

Table3 GPIO configuration

State of GPIO Register

GPOn IODn XPDn/XPUn

Input, Pull-up/down ON * 0 0

Input, Pull-up/down OFF * 0 1

Output, H drive 1 1 *

Output, L drive 0 1 *

Output, Hi-Z※1 0 0 1

※1 It is required to pull-up to more than VDD potential.

How to deal with GPIO ports which are not using

When set to output, GPIO port must be open.

When set to input, don’t make GPIO port open. It must be forced by "0" or Pull-up/down on.

Interrupt configuration

The initial XINT output is Hi-Z, so it should be pull-up. When interrupt is generated, XINT port outputs L. By default,

interrupt is masked with INTEN register "0". The bit to be used is made "1", and then the mask is released. In this

case, IOD register should be "0"(input).

Write to GPIO port

After master sets the internal register address for write, the data is sent from MSB.

After Acknowledge is returned, the value of each GPIO port will be changed.

Write Configuration Pulse, which is trigger of changing registers, is generated at the timing of Acknowledge.

S X X X X X X X 0 Ack AckReg AddressMSB LSB AckData1 (GPO [7 :0])MSB LSB P

123456789SCL

SDA

Start Condition Write Acknowledge From Slave

GPIO[7:0]

Acknowledge From Slave

Stop Condition

Data1

Valid

tDV

Write Configuration

Pulse

S X X X X X X X 0 Ack AckReg AddressMSB LSB AckData1 (GPO[7:0])MSB LSB AckWRSEL = Write ModeMSB LSB P

Data1

Valid

123456789

SCL

SDA

Start Condition Write Acknowledge From Slave

GPIO[7:0]

Acknowledge From Slave Acknowledge From Slave

tDV

Stop Condition

Write Configuration

Pulse

Fig.16 Write to GPIO port

Technical Note

18/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

Read from GPIO port

After writing of the Slave address and R/W bits by master, reading GPIO port procedure begins.

All ports’ status that is set to the input by IOD registers are taken into the GPI register when ACK is sent.

Fig.17 Read from GPIO port

Interrupt Valid/Reset

When the GPIO interrupt is used, some of INTEN registers are required to be written to "1".

When current GPIO port status becomes different from the value of the GPIn registers, XINT port is changed from

"1" to "0". After reading GPI register, it will return to "1".

When Master detects interrupt, Master must read all GPI registers that is set to input(IODn=0), even if XINT is

changed while reading. It is because BU1852 does not latch the XINT status. Fig.18 shows one of the example of

using only ROW[ 7:0] as GPI. In this case, Master reads only 18h register immediate after detecting XINT.

XINT cannot distinguish whether just one po rt is different or multi ports are different from the previ ous value. Master

is necessary to store the previous GPI register value and compare it with the current value after XINT is asserted.

Stop Condition

S X X X X X X X 1 Ack NA

SCL

SDA

Start Condition Read Acknowledge Fr om Slave

GPIOn

Data2 ( GPI[7:0 ])MSB LSB

Data1 Data2

No Acknowledge From Master

tIV tIR

XINT

Data1 Data2GPIn Reg

123456789

Data3 Data2

tIV tIR

Fig.18 Interrupt Valid/Reset (Example : ROW[7:0] as GPI with interrupt)

Stop Condition

S X X X X

SCL

Start Condition Read

cknowledge From Slave

GPIO[7:0] D1

No Acknowledge From Maste

123456789

[7] D1

[6] D1

[5]

[4] D1

[3] D1

[2] D1

[1] D1

[0]

GPI[7:0] Reg D1

Technical Note

19/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

6. Key code Assignment

Table 4 shows the key code assignment. T hese key codes are sent through 3wire or I 2C corresponding to the pushed

or released keys.

Table4 Key codes

M : Make Key (the code when the key is pressed)

B : Break Key (the code when the key is released)

ROW0 ROW1 ROW2 ROW3 ROW4 ROW5 ROW6 ROW7

0x01 0x11 0x21 0x31 0x41 0x51 0x61 0x71M

0x81 0x91 0xA1 0xB1 0xC1 0xD1 0xE1 0xF1B

COL0

COL1

COL2

COL3

COL4

COL5

COL6

COL7 B

0x02 0x12 0x22 0x32 0x42 0x52 0x62 0x72

0x82 0x92 0xA2 0xB2 0xC2 0xD2 0xE2 0xF2

0x03 0x13 0x23 0x33 0x43 0x53 0x63 0x73

0x83 0x93 0xA3 0xB3 0xC3 0xD3 0xE3 0xF3

0x04 0x14 0x24 0x34 0x44 0x54 0x64 0x74

0x84 0x94 0xA4 0xB4 0xC4 0xD4 0xE4 0xF4

0x05 0x15 0x25 0x35 0x45 0x55 0x65 0x75

0x85 0x95 0xA5 0xB5 0xC5 0xD5 0xE5 0xF5

0x06 0x16 0x26 0x36 0x46 0x56 0x66 0x76

0x86 0x96 0xA6 0xB6 0xC6 0xD6 0xE6 0xF6

0x07 0x17 0x27 0x37 0x47 0x57 0x67 0x77

0x87 0x97 0xA7 0xB7 0xC7 0xD7 0xE7 0xF7

0x08 0x18 0x28 0x38 0x48 0x58 0x68 0x78

0x88 0x98 0xA8 0xB8 0xC8 0xD8 0xE8 0xF8

COL8 B

0x09 0x19 0x29 0x39 0x49 0x59 0x69 0x79

0x89 0x99 0xA9 0xB9 0xC9 0xD9 0xE9 0xF9

COL9 B

0x0

0x1

0x2

0x3

0x4

0x5

0x6

0x7

0x8

0x9

0xA

0xBA 0xCA 0xD

0xEA 0xF

COL10 B

0x0B 0x1B 0x2B 0x3B 0x4B 0x5B 0x6B 0x7B

0x8B 0x9B 0xAB 0xBB 0xCB 0xDB 0xEB 0xFB

COL11 B

0x0C 0x1C 0x2C 0x3C 0x4C 0x5C 0x6C 0x7C

0x8C 0x9C 0xAC 0xBC 0xCC 0xDC 0xEC 0xFC

Technical Note

20/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

7. Ghost Key Rejection

Ghost key is an inevitable phenomenon as long as key-s witch matrices are used. When three switches located at the

corners of a certain matrix rectangle are pressed simultaneously, the switch that is located at the last corner of the

rectangle (the ghost key) als o appears to be presse d, even though the last key is not pressed. This occurs because the

ghost key switch is electrically shorted by the combination of the other three switches (Fig.19). Because the key

appears to be pressed electricall y, it is impossible to distinguish which ke y is the ghost key and which key is pressed.

The BU1852 solves the ghost key problem to use the simple method. If BU1852 detects any three-key combination

that generates a fourth ghost key, and BU1852 does not report anything, indicating the ghost keys are ignored. This

means that many combinations of three keys are also ignored when pressed at the same time. Applications requiring

three-key combinations (such as <Ctrl><Alt><Del>) must ensure that the three keys are not wired in positions that

define the vertices of a rectangle (Fig. 20). There is no limit on the number of keys that can be press ed simultaneously

as long as the keys do not generate ghost key events.

GHOST-KEY

EVENT

PRESSED KEY

EVENT

KEY-SWITCH MATRIX

Fig.19 Ghost key phenomenon

KEY-SWITCH MATRIX KEY-SWITCH MATRIX

EXAMPLES OF VALID THREE-KEY COMBINATIONS

Fig.20 Valid three key combinations

Technical Note

21/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

8. Recommended flow

Fig.21 shows the recommended flow when TW=0(I2C protocol is selected).

power on

Reset release

clock select

assign each port

to key scan and GPIO

detemine GPIO direction

GPI interrupt setting

Control GPO port

Monitor “XINT”

Related registe rs

determine key scan rate

01h : CLKSEL

02h : KS_RATE

03h-04h : KS_C[11:0]

05h : KS_R[7:0]

06h-08h : IOD[19:0]

09h-0Bh : INTEN[19:0]

0Ch-0Eh : GPO[19:0]

14h-18h : Read registers

Sequence

12h : INTFLT

Fig.21 Recommended flow and related registers

Forbidden operat ion:

--- Dynamic change of TW (I2C/3 wire protocol should be fixed)

--- Dynamic assignment change of keyscan and GPIO (should be determined initially)

--- Dynamic change of keysca n rate (should be determined initially)

--- Dynamic change of CLKSEL (should be determined initially)

Technical Note

22/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

●Application circuit example

SCL

BU1852GUW

MPU

VSS

0.1uF

1.8V

VDD

ROW0

SDA

INT XINT

XRST

SCL

SDA

TESTM[1:0]

ROW7

ROW1

ROW2

ROW3

ROW4

ROW5

ROW6

COL0

COL1

COL2

COL3

COL4

COL5

COL6

COL7

VDDIO

PORENB

ADR

VDD

COL8

COL9

COL10

COL11

VSS

1.8V

to Other I2C Devices

GPO

GPI

3.0V

0.1uF

from/to 3.0V device

Fig.22 Application circuit example

Technical Note

23/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

●Appendix

1. 3wire Interface (T W=”1”)

SDA

SCL

XINT

Bit7 Bit6 Bit5 Bit0invalid

Start bit

sent by BU1852 sent by host device

Fig.23 3wire protocol

Figure 23 shows the original 3wire protocol of BU1852. When this 3wire protocol is used, TW must be “1”. Note that

this 3wire interface is completely different from I2C and other standard bus interface.

Procedure

1. When BU1852 detects key events, XINT interrupt is generated to host with driving Low.

2. After the host detects XINT interrupt, the host is supposed to send start bit.

3. After BU1852 detects start bit, the 8bit data (key code) transmission on SDA will start synchronized with the

rising edge of SCL clock signal, which is sent from the host.

4. 8 bit data are followed by “0” (9th bit is always “0”), and then BU1852 drives High on XINT line.

See also section “3wire interface AC characteristics”.

Technical Note

24/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

2. 3wire Interface AC characteristics

Fig.24 3wire interface AC timing

VDD=1.8V, VDDIO=1.8V,Topr=25℃,TW=VDD

Parameter Symbol Limits Unit Conditions

Min. Typ. Max.

SCL Clock Frequency fTWSCLK - - 21.5 kHz

START Condition

Setup Time tTWSU;STA 0.030 - 500 ms

START Condition

Hold T ime tTWHD;STA 20 - - µs

SCL Low Time tTWLOW;CLK 23 - - µs

SCL High Time tTWHIGH;CLK 23 - - µs

Data Hold Time tTWHD;DAT 0.1 - 1.0 µs

XINT End Hold tTWHD;INTE 1.35 - 10.2 µs

XINT Low Time tTWLOW;INT 500 800 1350 ms

SCL

SDA

tTWS U;ST

tTWH D;ST

tTWL OW ;

CLK

tTWH IGH ;

CLK 1

TWS CLK

START BIT 7 BIT 6 "0"

State

XINT

BIT 0

tTWHD ;INTE

tTWH D;DAT

tTWLOW ;INT

Technical Note

25/25

BU1852GUW, BU1852GXW

www.rohm.com 2012.08 - Rev.B

●Ordering part number

B U 1 8 5 2 G U W - E 2

Part No. Part No.

Package

GUW: VBGA035W040

GXW: UBGA035W030

Packaging and forming spec ification

E2: Embossed tape and reel

(Unit : mm)

VBGA035W040

MABS

φ0.05

35-φ0.295±0.05

0.08 S

1PIN MARK 4.0 ± 0.1

4.0 ± 0.1

0.9MAX.

0.10

123456

P=0.5×5

0.75 ± 0.1 0.5

0.75 ± 0.1

P=0.5×5

∗

Order quantity needs to be multiple of the minimum quantity.

Embossed carrier tape (with dry pack)Tape

Quantity

Direction

of feed The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

2500pcs

()

Direction of feed

Reel 1pin

∗ Order quantity needs to be multiple of the minimum quantity.

Embossed carrier tape (with dry pack)Tape

Quantity

Direction

of feed The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

1000pcs

()

Direction of feed

Reel 1pin

UBGA035W030

(Unit : mm)

356241

0.08 S

3.0±0.1

0.9MAX

0.5±0.1

P=0.4×5

0.4

0.1

1PIN MARK

35-φ0.2±0.05

0.5±0.1

φ0.05 A

Datasheet

Notice - GE Rev.002

Notice

Precaution on using ROHM Products

1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,

OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you

intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport

equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car

accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or

serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.

Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any

damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific

Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN USA EU CHINA

CLASSⅢ CLASSⅢ CLASSⅡb CLASSⅢ

CLASSⅣ CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are designed and manufactured for use under standard conditions and not under any special or

extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any

special or extraordinary environments or conditions. If you intend to use our Products under any special or

extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of

product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of

flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning

residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual

ambient temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the

ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Datasheet

Notice - GE Rev.002

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

QR code printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,

please consult with ROHM representative in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable

for infringement of any intellectual property rights or other damages arising from use of such information or data.:

2. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the information contained in this document.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

DatasheetDatasheet

Notice – WE Rev.001

General Precaution

1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.

ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny

ROHM’s Products against warning, caution or note contained in this document.

2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior

notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s

representative.

3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all

information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or

liable for any damages, expenses or losses incurred by you or third parties resulting from inaccur acy or errors of or

concerning such information.