QFET TM FQP7N20L 200V LOGIC N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation modes. These devices are well suited for high efficiency switching DC/DC converters, switch mode power supplies, and motor control. * * * * * * * 6.5A, 200V, RDS(on) = 0.75 @VGS = 10 V Low gate charge ( typical 6.8 nC) Low Crss ( typical 8.5 pF) Fast switching 100% avalanche tested Improved dv/dt capability Low level gate drive requirement allowing direct operation from logic drivers D ! " G G! DS ! " " " TO-220 ! FQP Series Absolute Maximum Ratings Symbol VDSS ID S TC = 25C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25C) Drain Current FQP7N20L 200 - Continuous (TC = 100C) IDM Drain Current VGSS Gate-Source Voltage EAS Single Pulsed Avalanche Energy IAR EAR dv/dt PD TJ, TSTG TL - Pulsed (Note 1) Units V 6.5 A 4.11 A 26 A 20 V (Note 2) 73 mJ Avalanche Current (Note 1) 6.5 A Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25C) (Note 1) 6.3 5.5 63 0.51 -55 to +150 mJ V/ns W W/C C 300 C (Note 3) - Derate above 25C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RJC Parameter Thermal Resistance, Junction-to-Case Typ -- RCS Thermal Resistance, Case-to-Sink 0.5 -- C/W RJA Thermal Resistance, Junction-to-Ambient -- 62.5 C/W (c)2000 Fairchild Semiconductor International Max 1.98 Units C/W Rev. A2, December 2000 FQP7N20L December 2000 Symbol TC = 25C unless otherwise noted Parameter Test Conditions Min Typ Max Units 200 -- -- V -- 0.17 -- V/C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 A BVDSS / TJ Breakdown Voltage Temperature Coefficient ID = 250 A, Referenced to 25C IDSS IGSSF IGSSR VDS = 200 V, VGS = 0 V -- -- 1 A VDS = 160 V, TC = 125C -- -- 10 A Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V -- -- -100 nA Gate Threshold Voltage VDS = VGS, ID = 250 A 1.0 -- 2.0 V Static Drain-Source On-Resistance VGS = 10 V, ID = 3.25 A VGS = 5 V, ID = 3.25 A -- 0.59 0.62 0.75 0.78 Forward Transconductance VDS = 30 V, ID = 3.25 A -- 6.3 -- S VDS = 25 V, VGS = 0 V, f = 1.0 MHz -- 390 500 pF -- 55 70 pF -- 8.5 11 pF Zero Gate Voltage Drain Current On Characteristics VGS(th) RDS(on) gFS (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 100 V, ID = 6.5 A, RG = 25 VDS = 160 V, ID = 6.5 A, VGS = 5 V (Note 4, 5) (Note 4, 5) -- 12 35 ns -- 125 260 ns -- 20 50 ns -- 65 140 ns -- 6.8 9.0 nC -- 1.6 -- nC -- 3.4 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 6.5 A ISM -- -- 26 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 6.5 A Drain-Source Diode Forward Voltage -- -- 1.5 V trr Reverse Recovery Time -- 110 -- ns Qrr Reverse Recovery Charge -- 0.44 -- C VGS = 0 V, IS = 6.5 A, dIF / dt = 100 A/s (Note 4) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 2.6mH, IAS = 6.5A, VDD = 50V, RG = 25 , Starting TJ = 25C 3. ISD 6.5A, di/dt 300A/s, VDD BVDSS, Starting TJ = 25C 4. Pulse Test : Pulse width 300s, Duty cycle 2% 5. Essentially independent of operating temperature (c)2000 Fairchild Semiconductor International Rev. A2, December 2000 FQP7N20L Electrical Characteristics FQP7N20L Typical Characteristics ID, Drain Current [A] 10 Bottom : VGS 10 V 8.0 V 6.0 V 5.0 V 4.5 V 4.0 V 3.5 V 3.0 V 1 10 ID, Drain Current [A] Top : 1 0 10 150 0 10 25 Notes : 1. 250s Pulse Test 2. TC = 25 -1 10 Notes : 1. VDS = 30V 2. 250s Pulse Test -55 -1 -1 0 10 10 1 10 0 10 2 4 6 8 10 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 4 1 VGS = 5V IDR , Reverse Drain Current [A] RDS(on) [ ], Drain-Source On-Resistance 10 3 VGS = 10V 2 1 Note : TJ = 25 150 Notes : 1. VGS = 0V 2. 250s Pulse Test 25 -1 0 10 0 3 6 9 12 15 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 ID , Drain Current [A] VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 12 800 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd Ciss 400 Coss Notes : 1. VGS = 0 V 2. f = 1 MHz 200 Crss 10 VGS, Gate-Source Voltage [V] 600 Capacitance [pF] 0 10 VDS = 40V 8 VDS = 100V VDS = 160V 6 4 2 Note : ID = 6.5 A 0 -1 10 0 0 10 1 10 VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics (c)2000 Fairchild Semiconductor International 0 3 6 9 12 15 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics Rev. A2, December 2000 FQP7N20L Typical Characteristics (Continued) 1.2 3.0 RDS(ON) , (Normalized) Drain-Source On-Resistance BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 1.1 1.0 Notes : 1. VGS = 0 V 2. ID = 250 A 0.9 0.8 -100 -50 0 50 100 150 2.0 1.5 1.0 Notes : 1. VGS = 10 V 2. ID = 3.25 A 0.5 0.0 -100 200 -50 0 o 50 100 150 200 o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 7 2 10 6 5 100 s 1 10 ID, Drain Current [A] ID, Drain Current [A] Operation in This Area is Limited by R DS(on) 1 ms 10 ms DC 0 10 Notes : 4 3 2 o 1. TC = 25 C 1 o 2. TJ = 150 C 3. Single Pulse -1 10 0 1 10 0 25 2 10 10 50 0 .2 150 N o te s : 1 . Z J C ( t) = 1 .9 8 /W M a x . 2 . D u ty F a c to r , D = t 1 /t 2 3 . T J M - T C = P D M * Z J C ( t) 0 .0 5 -1 PDM 0 .0 2 0 .0 1 t1 Z s i n g l e p u ls e 10 125 Figure 10. Maximum Drain Current vs. Case Temperature 0 .1 10 100 D = 0 .5 0 JC ( t) , T h e r m a l R e s p o n s e Figure 9. Maximum Safe Operating Area 10 75 TC, Case Temperature [] VDS, Drain-Source Voltage [V] t2 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ] Figure 11. Transient Thermal Response Curve (c)2000 Fairchild Semiconductor International Rev. A2, December 2000 FQP7N20L Gate Charge Test Circuit & Waveform VGS Same Type as DUT 50K Qg 200nF 12V 5V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RL VDS 90% VDD VGS RG VGS DUT 5V 10% td(on) tr td(off) t on tf t off Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS BVDSS IAS ID RG VDD DUT 10V tp (c)2000 Fairchild Semiconductor International ID (t) VDS (t) VDD tp Time Rev. A2, December 2000 FQP7N20L Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD * dv/dt controlled by RG * ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop (c)2000 Fairchild Semiconductor International Rev. A2, December 2000 FQP7N20L Package Dimensions TO-220 4.50 0.20 2.80 0.10 (3.00) +0.10 1.30 -0.05 18.95MAX. (3.70) o3.60 0.10 15.90 0.20 1.30 0.10 (8.70) (1.46) 9.20 0.20 (1.70) 9.90 0.20 1.52 0.10 0.80 0.10 2.54TYP [2.54 0.20] 10.08 0.30 (1.00) 13.08 0.20 ) (45 1.27 0.10 +0.10 0.50 -0.05 2.40 0.20 2.54TYP [2.54 0.20] 10.00 0.20 (c)2000 Fairchild Semiconductor International Rev. A2, December 2000 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM BottomlessTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST(R) FASTrTM GTOTM HiSeCTM ISOPLANARTM MICROWIRETM POPTM PowerTrench(R) QFETTM QSTM Quiet SeriesTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM UHCTM VCXTM DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. (c)2000 Fairchild Semiconductor International Rev. A, January 2000