3.3V Slew Rate Limited,
Half and Full Duplex
Preliminary Technical Data
ADM3483/ADM3485/ADM3488/ADM3490
Rev. PrD
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FEATURES
EIA RS-485/RS-422 Compliant
Data Rate Options
ADM3483, ADM3488 – 250kbps
ADM3485, ADM3490 – 10Mbps
Half and Full Duplex Options
Reduced Slew Rates for Low EMI
2nA Supply Current in Shutdown Mode
(ADM3483,ADM3485)
Up to 32 Transceivers on a bus
-7V to +12V Bus Common Mode Range
Specified over –40°C to +85°C Temperature Range
Available in 8-Lead SOIC
ADM3483/85 available in an 8-Lead LFCSP Package
APPLICATIONS
Low-Power RS-485 Applications
EMI Sensitive Systems
DTE-DCE Interfaces
Industrial Control
Packet Switching
Local Area Networks
Level Translators
GENERAL DESCRIPTION
The ADM3483, ADM3485, ADM3488 and ADM3490 are 3.3V,
low-power transceivers for RS-485 and RS-422 communication.
Each part contains one driver and one receiver. The ADM3483
and ADM3488 feature slew-rate-limited drivers that minimize
EMI and reduce reflections caused by improperly terminated
cables, allowing error-free data transmission at data rates up to
250kbps. The partially slew-rate-limited MAX3486 transmits up
to 2.5Mbps. The ADM3485 and ADM3490 transmit at up to
10Mbps.
The drivers are short-circuit current limited and are protected
against excessive power dissipation by thermal shutdown
circuitry that places the driver outputs into a high-impedance
state. The receiver input has a fail-safe feature that guarantees a
logic-high output if both inputs are open circuit. The ADM3488
and ADM3490 feature full duplex communication, while the
ADM3483 and ADM3485 are designed for half-duplex
communication.
The driver outputs are slew rate limited in order to reduce EMI
and data errors caused by reflections from improperly
terminated buses. Excessive power dissipation caused by bus
contention or by output shorting is prevented with a thermal
shutdown circuit.
The parts are fully specified over the commercial and industrial
temperature ranges and all are available in 8-lead SOIC and the
ADM3483 and the ADM3485 are also available in an 8-lead
LFCSP packages.
FUNCTIONAL BLOCK DIAGRAMS
B
A
ADM3483/ADM3485
R
D
RO
RE
DI
V
CC
GND
DE
R
D
RO
DI
V
CC
A
B
GND
Z
Y
ADM3488/ADM3490
Part No. Guaranteed
Data Rate
(Mpbs)
Supply
Voltage
(V)
Half/Full
Duplex
Slew-Rate
Limited
Driver/
Reciever
Enable
Shutdown
Current
(nA)
Pin
Count
ADM3483 0.25 Half Yes Yes 2 8
ADM3485 10 Half No Yes 2 8
ADM3488 0.25 Full Yes No - 8
ADM3490 10
3.0 to 3.6
Full No No - 8
Table 1. Selection Table
ADM3483/ADM3485/ADM3488/ADM3490 Preliminary Technical Data
Rev.PrD | Page 2 of 14
ADM3483/ADM3485/ADM3488/ADM3490— SPECIFICATIONS
(VCC=3.3V ±0.3%, TA= TMIN to TMAX, unless otherwise noted.)
Parameter Min Typ Max Units Test Conditions/Comments
DRIVER
Differential Output Voltage, VOD 2.0 V
R=100 (RS-422), Figure 3
Vcc = 3.3V ±5%
1.5 V
R=54 (RS-485), Figure 3
1.5 V
R=60 (RS-485), Vcc = 3.3V,
Figure 4
|VOD| for Complementary Output States 0.2 V
R=54 or 100, Figure 3
Common Mode Output Voltage, VOC 3 V
R=54 or 100, Figure 3
|VOC| for Complementary Output States 0.2 V
R=54 or 100, Figure 3
DRIVER INPUT LOGIC
CMOS Input Logic Threshold Low, VIH 0.8 V
DE,DI,RE
CMOS Input Logic Threshold High, VIL 2.0 V
DE,DI,RE
CMOS Logic Input Current, IN1 ±2 µA
DE,DI,RE
1.0 mA VIN = 12V Input Current (A,B), IN2
-0.8 mA VIN = -7V
DE = 0V
VCC = 0V or 3.6V
20 µA VIN = 12V Output Leakage (Y,Z), IO
-20 µA VIN = -7V
DE = 0V, RE = 0V
VCC = 0V or 3.6V
1 µA VIN = 12V Output Leakage (Y,Z) in Shudown Mode, IO
-1 µA VIN = -7V
DE = 0V, RE = 0V
VCC = 0V or 3.6V
RECEIVER
Differential Input Threshold Voltage, VTH -0.2 0.2 V -7V<VCM<+12V
Input Hysteresis, VTH 50 mV VCM=0V
CMOS Output Voltage High, VOH Vcc – 0.4 V IOUT= -1.5mA VID = 200mV,
Figure 5
CMOS Output Voltage Low, VOL 0.4 V
IOUT= 2.5mA, VID = 200mV,
Figure 5
Three-State Output Leakage Current, IOZR ±1 µA
Vcc = 3.6V, 0V VOUT Vcc
Input Resistance , RIN 12
k -7V<VCM<+12V
POWER SUPPLY CURRENT
DE = VCC
1.1 2.2 mA
RE = 0V or VCC
DE = VCC
Supply Current
0.95 1.9 mA
RE = 0V
No Load,
DI = 0V or VCC
Supply Current in Shutdown Mode, ISHDN 0.002 1 µA
DE = 0V, RE = VCC, DI = VCC or 0V
-250 mA VOUT = -7V
Driver Short-Circuit Output Current, IOSD 250 mA VOUT = 12V
Receiver Short-Circuit Output Current, IOSR ±8 ±60 mA 0V < VRO < VCC
Preliminary Technical Data ADM3483/ADM3485/ADM3488/ADM3490
Rev.PrD | Page 3 of 14
TIMING SPECIFICATIONS-ADM3485/ADM3490 (VCC=3.3V, TA= 25°)
Parameter Min Typ Max Units Test Conditions/Comments
DRIVER
Differential Output Delay, tDD 1 22 35 ns
RL = 60, Figure 6
Differential Output Transition Time, tTD 3 8 25 ns
RL = 60, Figure 6
Propagation Delay, Low-to-High Level, tPLH 7 22 35 ns
RL = 27, Figure 7
Propagation Delay, High-to-Low Level, tPHL 7 22 35 ns
RL = 27, Figure 7
|tPLH – tPHL| Propagation Delay Skew (Note 2),
tPDS
8 ns
RL = 27, Figure 7
DRIVER OUTPUT ENABLE/DISABLE TIMES
(ADM3485 ONLY)
Output Enable Time Low Level, tPZL 45 90 ns
RL = 110, Figure 8
Output Enable Time High Level, tPZH 45 90 ns
RL = 110, Figure 8
Output Enable Time from High Level, tPHZ 40 80 ns
RL = 110, Figure 8
Output Enable Time from Low Level, tPLZ 40 80 ns
RL = 110, Figure 9
Output Enable Time from Shutdown to Low
Level, tPSL
650 900 ns
RL = 110, Figure 9
Output Enable Time from Shutdown to
High Level, tPSH
650 900 ns
RL = 110, Figure 8
TIMING SPECIFICATIONS-ADM3483/ADM3488 (VCC=3.3V, TA= 25°)
Parameter Min Typ Max Units Test Conditions/Comments
DRIVER
Differential Output Delay, tDD 600 900 1400 ns
RL = 60, Figure 6
Differential Output Transition Time, tTD 400 700 1200 ns
RL = 60, Figure 6
Propagation Delay, Low-to-High Level, tPLH 700 1000 1500 ns
RL = 27, Figure 7
Propagation Delay, High-to-Low Level, tPHL 700 1000 1500 ns
RL = 27, Figure 7
|tPLH – tPHL| Propagation Delay Skew (Note 2),
tPDS
100 ns
RL = 27, Figure 7
DRIVER OUTPUT ENABLE/DISABLE TIMES
(ADM3485 ONLY)
Output Enable Time Low Level, tPZL 900 1300 ns
RL = 110, Figure 9
Output Enable Time High Level, tPZH 600 800 ns
RL = 110, Figure 8
Output Enable Time from High Level, tPHZ 50 80 ns
RL = 110, Figure 8
Output Enable Time from Low Level, tPLZ 50 80 ns
RL = 110, Figure 9
Output Enable Time from Shutdown to Low
Level, tPSL
1.9 2.7 ns
RL = 110, Figure 9
Output Enable Time from Shutdown to
High Level, tPSH
2.2 3.0 ns
RL = 110, Figure 8
ADM3483/ADM3485/ADM3488/ADM3490 Preliminary Technical Data
Rev.PrD | Page 4 of 14
TIMING SPECIFICATIONS (VCC=3.3V, TA= 25°)
Parameter Min Typ Max Units Test Conditions/Comments
RECEIVER
Time to Shutdown, tSHDN 80 190 300 ns ADM3483/ADM3485 only, Note 3
25 65 90 ns VID = 0V to 3.0V, CL = 15pF, Figure 10
Propagation Delay, Low-to-High Level, tRPLH 25 75 120 ns ADM3483/ADM3488 only.
25 65 90 ns VID = 0V to 3.0V, CL = 15pF, Figure 10
Propagation Delay, High-to-Low Level, tRPHL 25 75 120 ns ADM3483/ADM3488 only.
10 ns VID = 0V to 3.0V, CL = 15pF, Figure 10
|tPLH – tPHL| Propagation Delay Skew, tRPDS 20 ns ADM3483/ADM3488 only.
Output Enable Time to Low Level, tPRZL 25 50 ns
CL = 15pF, Figure 11, ADM3483/ADM3485
only
Output Enable Time to High Level, tPRZH 25 50 ns
CL = 15pF, Figure 11, ADM3483/ADM3485
only
Ouput Disable Time from High Level, tPRHZ 25 45 ns
CL = 15pF, Figure 116, ADM3483/ADM3485
only
Ouput Disable Time from Low Level, tPRLZ 25 45 ns
CL = 15pF, Figure 11, ADM3483/ADM3485
only
Output Enable Time from Shutdown to
Low Level, tPRSL
720 1400 ns
CL = 15pF, Figure 11, ADM3483/ADM3485
only
Output Enable Time from Shutdown to
High Level, tPRSH
720 1400 ns
CL = 15pF, Figure 11, ADM3483/ADM3485
only
Note1: VOD and VOC are the changes in VOD and VOC, respectively, when DI input changes state.
Note 2: Measured on |tPLH (Y) - tPHL (Y) | and |tPLH (Z) - tPHL (Z) |.
Note 3: The transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 80ns, the parts are guaranteed not to enter
shutdown. If the inputs are in this state for at least 300ns, the part are guaranteed to have entered shutdown.
Preliminary Technical Data ADM3483/ADM3485/ADM3488/ADM3490
Rev.PrD | Page 5 of 14
AB1SOLUTE MAXIMUM RATINGS
Table 2. (TA = 25°C unless otherwise noted)
Parameter Rating
VCC to GND TBD
Digital I/O Voltage (DE, RE, DI, ROUT) TBD
Driver Output/Receiver Input Voltage TBD
Operating Temperature Range -40°C to +85°C
Storage Temperature Range -65°C to +125°C
θJA Thermal Impedance
SOIC 110°C/W
LFCSP 62°C/W
Lead Temperature
Soldering (10 sec) 300°C
Vapour Phase (60 sec) 215°C
Infrared (15 sec) 220°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ADM3483/ADM3485/ADM3488/ADM3490 Preliminary Technical Data
Rev.PrD | Page 6 of 14
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
ADM3483
ADM3485
RO
RE
DE
DI
V
CC
B
A
GND
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
1
ADM3488
ADM3490
V
CC
RO
DI
GND
A
B
Z
Y
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
Table 3. ADM3483/ADM3485 Pin Descriptions
Pin No. Mnemonic Description
1 RO Receiver Output. When enabled, if A > B by 200 mV, then RO = high.
If A < B by 200 mV, then RO = low.
2 RE Receiver Output Enable.
A low level enables the receiver output, RO.
A high level places it in a high impedance state.
3 DE Driver Output Enable. A high level enables the driver differential inputs A and B.
A low level places it in a high impedance state.
4 DI Driver Input. When the driver is enabled, a logic low on DI forces A low and B high
while a logic high on DI forces A high and B low.
5 GND Ground.
6 A Noninverting Receiver Input A/Driver Output A.
7 B Inverting Receiver Input B/Driver Output B.
8 VCC 5 V Power Supply.
Table 4. ADM34884/ADM3490 Pin Descriptions
Pin No. Mnemonic Description
1 VCC 5 V Power Supply.
2 RO Receiver Output. When enabled, if A > B by 200 mV, then RO = high.
If A < B by 200 mV, then RO = low.
3 DI Driver Input. When the driver is enabled, a logic low on DI forces A low and B high
while a logic high on DI forces A high and B low.
4 GND Ground.
5 Y Driver Noninverting Output.
6 Z Driver Inverting Output.
7 B Receiver Inverting Input.
8 A Receiver Noninverting Input.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Preliminary Technical Data ADM3483/ADM3485/ADM3488/ADM3490
Rev.PrD | Page 7 of 14
TEST CIRCUITS AND SWITCHING CHARACTERISTICS
Y
Z
V
OD
V
OC
R
L
/2
R
L
/2
Figure 3. Driver VOD and VOC
V
CC
DV
OD
R
L
V
CM
=
-7V to +12V
375
375
Figure 4. Driver VOD with Varying Common-Mode Voltage
R
0
V
OH IOH
(-)
IOL
(+)
V
OL
V
ID
Figure 5. Receiver VOH and VOL
V
CC
50
RL
=
60
CL
= 15pF (NOTE 5)
GENERATOR
(NOTE 4)
DOUT
CL
CL
tDD
tTD
50%
1.5V
10%
OUT
IN
90%
50%
1.5V
10%
90%
3V
0
2.0V
-2.0V
tDD
tTD
Figure 6. Driver Differential Output Delay and Transition Times
V
CC
V
OM
50
R
L
= 27
C
L
= 15pF
(NOTE 5)
GENERATOR
(NOTE 4)
DOUT
S1
1.5V
V
OH
+ V
OL
2
V
OM
=
3V
0V
V
OH
V
OM
V
OM
V
OM
V
OM
V
OL
V
OH
V
OL
t
PLH
1.5V
Y
OUT
Z
OUT
IN 1.5V
t
PHL
t
PHL
t
PLH
Figure 7. Driver Propagation Delays
ADM3483/ADM3485/ADM3488/ADM3490 Preliminary Technical Data
Rev.PrD | Page 8 of 14
3V
0
V
OH
V
OM
0
R
L
= 110
CL
= 50pF
(NOTE 5)
D
0 OR 3V
50
GENERATOR
(NOTE 4)
tPZH
1.5V
0.25V
OUT
OUT
S1
IN 1.5V
1.5V
t
PHZ
V
OH + VOL
2
VOM =
Figure 8. Driver Enable and Disable Times (tPZH, tPSH, tPHZ)
V
CC
RL
= 110
CL
= 50pF
(NOTE 5)
D
50
GENERATOR
(NOTE 4)
OUT
S1
3V
0
V
CC
V
OL
V
OM
tPSL
1.5V
0.25V
O
UT
IN 1.5V
t
PLZ
0 OR 3V
Figure 9. Driver Enable and Disable Times (tPZL, tPSL, tPLZ)
V
ID
50
C
L
= 15pF
(NOTE 5)
GENERATOR
(NOTE 4)
ROUT
1.5V
0
V
CC
2
V
OM
=
t
RPLH
1.5V
OUT
IN 1.5V
3.0V
0
t
RPHL
V
CC
V
OM
V
OM
0
Figure 10. Receiver Propagation Delay
Preliminary Technical Data ADM3483/ADM3485/ADM3488/ADM3490
Rev.PrD | Page 9 of 14
3V
0
V
CC
V
OL
C
L
(NOTE 5)
R
1.5V
-1.5V
50
GENERATOR
(NOTE 4)
V
CC
V
ID
1.5V
OUT
S1
S2
1k
IN 1.5V
S1 CLOSED
S2 OPEN
S3 = -1.5V
t
PRZL
t
PRSL
3V
0
V
OH
0
1.5V
OUT
IN 1.5V
S1 OPEN
S2 CLOSED
S3 = 1.5V
t
PRZH
t
PRSH
3V
0
V
CC
V
OL
OUT
IN 1.5V
S1 CLOSED
S2 OPEN
S3 = -1.5V
t
PRLZ
3V
0
V
OH
0
0.25V
0.25V
1.5V
O
UT
IN
S1 OPEN
S2 CLOSED
S3 = 1.5V
t
PRHZ
S3
Figure 11. Receiver Enable and Disable Times
ADM3483/ADM3485/ADM3488/ADM3490 Preliminary Technical Data
Rev.PrD | Page 10 of 14
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 1. Output Current vs. Receiver Output Low Voltage
Figure 2. Output Current vs. Receiver Output High Voltage
Figure 3. Receiver Output High Voltage vs. Temperature
Figure 4. Receiver Output Low Voltage vs. Temperature
Figure 5. Driver Output Current vs. Differential Output Voltage
Figure 6. Driver Differential Output Voltage vs. Temperature
Preliminary Technical Data ADM3483/ADM3485/ADM3488/ADM3490
Rev.PrD | Page 11 of 14
Figure 7. Output Current vs. Driver Output Low Voltage
Figure 8. Output Current vs. Driver Output High Voltage
Figure 9.Supply Current vs. Temperature
Figure 10. Shutdown Current vs. Temperature
Figure 11. TBD
Figure 12. TBD
ADM3483/ADM3485/ADM3488/ADM3490 Preliminary Technical Data
Rev.PrD | Page 12 of 14
CIRCUIT DESCRIPTION
The ADM3483/ADM3485/ADM 3488/ADM3490 are low-
power transceivers for RS-485 and RS-422 communications.
The ADM3483 and ADM3488 can transmit and receive at data
rates up to 250kbps, and the ADM3485/ ADM3490 at up to
10Mbps. The ADM3488/ ADM3490 are full-duplex
transceivers, while the ADM3483/ADM3485 are half-duplex.
Driver Enable (DE) and Receiver Enable (RE) pins are included
on the ADM3483/ADM3485. When disabled, the driver and
receiver outputs are high impedance.
DEVICES WITH RECEIVER/DRIVER ENABLES
(ADM3483/ADM2485)
Inputs Outputs
RE DE DI B* A*
Mode
X 1 1 0 1 Normal
X 1 0 1 0 Normal
0 0 X High-Z High-Z Normal
1 0 X High-Z High-Z Shutdown
Table x. Transmitting Truth Table
Inputs Outputs
RE DE A,B RO
Mode
0 0* +0.2V 1 Normal
0 0* -0.2V 0 Normal
0 0* Inputs Open 1 Normal
1 0 x High-Z Shutdown
Table x. Rece iv ing Tr uth Table
DEVICES WITHOUT RECEIVER/DRIVER ENABLES
(ADM3488/ADM2490)
Input Outputs
DI Z Y
1 0 1
0 1 0
Table x. Transmitting Truth Table
Input Outputs
A,B RO
+0.2 0
-0.2 1
Inputs Open 1
Table x. Rece iv ing Tr uth Table
REDUCED EMI AND REFLECTIONS
(ADM3483/ ADM3488)
The ADM3483/ADM3488 are slew-rate limited, minimizing
EMI and reducing reflections caused by improperly terminated
cables.
LOW-POWER SHUTDOWN MODE
(ADM3483/ADM3485)
A low-power shutdown mode is initiated by bringing both RE
high and DE low. The devices will not shut down unless both
the driver and receiver are disabled (high impedance). In
shutdown, the devices typically draw only 2nA of supply
current. For these devices, the tPSH and tPSL enable times assume
the part was in the low-power shutdown mode; the tPZH and tPZL
enable times assume the receiver or driver was disabled, but the
part was not shut down.
DRIVER OUTPUT PROTECTION
Excessive output current and power dissipation caused by faults
or by bus contention are prevented by two methods. A foldback
current limit on the output stage provides immediate protection
against short circuits over the whole common-mode voltage
range (see Typical Performance Characteristics). In addition, a
thermal shutdown circuit forces the driver outputs into a high-
impedance state if the die temperature rises excessively.
PROPAGATION DELAY
Skew time is simply the difference between the low-to-high and
high-to-low propagation delay. Small driver/receiver skew times
help maintain a symmetrical mark-space ratio (50% duty cycle).
The receiver skew time, |tPRLH - tPRHL|, is under 10ns (20ns
for the ADM3483/ADM3488). The driver skew times are 8ns
for the ADM485/ADM3490, and typically under 100ns for the
ADM3483/ADM3488.
LINE LENGTH VS. DATA RATE
The RS-485/RS-422 standard covers line lengths up to 4000 feet.
For line lengths greater than 4000 feet, see Figure 13.
TYPICAL APPLICATIONS
The ADM3483, ADM3485, ADM3488 and ADM3490
transceivers are designed for bidirectional data communications
on multipoint bus transmission lines. Figures 11 and 12 show
typical network applications circuits. These parts can also be
used as line repeaters, with cable lengths longer than 4000 feet,
as shown in Figure 13. To minimize reflections, the line should
be terminated at both ends in its characteristic impedance, and
stub lengths off the main line should be kept as short as
possible. The slew-rate-limited ADM3483/ADM3488 are more
tolerant of imperfect termination.
Preliminary Technical Data ADM3483/ADM3485/ADM3488/ADM3490
Rev.PrD | Page 13 of 14
B
A
R
D
RO
RE
DI
DE
ADM3483/ADM3485
B
AR
D
RO
RE
DI
DE
MAXIMUM NUMBER OF TRANSCEIVERS ON BUS: 32
ADM3483/ADM3485
Figure 11. ADM3483/ADM3485 Typical RS-485 Network
ADM3488/ADM3490
B
A
R
D
RO
DI
Y
Z
RE
DE B
A
Y
Z
RO
DI
RE
DE
R
D
BAYZ
RD
RO DI
RE
DE
BAYZ
RD
RO DI
RE
DE
MAXIMUM NUMBER OF NODES: 32
MASTER SLAVE
SLAVE SLAVE
ADM3488/ADM3490
Figure 12. ADM3488/ADM3490 Full Duplex RS-485 Network
ADM3488/ADM3490
B
A
R
D
RO
DI Y
Z
RE
DE
DATA IN
DATA OUT
Figure 13. Line Repeater for ADM3488/ADM3490
ADM3483/ADM3485/ADM3488/ADM3490 Preliminary Technical Data
Rev.PrD | Page 14 of 14
OUTLINE DIMENSIONS
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) × 45°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
85
41
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2440)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 6. 8-Lead Standard Small Outline Package [SOIC]
(R-8)
Dimensions shown in millimeters
Figure 7. 8-Lead Lead Frame Chip Scale Package [LFCSP]
(CP-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Type Branding
ADM3483AR –40°C to +85°C R-8
ADM3483ACP –40°C to +85°C CP-8
ADM3485AR –40°C to +85°C R-8
ADM3485ACP –40°C to +85°C CP-8
ADM3488AR –40°C to +85°C R-8
ADM3490AR –40°C to +85°C R-8
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective companies.
Printed in the U.S.A.
PR05524-0-4/05(PrD)