IRU1175
1
Rev. 1.6
08/20/02 www.irf.com
7.5A ULTRA LOW DROPOUT POSITIVE
ADJUSTABLE REGULATOR
The IRU1175 is a 7.5A regulator with extremely low drop-
out voltage using a proprietary bipolar process that
achieves comparable equivalent on resistance to that of
discrete MOSFETs. This product is specifically designed
to provide well regulated supply for applications requir-
ing very low dropout such as 2.8V from 3.3V ATX power
supplies where the same efficiency as the switcher can
be achieved without the cost and complexity associ-
ated with switching regulators. One such application is
the new graphic chip sets that requires 2.7V supply such
as the Intel I740 chip set.
DESCRIPTION
0.5V Dropout at 7.5A (Equivalent of 67mV)
Fast Transient Response
1% Voltage Reference Initial Accuracy
Built-In Thermal Shutdown
APPLICATIONS
FEATURES
3.3V to 2.7V Intel I740 Chip Set
TYPICAL APPLICATION
PACKAGE ORDER INFORMATION
TJ (°C) 5-PIN PLASTIC 5-PIN PLASTIC 8-PIN PLASTIC
TO-263 (M) Ultra Thin-PakTM (P) SOIC (S)
0 To 125 IRU1175CM IRU1175CP IRU1175CS
Figure 1 - Typical application of IRU1175.
Data Sheet No. PD94131
3.3V
IRU1175 2.7V
C1
100uF
C3
100uF
5V
C2
10uF
R1
100
1%
R2
124
1%
1
2
3
4
5
V
SENSE
Adj
V
OUT
V
CTRL
V
IN
2Rev. 1.6
08/20/02
IRU1175
www.irf.com
ABSOLUTE MAXIMUM RATINGS
Input Voltage (VIN) .................................................... 6V
Control Input Voltage (VCTRL) ..................................... 14V
Power Dissipation ..................................................... Internally Limited
Storage Temperature Range ...................................... -65°C To 150°C
Operating Junction Temperature Range ..................... 0°C To 150°C
PACKAGE INFORMATION
5-PIN PLASTIC TO-263 (M) 5-PIN PLASTIC ULTRA THIN-PAKTM (P) 8-PIN PLASTIC SOIC (S)
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over CIN=1mF, COUT=10mF, and TJ=0 to 1258C.
Typical values refer to TJ=258C. VOUT=VSENSE.
uJA=35°C/W for 0.5" square pad uJA=35°C/W for 0.5" square pad uJA=55°C/W for 1" Sq pad area
V
SENSE
Adj
V
IN
V
CTRL
V
OUT
4
3
2
1
5
6
7
8
TOP VIEW
V
OUT
V
OUT
V
OUT
V
SENSE
Adj
V
OUT
V
CTRL
V
IN
FRONT VIEW
1
2
3
4
5
Tab is
VOUT
V
SENSE
Adj
V
OUT
V
CTRL
V
IN
FRONT VIEW
1
2
3
4
5
Tab is
VOUT
PARAMETER SYM TEST CONDITION MIN TYP MAX UNITS
Reference Voltage
Line Regulation
Load Regulation (Note 1)
Dropout Voltage (Note 2)
(VCTRL - VOUT)
Dropout Voltage (Note 2)
(VIN - VOUT)
Current Limit
Minimum Load Current (Note 3)
Thermal Regulation
Ripple Rejection
VCTRL=2.75, VIN=2V, Io=10mA,
TJ=258C, VADJ=0V
VCTRL=2.7 to 12V, VIN=2.05V to 5.5V,
Io=10mA to 7.5A, VADJ=0V
VCTRL=2.5V to 7V, VIN=1.75V to 5.5V,
Io=10mA, VADJ=0V
VCTRL=2.75V, VIN=2.1V,
Io=10mA to 7.5A, VADJ=0V
VADJ=0V for all conditions below:
VIN=2.05V, Io=1.5A
VIN=2.05V, Io=3A
VIN=2.05V, Io=5A
VIN=2.05V, Io=7.5A
VADJ=0V for all conditions below:
VCTRL=2.75V, Io=1.5A
VCTRL=2.75V, Io=3A
VCTRL=2.75V, Io=3A
VCTRL=2.75V, Io=7.5A
VCTRL=2.75V, VIN=2.05V,
DVo=100mV, VADJ=0V
VCTRL=5V, VIN=3.3V, VADJ=0V
30ms Pulse
VCTRL=5V, VIN=5V, Io=3A, VADJ=0V,
TJ=258C, VRIPPLE=1VPP at 120Hz
1.225
1.225
7.7
60
1.250
1.250
0.5
2
0.95
1.00
1.05
1.15
0.100
0.200
0.330
0.500
9
5
0.01
70
1.275
1.275
3
6
1.30
0.130
0.260
0.430
0.650
10
0.02
V
mV
mV
V
V
A
mA
%/W
dB
VREF
IRU1175
3
Rev. 1.6
08/20/02 www.irf.com
PIN DESCRIPTIONS
Note 1: Low duty cycle pulse testing with Kelvin con-
nections are required in order to maintain accurate data.
Note 2: Dropout voltage is defined as the minimum dif-
ferential between VIN and VOUT required to maintain regu-
lation at VOUT. It is measured when the output voltage
drops 1% below its nominal value.
Note 3: Minimum load current is defined as the mini-
mum current required at the output in order for the out-
put voltage to maintain regulation. Typically the resistor
dividers are selected such that it automatically main-
tains this current.
This pin is the positive side of the reference which allows remote load sensing to achieve
excellent load regulation.
A resistor divider from this pin to the VOUT pin and ground sets the output voltage.
The output of the regulator. A minimum of 10mF capacitor must be connected from this pin
to ground to insure stability.
This pin is the supply pin for the internal control circuitry as well as the base drive for the
pass transistor. This pin must always be higher than the VOUT pin in order for the device to
regulate. (See specifications)
The input pin of the regulator. Typically a large storage capacitor is connected from this
pin to ground to insure that the input voltage does not sag below the minimum drop out
voltage during the load transient response. This pin must always be higher than VOUT in
order for the device to regulate. (See specifications)
PIN # PIN SYMBOL PIN DESCRIPTION
1
2
3
4
5
VSENSE
Adj
VOUT
VCTRL
VIN
PARAMETER SYM TEST CONDITION MIN TYP MAX UNITS
Control Pin Current
Adjust Pin Current
VADJ=0V for all below conditions:
VCTRL=2.75V, VIN=2.05V, Io=1.5A
VCTRL=2.75V, VIN=2.05V, Io=3A
VCTRL=2.75V, VIN=2.05V, Io=5A
VCTRL=2.75V, VIN=2.05V, Io=7.5A
VCTRL=2.75V, VIN=2.05V, VADJ=0V
15
30
50
70
50 120
mA
mAIADJ
4Rev. 1.6
08/20/02
IRU1175
www.irf.com
APPLICATION INFORMATION
Introduction
The IRU1175 adjustable regulator is a five-terminal de-
vice designed specifically to provide extremely low drop-
out voltages comparable to the PNP type without the
disadvantage of the extra power dissipation due to the
base current associated with PNP regulators. This is
done by bringing out the control pin of the regulator that
provides the base current to the power NPN and con-
necting it to a voltage that is grater than the voltage present
at the VIN pin. This flexibility makes the IRU1175 ideal
for applications where dual inputs are available such as
a computer mother board with an ATX style power sup-
ply that provides 5V and 3.3V to the board. One such
application is the new graphic chip sets that require any-
where from 2.4V to 2.7V supply such as the Intel I740
chip set. The IRU1175 can easily be programmed with
the addition of two external resistors to any voltages
within the range of 1.25 to 5.5V. Another major require-
ment of these graphic chips is the need to switch the
load current from zero to several amps in tens of nano-
seconds at the processor pins, which translates to an
approximately 300 to 500ns of current step at the regu-
lator. In addition, the output voltage tolerances are also
extremely tight and they include the transient response
as part of the specification.
The IRU1175 is specifically designed to meet the fast
current transient needs as well as providing an accurate
initial voltage, reducing the overall system cost with the
need for fewer number of output capacitors. Another fea-
ture of the device is its true remote sensing capability
which allows accurate voltage setting at the load rather
than at the device.
Output Voltage Setting
The IRU1175 can be programmed to any voltages in the
range of 1.25V to 5.5V with the addition of R1 and R2
external resistors according to the following formula:
Figure 3 - Typical application of the IRU1175
for programming the output voltage.
BLOCK DIAGRAM
Figure 2 - Simplified block diagram of the IRU1175.
Where:
VREF = 1.25V Typically
IADJ = 50mA Typically
R1 & R2 as shown in Figure 3:
V
CTRL
V
IN
V
SENSE
Adj
V
OUT
THERMAL
SHUTDOWN
CURRENT
LIMIT
1.25V
+
+
5
4
3
1
2
V
OUT
R1
R2
V
IN
V
CTRL
VREF
IADJ = 50uA
IRU1175
VSENSE
Adj
VOUT
VCTRL
VIN
VOUT = VREF3 1+ +IADJ3R2
R2
R1
( )
IRU1175
5
Rev. 1.6
08/20/02 www.irf.com
VOUT = 2.7V
VIN = 3.3V
VCTRL = 5V
IOUT = 2A (DC Avg)
R1
R2
V
IN
V
CTRL RL
IRU1175
VSENSE
Adj
VOUT
VCTRL
VIN
For most applications a minimum of 100mF aluminum
electrolytic capacitor such as Sanyo, MVGX series,
Panasonic FA series as well as the Nichicon PL series
insures both stability and good transient response.
Thermal Design
The IRU1175 incorporates an internal thermal shutdown
that protects the device when the junction temperature
exceeds the allowable maximum junction temperature.
Although this device can operate with junction tempera-
tures in the range of 1508C, it is recommended that the
selected heat sink be chosen such that during maxi-
mum continuous load operation the junction tempera-
ture is kept below this number. The example below
shows the steps in selecting the proper surface mount
package.
Assuming, the following conditions:
Calculate the maximum power dissipation using the fol-
lowing equation:
Using table below select the proper package and the
amount of copper board needed.
Pkg Copper θJA(°C/W) Max Pd Max Pd
Area (TA=25°C) (TA=45°C)
TO-263 1.4"x1.4" 25 4.4W 3.6W
TO-263 1.0"x1.0" 30 3.7W 3.0W
TO-263 0.7"x0.7" 35 3.1W 2.6W
TO-263 Pad Size 45 2.4W 2.0W
SOIC 1.0"x1.0" 55 2.0W 1.63W
Note: Above table is based on the maximum junction
temperature of 1358C.
As shown in the above table, any of the two packages
will do the job. For low cost applications the SOIC 8-pin
package is recommended.
The IRU1175 keeps a constant 1.25V between the VSENSE
pin and the VADJ pin. By placing a resistor R1 across
these two pins and connecting the VSENSE and VOUT pin
together, a constant current flows through R1, adding to
the IADJ current and into the R2 resistor producing a volt-
age equal to the (1.25/R1)3R2 + IADJ3R2. This voltage
is then added to the 1.25V to set the output voltage.
This is summarized in the above equation. Since the
minimum load current requirement of the IRU1175 is
10mA, R1 is typically selected to be a 121V resistor so
that it automatically satisfies this condition. Notice that
since the IADJ is typically in the range of 50mA it adds a
small error to the output voltage and should be consid-
ered when very precise output voltage setting is required.
Load Regulation
Since the IRU1175 has separate pins for the output (VOUT)
and the sense (VSENSE), it is ideal for providing true re-
mote sensing of the output voltage at the load. This
means that the voltage drops due to parasitic resistance
such as PCB traces between the regulator and the load
are compensated for using remote sensing. Figure 4
shows a typical application of the IRU1175 with remote
sensing.
Figure 4 - Schematic showing connection
for best load regulation.
Stability
The IRU1175 requires the use of an output capacitor as
part of the frequency compensation in order to make the
regulator stable. Typical designs for the microproces-
sor applications use standard electrolytic capacitors with
typical ESR in the range of 50 to 100mV and an output
capacitance of 500 to 1000mF. Fortunately as the ca-
pacitance increases, the ESR decreases resulting in a
fixed RC time constant. The IRU1175 takes advantage
of this phenomena in making the overall regulator loop
stable.
PD = 23(3.3 - 2.7)+ 3(5 - 2.7) = 1.28W
PD = IOUT3(VIN - VOUT)+ 3(VCTRL - VOUT)
2
60
( )
IOUT
60
( )
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information
Data and specifications subject to change without notice. 02/01
6Rev. 1.6
08/20/02
IRU1175
www.irf.com
(M) TO-263 Package
5-Pin
SYMBOL
A
B
C
D
E
G
H
K
L
M
N
P
R
S
U
V
MIN
10.05
8.28
4.31
0.66
1.14
1.575
14.605
1.143
0.00
2.49
0.33
2.286
08
1.143
MAX
10.668
9.169
4.597
0.91
1.40
1.829
15.875
1.68
0.305
2.74
0.58
2.794
88
2.67
6.50 REF
7.75 REF
NOTE: ALL MEASUREMENTS
ARE IN MILLIMETERS.
GD
A E
M
L
N
U
C
B
K
P
V
R
S
H
C
L
IRU1175
7
Rev. 1.6
08/20/02 www.irf.com
(P) Ultra Thin-PakTM
5-Pin
NOTE: ALL MEASUREMENTS
ARE IN MILLIMETERS.
SYMBOL
A
A1
B
C
D
E
G
H
K
L
M
N
P
R
U
V
MIN
9.27
8.89
7.87
1.78
0.63
10.41
0.76
0.03
0.89
0.79
38
MAX
9.52
9.14
8.13
2.03
0.79
10.67
1.27
0.13
1.14
1.04
68
0.25 NOM
1.72
0.25
5.59 NOM
7.49 NOM
A
E
M
L
N
U
C
B
K
P
V
H
GD
R
L
C
A1
8Rev. 1.6
08/20/02
IRU1175
www.irf.com
(S) SOIC Package
8-Pin Surface Mount, Narrow Body
SYMBOL
A
B
C
D
E
F
G
H
I
J
K
L
T
MIN
4.80
0.36
3.81
1.52
0.10
0.19
5.80
08
0.41
1.37
MAX
4.98
0.46
3.99
1.72
0.25
0.25
6.20
88
1.27
1.57
1.27 BSC
0.53 REF
78 BSC
8-PIN
NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS.
PIN NO. 1
I
K
H
DETAIL-A
DETAIL-A
0.38
6
0.015 x 45
8
T
G
F
D
A
BC
E
L
J
IRU1175
9
Rev. 1.6
08/20/02 www.irf.com
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information
Data and specifications subject to change without notice. 02/01
PKG
DESIG
M
P
S
PACKAGE
DESCRIPTION
TO-263
Ultra Thin-PakTM
SOIC, Narrow Body
PARTS
PER TUBE
50
75
95
PARTS
PER REEL
750
2500
2500
PACKAGE SHIPMENT METHOD
PIN
COUNT
5
5
8
T & R
Orientation
Fig A
Fig B
Fig C
Feed Direction
Figure A Feed Direction
Figure B
Feed Direction
Figure C
111 11 1
1 11
