(1) The common terminal is in electrical contact with the mounting base.
OUTPUT
COMMON
INPUT
COMMON
KTT PACKAGE
(TOP VIEW)
(1)
OUTPUT
COMMON
INPUT
KCS PACKAGE
(TOP VIEW)
(1)
OUTPUT
COMMON
INPUT
COMMON
KVU PACKAGE
(TOP VIEW)
(1)
TL750M SERIES
www.ti.com
SLVS021N –JANUARY 1988–REVISED AUGUST 2010
LOW-DROPOUT VOLTAGE REGULATORS
Check for Samples: TL750M SERIES
1FEATURES
• Low Dropout Voltage, Less Than 0.6 V at 750 • Overvoltage Protection
mA • Internal Thermal-Overload Protection
• Low Quiescent Current • Internal Overcurrent-Limiting Circuitry
• 60-V Load-Dump Protection
DESCRIPTION/ORDERING INFORMATION
The TL750M series devices are low-dropout positive voltage regulators specifically designed for battery-powered
systems. The TL750M devices incorporate onboard overvoltage and current-limiting protection circuitry to protect
the devices and the regulated system. The devices are fully protected against 60-V load-dump and
reverse-battery conditions. Extremely low quiescent current, even during full-load conditions, makes the TL750M
series ideal for standby power systems.
The TL750M offers 5-V, 8-V, 10-V, and 12-V options. The devices are characterized for operation over the virtual
junction temperature range 0°C to 125°C.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright © 1988–2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Bandgap
Current
Limiting
_
+
Overvoltage/
Thermal
Shutdown
OUTPUT
COMMON
INPUT
28 V
TL750M SERIES
SLVS021N –JANUARY 1988–REVISED AUGUST 2010
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION(1)
ORDERABLE
TJVOTYP PACKAGE(2) TOP-SIDE MARKING
PART NUMBER
PowerFLEX™ – KVU Reel of 3000 TL750M05CKVUR 750M05C
5 V TO-220 – KCS Tube of 50 TL750M05CKCS TL750M05C
TO-263 – KTT Reel of 500 TL750M05CKTTR TL750M05C
TO-220 – KCS Tube of 50 TL750M08CKCS TL750M08C
8 V
0°C to 125°C PowerFLEX – KVU Reel of 3000 TL750M08CKVUR 750M08C
TO-220 – KCS Tube of 50 TL750M10CKCS TL750M10C
10 V PowerFLEX – KVU Reel of 3000 TL750M10CKVUR 750M10C
TO-220 – KCS Tube of 50 TL750M12CKCS TL750M12C
12 V PowerFLEX – KVU Reel of 3000 TL750M12CKVUR 750M12C
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
FUNCTIONAL BLOCK DIAGRAM
2Submit Documentation Feedback Copyright © 1988–2010, Texas Instruments Incorporated
TL750M SERIES
www.ti.com
SLVS021N –JANUARY 1988–REVISED AUGUST 2010
ABSOLUTE MAXIMUM RATINGS(1)
over virtual junction temperature range (unless otherwise noted) MIN MAX UNIT
Continuous input voltage 26 V
Transient input voltage (see Figure 3) 60 V
Continuous reverse input voltage –15 V
Transient reverse input voltage t = 100 ms –50 V
KCS package 22
qJA Package thermal impedance(2) (3) KTT package 25.3 °C/W
KVU package 28
TJVirtual-junction temperature range 0 150 °C
Tstg Storage temperature range –65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Maximum power dissipation is a function of TJ(max), qJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD= (TJ(max) – TA)/qJA. Operating at the absolute maximum TJof 150°C can affect reliability. Due to variation in
individual device electrical characteristics and thermal resistance, the built-in thermal-overload protection may be activated at power
levels slightly above or below the rated dissipation.
(3) The package thermal impedance is calculated in accordance with JESD 51.
THERMAL INFORMATION TL750M
THERMAL METRIC(1)(2) UNITS
KCS (3 PINS) KVU (3 PINS) KTT (3 PINS)
qJA Junction-to-ambient thermal resistance 28.7 50.9 27.5
qJCtop Junction-to-case (top) thermal resistance 59.8 57.9 43.2
qJB Junction-to-board thermal resistance 0.5 34.8 17.3 °C/W
yJT Junction-to-top characterization parameter 5.3 6 2.8
yJB Junction-to-board characterization parameter 0.4 23.7 9.3
qJCbot Junction-to-case (bottom) thermal resistance 0.1 0.4 0.3
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.
RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT
TL750M05 6 26
TL750M08 9 26
VIInput voltage V
TL750M10 11 26
TL750M12 13 26
IOOutput current 750 mA
TJOperating virtual-junction temperature 0 125 °C
Copyright © 1988–2010, Texas Instruments Incorporated Submit Documentation Feedback 3
TL750M SERIES
SLVS021N –JANUARY 1988–REVISED AUGUST 2010
www.ti.com
TL750M05 ELECTRICAL CHARACTERISTICS(1)
VI= 14 V, IO= 300 mA, TJ= 25°C (unless otherwise noted) TL750M05
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX
4.95 5 5.05
Output voltage V
TJ= 0°C to 125°C 4.9 5.1
VI= 9 V to 16 V, IO= 250 mA 10 25
Input voltage regulation mV
VI= 6 V to 26 V, IO= 250 mA 12 50
Ripple rejection VI= 8 V to 18 V, f = 120 Hz 50 55 dB
Output regulation voltage IO= 5 mA to 750 mA 20 50 mV
IO= 500 mA 0.5
Dropout voltage V
IO= 750 mA 0.6
Output noise voltage f = 10 Hz to 100 kHz 500 mV
IO= 750 mA 60 75
Bias current mA
IO= 10 mA 5
(1) Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be
taken into account separately. All characteristics are measured with a 0.1-mF capacitor across the input and a 10-mF tantalum capacitor
on the output, with equivalent series resistance within the guidelines shown in Figure 1.
TL750M08 ELECTRICAL CHARACTERISTICS(1)
VI= 14 V, IO= 300 mA, TJ= 25°C (unless otherwise noted) TL750M08
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX
7.92 8 8.08
Output voltage V
TJ= 0°C to 125°C 7.84 8.16
VI= 10 V to 17 V, IO= 250 mA 12 40
Input voltage regulation mV
VI= 9 V to 26 V, IO= 250 mA 15 68
Ripple rejection VI= 11 V to 21 V, f = 120 Hz 50 55 dB
Output regulation voltage IO= 5 mA to 750 mA 24 80 mV
IO= 500 mA 0.5
Dropout voltage V
IO= 750 mA 0.6
Output noise voltage f = 10 Hz to 100 kHz 500 mV
IO= 750 mA 60 75
Bias current mA
IO= 10 mA 5
(1) Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be
taken into account separately. All characteristics are measured with a 0.1-mF capacitor across the input and a 10-mF tantalum capacitor
on the output, with equivalent series resistance within the guidelines shown in Figure 1.
4Submit Documentation Feedback Copyright © 1988–2010, Texas Instruments Incorporated
TL750M SERIES
www.ti.com
SLVS021N –JANUARY 1988–REVISED AUGUST 2010
TL750M10 ELECTRICAL CHARACTERISTICS(1)
VI= 14 V, IO= 300 mA, TJ= 25°C (unless otherwise noted) TL750M10
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX
9.9 10 10.1
Output voltage V
TJ= 0°C to 125°C 9.8 10.2
VI= 12 V to 18 V, IO= 250 mA 15 43
Input voltage regulation mV
VI= 11 V to 26 V, IO= 250 mA 20 75
Ripple rejection VI= 13 V to 23 V, f = 120 Hz 50 55 dB
Output regulation voltage IO= 5 mA to 750 mA 30 100 mV
IO= 500 mA 0.5
Dropout voltage V
IO= 750 mA 0.6
Output noise voltage f = 10 Hz to 100 kHz 1000 mV
IO= 750 mA 60 75
Bias current mA
IO= 10 mA 5
(1) Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be
taken into account separately. All characteristics are measured with a 0.1-mF capacitor across the input and a 10-mF tantalum capacitor
on the output, with equivalent series resistance within the guidelines shown in Figure 1.
TL750M12 ELECTRICAL CHARACTERISTICS(1)
VI= 14 V, IO= 300 mA, TJ= 25°C (unless otherwise noted) TL750M12
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX
11.88 12 12.12
Output voltage V
TJ= 0°C to 125°C 11.76 12.24
VI= 14 V to 19 V, IO= 250 mA 15 43
Input voltage regulation mV
VI= 13 V to 26 V, IO= 250 mA 20 78
Ripple rejection VI= 13 V to 23 V, f = 120 Hz 50 55 dB
Output regulation voltage IO= 5 mA to 750 mA 30 120 mV
IO= 500 mA 0.5
Dropout voltage V
IO= 750 mA 0.6
Output noise voltage f = 10 Hz to 100 kHz 1000 mV
IO= 750 mA 60 75
Bias current mA
IO= 10 mA 5
(1) Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be
taken into account separately. All characteristics are measured with a 0.1-mF capacitor across the input and a 10-mF tantalum capacitor
on the output, with equivalent series resistance within the guidelines shown in Figure 1.
Copyright © 1988–2010, Texas Instruments Incorporated Submit Documentation Feedback 5
Applied Load
Current
Load
Voltage
∆VL
∆IL
∆VL = ∆IL × ESR
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
0 1 2 3 4 54.53.52.51.50.5
0
0.01
0.015
0.02
0.025
0.03
0.035
0.04
ÏÏÏ
ÏÏÏ
ÏÏÏ
200 µF
ÏÏÏ
ÏÏÏ
ÏÏÏ
1000 µF
1/ESR
0.005
ÏÏÏ
ÏÏÏ
ÏÏÏ
400 µF
Not Recommended
Recommended Min ESR
Potential Instability
Region of
Best Stability
ÏÏÏ
ÏÏÏ
ÏÏÏ
ÏÏÏ
100 µF
ÏÏÏ
ÏÏÏ
ÏÏÏ
ÏÏÏ
22 µF
ÏÏÏ
ÏÏÏ
ÏÏÏ
ÏÏÏ
10 µF
ÎÎ
ÎÎ
ÎÎ
CL
Stability −
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
Max ESR Boundary
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
Region of Best Stability
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
Min ESR
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
Boundary
3
2.8
2.6
2.4
2.2
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
00.10 0.2 0.3 0.4 0.5
IL − Load Current Range − A
This Region Not
Recommended for
Operation
CL = 10 µF
CI = 0.1 µF
f = 120 Hz
ÏÏÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏÏÏ
Potential Instability Region
Equivalent Series Resistance (ESR) − Ω
TL750M SERIES
SLVS021N –JANUARY 1988–REVISED AUGUST 2010
www.ti.com
PARAMETER MEASUREMENT INFORMATION
The TL750Mxx is a low-dropout regulator. This means that the capacitance loading is important to the
performance of the regulator because it is a vital part of the control loop. The capacitor value and the equivalent
series resistance (ESR) both affect the control loop and must be defined for the load range and the temperature
range. Figure 1 and Figure 2 can establish the capacitance value and ESR range for the best regulator
performance.
Figure 1 shows the recommended range of ESR for a given load with a 10-mF capacitor on the output. This
figure also shows a maximum ESR limit of 2 Ωand a load-dependent minimum ESR limit.
For applications with varying loads, the lightest load condition should be chosen because it is the worst case.
Figure 2 shows the relationship of the reciprocal of ESR to the square root of the capacitance with a minimum
capacitance limit of 10 mF and a maximum ESR limit of 2 Ω. This figure establishes the amount that the minimum
ESR limit shown in Figure 1 can be adjusted for different capacitor values.
For example, where the minimum load needed is 200 mA, Figure 1 suggests an ESR range of 0.8 Ωto2Ωfor
10 mF. Figure 2 shows that changing the capacitor from 10 mF to 400 mF can change the ESR minimum by
greater than 3/0.5 (or 6). Therefore, the new minimum ESR value is 0.8/6 (or 0.13 Ω). This allows an ESR range
of 0.13 Ωto2Ω, achieving an expanded ESR range by using a larger capacitor at the output. For better stability
in low-current applications, a small resistance placed in series with the capacitor (see Table 1) is recommended,
so that ESRs better approximate those shown in Figure 1 and Figure 2.
Table 1. Compensation for Increased Stability at Low Currents
MANUFACTUR ESR PART ADDITIONAL
CAPACITANCE
ER TYP NUMBER RESISTANCE
<br/>
AVX 15 mF 0.9 ΩTAJB156M010S 1 Ω
<br/>
<br/> T491D336M010
KEMET 33 mF 0.6 Ω0.5 Ω
AS
<br/>
OUTPUT CAPACITOR <br/>
EQUIVALENT SERIES RESISTANCE (ESR) STABILITY
vs vs
LOAD CURRENT RANGE EQUIVALENT SERIES RESISTANCE (ESR)
Figure 1. Figure 2.
6Submit Documentation Feedback Copyright © 1988–2010, Texas Instruments Incorporated
30
20
0 100 200
40
60
300 400 500 600
I
V − Transient Input Voltage − V
0
10
50
TJ = 25°C
VI = 14 V + 46e(−t/0.230)
for t ≥ 5 ms
t − Time − ms
tr = 1 ms
8
4
2
00 2 4 6 8 10
− Output Voltage − V
12
14
12 14
10
6
VO
VI − Input Voltage − V
IO = 10 mA
TJ = 25°CTL750M12
TL750M10
TL750M08
TL750M05
TL750M SERIES
www.ti.com
SLVS021N –JANUARY 1988–REVISED AUGUST 2010
TYPICAL CHARACTERISTICS
Table 2. Table of Graphs
FIGURE
Transient input voltage vs Time 3
Output voltage vs Input voltage 4
IO= 10 mA 5
Input current vs Input voltage IO= 100 mA 6
Dropout voltage vs Output current 7
Quiescent voltage vs Output current 8
Load transient response 9
Line transient response 10
TRANSIENT INPUT VOLTAGE OUTPUT VOLTAGE
vs vs
TIME INPUT VOLTAGE
Figure 3. Figure 4.
Copyright © 1988–2010, Texas Instruments Incorporated Submit Documentation Feedback 7
80
40
20
00 2 4 6 8 10
120
140
12 14
100
60
180
200
160
− Input Current − mAII
VI − Input Voltage − V
IO = 10 mA
TJ = 25°C
TL750M05
TL750M08
TL750M10
TL750M12
200
100
50
00 2 4 6 8 10
300
350
12 14
250
150
VI − Input Voltage − V
IO = 100 mA
TJ = 25°C
− Input Current − mAII
TL750M05
TL750M08
TL750M10
TL750M12
200
150
125
100
0 50 100 150 200 250
250
300
225
175
75
50
IO − Output Current − mA
TJ = 25°C
Dropout Voltage − mV
12
8
6
4
0 20 40 60 80 100 150
10
2
0
IO − Output Current − mA
TJ = 25°C
VI = 14 V
− Quiescent Current − mA
250 350
IQ
TL750M SERIES
SLVS021N –JANUARY 1988–REVISED AUGUST 2010
www.ti.com
INPUT CURRENT INPUT CURRENT
vs vs
INPUT VOLTAGE INPUT VOLTAGE
Figure 5. Figure 6.
DROPOUT VOLTAGE QUIESCENT CURRENT
vs vs
OUTPUT CURRENT OUTPUT CURRENT
Figure 7. Figure 8.
8Submit Documentation Feedback Copyright © 1988–2010, Texas Instruments Incorporated
200
0
− 100
− 200
0 50 100 150 200 250
100
150
100
t − Time − µs
− Output Current − mA
300 350
IO
50
0
VI(NOM) = VO + 1 V
ESR = 2
CL = 10 µF
TJ = 25°C
− Output Voltage − mVVO
0 20 40 60 80 100 150 250 350
− Output Voltage − mVVO20 mV/DIV1 V/DIV
− Input Voltage − VVIN
t − Time − µs
VI(NOM) = VO + 1 V
ESR = 2
IL = 20 mA
CL = 10 µF
TJ = 25°C
TL750M SERIES
www.ti.com
SLVS021N –JANUARY 1988–REVISED AUGUST 2010
LOAD TRANSIENT RESPONSE LINE TRANSIENT RESPONSE
Figure 9. Figure 10.
Copyright © 1988–2010, Texas Instruments Incorporated Submit Documentation Feedback 9
PACKAGE OPTION ADDENDUM
www.ti.com 21-Apr-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TL750M05CKC OBSOLETE TO-220 KC 3 TBD Call TI Call TI
TL750M05CKCE3 OBSOLETE TO-220 KC 3 TBD Call TI Call TI
TL750M05CKCSE3 ACTIVE TO-220 KCS 3 50 Pb-Free (RoHS) CU SN N / A for Pkg Type
TL750M05CKTER OBSOLETE PFM KTE 3 TBD Call TI Call TI
TL750M05CKTPR OBSOLETE PFM KTP 2 TBD Call TI Call TI
TL750M05CKTPRG3 OBSOLETE PFM KTP 2 TBD Call TI Call TI
TL750M05CKTTR ACTIVE DDPAK/
TO-263 KTT 3 500 Green (RoHS
& no Sb/Br) CU SN Level-3-245C-168 HR
TL750M05CKTTRG3 ACTIVE DDPAK/
TO-263 KTT 3 500 Green (RoHS
& no Sb/Br) CU SN Level-3-245C-168 HR
TL750M05CKVURG3 ACTIVE PFM KVU 3 2500 Green (RoHS
& no Sb/Br) CU SN Level-3-260C-168 HR
TL750M08CKCE3 OBSOLETE TO-220 KC 3 TBD Call TI Call TI
TL750M08CKCSE3 ACTIVE TO-220 KCS 3 50 Pb-Free (RoHS) CU SN N / A for Pkg Type
TL750M08CKTPRG3 OBSOLETE PFM KTP 2 TBD Call TI Call TI
TL750M08CKVURG3 ACTIVE PFM KVU 3 2500 Green (RoHS
& no Sb/Br) CU SN Level-3-260C-168 HR
TL750M10CKC OBSOLETE TO-220 KC 3 TBD Call TI Call TI
TL750M10CKCE3 OBSOLETE TO-220 KC 3 TBD Call TI Call TI
TL750M10CKCSE3 ACTIVE TO-220 KCS 3 50 Pb-Free (RoHS) CU SN N / A for Pkg Type
TL750M10CKTER OBSOLETE PFM KTE 3 TBD Call TI Call TI
TL750M10CKTPR OBSOLETE PFM KTP 2 TBD Call TI Call TI
TL750M10CKTPRG3 OBSOLETE PFM KTP 2 TBD Call TI Call TI
TL750M10CKVURG3 ACTIVE PFM KVU 3 2500 Green (RoHS
& no Sb/Br) CU SN Level-3-260C-168 HR
TL750M12CKC OBSOLETE TO-220 KC 3 TBD Call TI Call TI
TL750M12CKCE3 OBSOLETE TO-220 KC 3 TBD Call TI Call TI
TL750M12CKCSE3 ACTIVE TO-220 KCS 3 50 Pb-Free (RoHS) CU SN N / A for Pkg Type
TL750M12CKTPRG3 OBSOLETE PFM KTP 2 TBD Call TI Call TI
TL750M12CKVURG3 ACTIVE PFM KVU 3 2500 Green (RoHS
& no Sb/Br) CU SN Level-3-260C-168 HR
PACKAGE OPTION ADDENDUM
www.ti.com 21-Apr-2012
Addendum-Page 2
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TL750M05, TL750M08, TL750M12 :
•Automotive: TL750M05-Q1, TL750M08-Q1, TL750M12-Q1
NOTE: Qualified Version Definitions:
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TL750M05CKTTR DDPAK/
TO-263 KTT 3 500 330.0 24.4 10.6 15.8 4.9 16.0 24.0 Q2
TL750M05CKVURG3 PFM KVU 3 2500 330.0 16.4 6.9 10.5 2.7 8.0 16.0 Q2
TL750M08CKVURG3 PFM KVU 3 2500 330.0 16.4 6.9 10.5 2.7 8.0 16.0 Q2
TL750M10CKVURG3 PFM KVU 3 2500 330.0 16.4 6.9 10.5 2.7 8.0 16.0 Q2
TL750M12CKVURG3 PFM KVU 3 2500 330.0 16.4 6.9 10.5 2.7 8.0 16.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Apr-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TL750M05CKTTR DDPAK/TO-263 KTT 3 500 340.0 340.0 38.0
TL750M05CKVURG3 PFM KVU 3 2500 340.0 340.0 38.0
TL750M08CKVURG3 PFM KVU 3 2500 340.0 340.0 38.0
TL750M10CKVURG3 PFM KVU 3 2500 340.0 340.0 38.0
TL750M12CKVURG3 PFM KVU 3 2500 340.0 340.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Apr-2012
Pack Materials-Page 2
MECHANICAL DATA
MPFM001E – OCTOBER 1994 – REVISED JANUARY 2001
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
KTE (R-PSFM-G3) PowerFLEX PLASTIC FLANGE-MOUNT
0.360 (9,14)
0.350 (8,89)
0.080 (2,03)
0.070 (1,78)
0.010 (0,25) NOM
0.040 (1,02)
Seating Plane
0.050 (1,27)
0.001 (0,03)
0.005 (0,13)
0.010 (0,25)
NOM
Gage Plane
0.010 (0,25)
0.031 (0,79)
0.041 (1,04)
4073375/F 12/00
NOM
3
1
0.350 (8,89)
0.220 (5,59)
0.360 (9,14)
0.295 (7,49)
NOM 0.320 (8,13)
0.310 (7,87)
0.025 (0,63)
0.031 (0,79)
Thermal Tab
(See Note C)
0.004 (0,10)
M
0.010 (0,25)
0.100 (2,54)
3°–6°
0.410 (10,41)
0.420 (10,67)
0.200 (5,08)
0.365 (9,27)
0.375 (9,52)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. The center lead is in electrical contact with the thermal tab.
D. Dimensions do not include mold protrusions, not to exceed 0.006 (0,15).
E. Falls within JEDEC MO-169
PowerFLEX is a trademark of Texas Instruments.
MECHANICAL DATA
MPSF001F – JANUARY 1996 – REVISED JANUARY 2002
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
KTP (R-PSFM-G2) PowerFLEX PLASTIC FLANGE-MOUNT PACKAGE
0.228 (5,79)
0.218 (5,54)
0.233 (5,91)
0.243 (6,17)
0.001 (0,02)
0.005 (0,13)
0.070 (1,78)
Seating Plane
0.080 (2,03)
0.010 (0,25) NOM
Gage Plane
0.010 (0,25)
4073388/M 01/02
0.037 (0,94)
0.047 (1,19)
0.247 (6,27)
0.237 (6,02)
NOM
0.215 (5,46)
0.371 (9,42)
0.381 (9,68)
0.090 (2,29)
0.100 (2,54)
0.287 (7,29)
0.031 (0,79)
0.032 (0,81) MAX
0.277 (7,03)
0.025 (0,63)
0.130 (3,30) NOM
0.090 (2,29)
0.180 (4,57) M
0.010 (0,25)
0.004 (0,10)
2°–ā6°
0.040 (1,02)
0.050 (1,27)
Thermal Tab
(See Note C)
0.010 (0,25) NOM
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. The center lead is in electrical contact with the thermal tab.
D. Dimensions do not include mold protrusions, not to exceed 0.006 (0,15).
E. Falls within JEDEC TO-252 variation AC.
PowerFLEX is a trademark of Texas Instruments.
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