FUJITSU MICROELECTRONICS
DATA SHEET
Copyright©2001-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2008.11
For the information for microcontroller supports, see the following web site.
http://edevice.fujitsu.com/micom/en-support/
8-bit Proprietary Microcontroller
CMOS
F2MC-8L MB89130/130A Series
MB89131/P131/133A/P133A/135A/
MB89P135A/PV130A
DESCRIPTION
The MB89130/1 30A series has been develope d as a gene ral-purpose version of t he F2MC*-8L family consisting
of proprietary 8-bit, single-chip microcontrollers.
In addition to a compact instruction set, the microcontrollers contain a great variety of peripheral functions such
as timers, a serial interface, an A/D converter, and external interrupts. The MB89130A series also include a
remote contr ol transmitting output and wake-up interrupt function .
* : F2MC is the abbreviation of FUJITSU Flexible Microcontroller.
FEATURES
•F
2MC-8L family CPU core
Low-voltage operatio n (when an A/D converter is not used)
Low current consum ption (applicable to the dual-clo ck system)
Minimum execution time : 0.95 µs at 4.2 MHz
21-bit timebase timer
I/O ports : max. 36 ports
External interrupt 1 : 3 channels
External interrupt 2 (wake-up function) : 8 channels (only for the MB89130A series)
8-bit serial I/O : 1 channel (Continued)
DS07-12510-11E
MB89130/130A Series
2DS07-12510-11E
(Continued)
8/16-bit timer/counter : 1 channel
8-bit A/D converter : 4 channels
Remote control transmitting frequency generator (for the MB89130 A series only)
Low-power consumption modes (stop, sleep, and watch mode)
QFP-48 package, SH-DIP-48 package
CMOS technology
MB89130/130A Series
DS07-12510-11E 3
PRODUCT LINEUP
* : Varies with conditions such as th e operating frequency. (See “ ELECTRICAL CHARACTERISTICS”.)
(Continued)
Part number MB89131 MB89133A MB89135A MB89P133A MB89P131
Item
Classification Mass-produced products
(mask ROM products) One-time PROM products
ROM size 4 K × 8 bits
(internal mask
ROM)
8 K × 8 bits
(internal mask
ROM)
16 K × 8 bits
(internal mask
ROM)
8 K × 8 bits
(internal PROM,
to be
programmed
with general-
purpose EPROM
programmer)
4 K × 8 bits
(internal PROM,
to be
programmed
with general-
purpose EPROM
programmer)
RAM size 128 × 8 bits 256 × 8 bits 128 × 8 bits
CPU functions
The number of inst ructions :
Instruction bit length :
Instructio n length :
Data bit length :
Minimum execution time :
Minimum interrupt processing time :
136
8 bits
1 to 3 bytes
1, 8, 16 bits
0.95 µs at 4.2 MHz
8.57 µs at 4.2 MHz
Ports
Output ports (N-ch open-drain
ports) :
Output ports (CMO S) :
I/O ports (CMOS) :
Total :
4 (All also serve as peripherals.)
8
24 (8 ports also serve as peripherals. For
MB89130A, 16 ports also serve as.)
36
8/16-bit timer /
counter 8-bit timer/counter × 2 channels or a 16-bit event counte r
8-bit serial I/O 8 bits
LSB/MSB first selectable
8-bit A/D converter
8-bit resolution × 4 channels
A/D conversion mode (minimum conversion time : 42 µs at 4.2 MHz)
Sense mode (minimum conversio n time : 11.4 µs at 4.2 MHz)
Capable of continuous activation by an internal timer
Reference voltage input
External interrupt 1
3 independent cha nnels (edge selection , interrupt vect or, source flag)
Rising/falling both edges selectable
Used also for wake-up from stop /sle ep mode. (Edg e dete ct ion is also permit t ed in the stop
mode.)
External interrupt 2
(wake-up function) 8 channels (only for level detection)
Remote control
transmitting gener-
ator 1 channel
(Pulse width and cycle selectable by program)
Standby mode Sleep, stop, and watch mode
Process CMOS
Operating voltage* 2.2 to 4.0 V (with the dual-clock option)
2.2 to 6.0 V (with the single-clock option) 2.7 V to 6. 0 V
MB89130/130A Series
4DS07-12510-11E
(Continued)
Part number MB89P135 MB89PV130A
Item
Classification One-time PROM products Piggyback/evaluation product
ROM size 16 K × 8 bits
(internal PROM, to be programmed with
general-purpo se EPROM programmer)
32 K × 8 bits
(external ROM)
RAM size 512 × 8 bits 1 K × 8 bits
CPU functions
The number of inst ructions
Instruction bit length
Instruction length
Data bit length
Minimum execution time
Minimum interrupt processing time
: 136
: 8 bits
: 1 to 3 bytes
: 1, 8, 16 bits
: 0.95 µs at 4.2 MHz
: 8.57 µs at 4.2 MHz
Ports
Output ports (N-ch open -drain ports)
Output ports (CMOS)
I/O ports (CMOS)
Total
: 4 (All also serve as peripherals.)
: 8
: 24 (8 ports also serve as peripherals. For
MB89130A, 16 ports also serve as
peripherals.)
: 36
8/16-bit timer /
counter 8-bit timer/count er × 2 channels or a 16-bit event counter
8-bit serial I/O 8 bits
LSB/MSB first selectable
8-bit A/D converter
8-bit resolution × 4 channels
A/D conversion mode (minimum conversion time : 42 µs at 4.2 MHz)
Sense mode (minimum conversion time : 11.4 µs at 4.2 MHz)
Capable of continuous activation by an internal timer
Reference voltage input
External interrupt 1
3 independent channels (selectable edge, interrupt vector, source flag)
Rising/falling both edges selectable
Used also for wake-up from the stop/sleep mode. (Edge det ection is also permitted in the
stop mode.)
External interrupt 2
(wake-up function) 8 channels (only for level detection)
Remote control
transmitting
frequency
generator
1 channel
(Pulse width and cycle selectable by program)
Standby mode Sleep, stop, and watch mode
Process CMOS
Operating voltage 2.7 V to 6.0 V 2.7 V to 6.0 V
EPROM for use MBM27C256A-20TVM
MB89130/130A Series
DS07-12510-11E 5
PACKAGE AND CORRESPONDING PRODUCTS
: Available, : Not available
DIFFERENCES AMONG PRODUCTS
1. Memory Size
Before evaluating using the OTPROM (one-time PROM) products, verify its differences from the product that
will actually be used. Take particular care on the following points :
The number of re gister banks a v a ilab le is different among the MB89131, MB89133A/135 A and MB89P135A/
PV130A.
The stack area, et c., is set at the upper limit of the RAM.
2. Current Consumption
When operated at low speed, the product with an OTPROM will consume more current than the product with
a mask ROM.
However, the same is curren t consumption in sleep/stop modes. (For more infor mation, see “ELECTRICAL
CHARACTERISTICS”.)
In the case of the MB89PV130A, added is the current consumed by the EPROM which is connected to the
top socket.
3. Mask Options
Functions that can be selected as options and how to designate these options vary with product.
Before using options, check “MASK OPITONS”.
Take particular care on the following point :
P40 to P43 must be set to no pull-up resistor when an A/D converter is used.
For MB89P135A, pull-up resistor option cannot be set f or P40 to P43.
Each option is fixed on the MB89PV130A.
Package MB89131 MB89133A MB89135A MB89P133A MB89P131
FPT-48P-M13
DIP-48P-M01
MQP-48C-P01
Package MB89P135A MB89PV130A
FPT-48P-M13
DIP-48P-M01
MQP-48C-P01
× × ×
×××××
×
××
×
×
MB89130/130A Series
6DS07-12510-11E
PIN ASSIGNMENT
(Continued)
1
2
3
4
5
6
7
8
9
10
11
12
AVCC
RST
MOD0
MOD1
X0
X1
VCC
X0A
X1A
P27
P26
P25
36
35
34
33
32
31
30
29
28
27
26
25
P36/INT2
P37/BZ/(RCO)
P00/(INT20)
P01/(INT21)
P02/(INT22)
P03/(INT23)
P04/(INT24)
P05/(INT25)
P06/(INT26)
P07/(INT27)
P10
P11
48
47
46
45
44
43
42
41
40
39
38
37
P40/AN0
P41/AN1
P42/AN2
P43/AN3
AVR
AVSS
P30/SCK
P31/SO
P32/SI
P33/EC/SCO
P34/TO/INT0
P35/INT1
13
14
15
16
17
18
19
20
21
22
23
24
P24
P23
P22
P21
P20
P17
VSS
P16
P15
P14
P13
P12
(TOP VIEW)
(FPT-48P-M13)
Note : Parenthesized funct ion is available only for the MB89130A series.
MB89130/130A Series
DS07-12510-11E 7
(Continued)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
P17
P20
P21
P22
P23
P24
P25
P26
P27
X1A
X0A
VCC
X1
X0
MOD1
MOD0
RST
AVCC
P40/AN0
P41/AN1
P42/AN2
P43/AN3
AVR
AVSS
VSS
P16
P15
P14
P13
P12
P11
P10
P07/(INT27)
P06/(INT26)
P05/(INT25)
P04/(INT24)
P03/(INT23)
P02/(INT22)
P01/(INT21)
P00/(INT20)
P37/BZ/(RCO)
P36/INT2
P35/INT1
P34/TO/INT0
P33/EC/SCO
P32/SI
P31/SO
P30/SCK
(TOP VIEW)
(DIP-48P-M01)
Note : Parenthesized funct ion is available only for the MB89130A series.
MB89130/130A Series
8DS07-12510-11E
(Continued)
1
2
3
4
5
6
7
8
9
10
11
12
AVCC
RST
MOD0
MOD1
X0
X1
VCC
X0A
X1A
P27
P26
P25
36
35
34
33
32
31
30
29
28
27
26
25
P36/INT2
P37/BZ/(RCO)
P00/INT20
P01/INT21
P02/INT22
P03/INT23
P04/INT24
P05/INT25
P06/INT26
P07/INT27
P10
P11
48
47
46
45
44
43
42
41
40
39
38
37
P40/AN0
P41/AN1
P42/AN2
P43/AN3
AVR
AVSS
P30/SCK
P31/SO
P32/SI
P33/EC/SCO
P34/TO/INT0
P35/INT1
P24
P23
P22
P21
P20
P17
VSS
P16
P15
P14
P13
P12
(TOP VIEW)
(MQP-48C-P01)
13
14
15
16
17
18
19
20
21
22
23
24
77
78
79
80
49
50
51
52
68
67
66
65
64
63
62
61
69
70
71
72
73
74
75
61
70
59
68
57
56
55
54
53
Pin assignment on package top
N.C. : Internally connected. Do not use.
Pin no. Pin name Pin no. Pin name Pin no. Pin name Pin no. Pin name
49 VPP 57 N.C. 65 O4 73 OE
50A1258A266O574N.C.
51 A7 59 A1 67 O6 75 A11
52 A6 60 A0 68 O7 76 A9
53 A5 61 O1 69 O8 77 A8
54 A4 62 O2 70 CE 78 A13
55 A3 63 O3 71 A10 79 A14
56 N.C. 64 VSS 72 N.C. 80 VCC
MB89130/130A Series
DS07-12510-11E 9
PIN DESCRIPTION
*1 : DIP-48P-M01
*2 : FPT-48P-M13 (Continued)
Pin no. Pin name Circuit
type Function
SH-DIP*1 QFP*2
35 5 X0 A Main clock crystal oscillator pins (max. 4.2 MHz)
36 6 X1
38 8 X0A B Subclock crystal oscillator pins (32.768 kHz)
39 9 X1A
33 3 MOD0 COperation mode selecting pins
Connect directly to VSS.
34 4 MOD1
32 2 RST D
Reset I/O pin
This pin is of N-ch open-drain output type with pull-up re-
sistor, and a hyste re sis inp u t type . Th e inte rn al circ uit is
initialized by the input of “L”. “L” is output from this pin by
an internal reset source as a option.
16 to 9 34 to 27 P00 (INT20)
to
P07 (INT27) I
General-purp ose I/O ports
On the MB89130 A series, these ports also se rve as an ex-
ternal interrupt input.
External interrupt inpu ts are of hysteresis input type.
8 to 2, 48 26 to 20, 18 P10 to P17 E General-purpose I/O ports
47 to 40 17 to 10 P20 to P27 G General-purpose output ports
24 42 P30/SCK F General-purpose I/O port
Also serves as the clock I/O for the 8-bit serial I/O. This
port is of hysteresis input type.
23 41 P31/SO F General-purpose I/O port
Also serves as a 8-bit serial I/O data outp ut. This port is of
hysteresis input type.
22 40 P32/SI F General-purpose I/O port
Also serves as a 8-bit serial I/O data input. This port is of
hysteresis input type.
21 39 P33/EC/SCO F
General-purpose I/O port
Also serves as the external clock input for the 8-bit
timer/counter. This port is of hysteresis input type. The
system clock outp ut is prov ide d as an op tio n.
20 38 P34/TO/INT0 F
General-purpose I/O port
Also serve as the overflow output for the 8-bit timer/
counter and an external interrupt inpu t. This port is of hys-
teresis input type.
19,
18 37,
36 P35/INT1,
P36/INT2 FGeneral-purp ose I/O ports
Also serves as an extern al interrupt input. These ports ar e
of hysteresis input type.
MB89130/130A Series
10 DS07-12510-11E
(Continued)
*1 : DIP-48P-M01
*2 : FPT-48P-M13
Pin no. Pin name Circuit
type Function
SH-DIP*1 QFP*2
17 35 P37/BZ/ (RCO) F
General-purpose I/O port
Also serves as a buzzer output. This port is of hysteresis
input type. On the MB89130A seri es, this port also serves
as a remote control output.
30 to 27 48 to 45 P40/AN0 to
P43/AN3 HN-ch open-drain output ports
Also serve as an analog input for the A/D converter.
37 7 VCC Power supply pin
119 V
SS Power supply (GND) pin
31 1 AVCC A/D converter power supply pin
Use this pin at the same volta g e as V CC.
26 44 AVR A/D converter reference voltage input pin
25 43 AVSS A/D converter power supply pin
Use this pin at the same volta g e as V SS.
MB89130/130A Series
DS07-12510-11E 11
External EPROM pins (MB89PV130A only)
Pin no. Pin name I/O Function
49 VPP O “H” level output pin
50
51
52
53
54
55
58
59
60
A12
A7
A6
A5
A4
A3
A2
A1
A0
O Address output pins
61
62
63
O1
O2
O3 I Data input pins
64 VSS O Power supply (GND) pin
65
66
67
68
69
O4
O5
O6
O7
O8
I Data input pins
70 CE OROM chip enable pin
Outputs “H” during standby.
71 A10 O Address output pin
73 OE OROM output enable pin
Outputs “L” at all times.
75
76
77
78
79
A11
A9
A8
A13
A14
O Address output pins
80 VCC O EPROM power supply pin
56
57
72
74
N.C. Internally connected pins
Be sure to leave them open.
MB89130/130A Series
12 DS07-12510-11E
I/O CIRCUIT TYPE
(Continued)
Type Circuit Remarks
A
Crystal or ceramic oscillation type (main clock)
Circuit for the MB89P133A/P131/P135A/PV1 30A
External clock input selecting versions of MB89131/
133A/135A
Oscillation feedback resistor of approximately
1 M/5 V
Crystal or ceramic oscillation type (main clock)
Cr y stal or ceramic oscillation selecting versions of
MB89131/133A/135A
Oscillation feedback resistor of approximately
1 M/5 V
B
Crystal and ceramic oscillation type (subclock)
Circuit for the MB89131/133A/135A
Oscillation feedback resistor of approximately
4.5 M/5 V
Crystal and ceramic oscillation type (subclock)
Circuit for the MB89P131/P133A/P135A/PV130A
Oscillation feedback resistor of approximately
4.5 M/5 V
C
D
Output pull-up resist or (P-ch) of approximately
50 k/5 V
Hysteresis input
X0
Standby control signal
X1
X1
X0
Standby control signal
X1A
X0A
Standby control signal
X0A
Standby control signal
X1A
RP-ch
N-ch
MB89130/130A Series
DS07-12510-11E 13
(Continued)
Type Circuit Remarks
E
CMOS output
CMOS input
Pull-up resistor optional
F
CMOS output
Hysteresis input
Pull-up resistor optional
G
CMOS output
H
N-ch op en - drain ou tp ut
Analog inp ut
Pull-up resistor optional
I
CMOS output
CMOS input
The interrupt input is a hysteresis input (available
only for the MB89130A series) .
Pull-up resistor optional
P-ch
N-ch
R
P-ch
N-ch
R
P-ch
N-ch
N-ch
Analog input
RP-ch
P-ch
N-ch
Interrupt input
Only for MB89130A series
P-ch
MB89130/130A Series
14 DS07-12510-11E
HANDLING DEVICES
1. Preventing Latchup
Latchup ma y occur on CMOS I Cs if v oltage higher than VCC or lo wer than VSS is applied t o input and output pins
other than medium- and high-voltage pins or if higher than the voltage which shows on “1. Absolute Maximum
Ratings” in “ Electrical Characteristics” is applied bet ween VCC and VSS.
When latchup occurs, power supply current increases rapidly and might thermally damage elements. When
using, take great care not to exceed the absolute maximum ra tings.
Also, take care to prevent th e analog power supply (AVCC and AVR) and analog input from exceeding the digital
power supply (VCC) when the analog system power supply is turned on and off.
2. Treatment of Unused Input Pins
Lea ving unu sed input pin s open could cause malfunctions . Th ey should be conn ected to a pull- up or pull-do wn
resistor.
3. Treatment of Power Supply Pins on Microcontrollers with A/D Converter
Connect to be AVCC = VCC and AVSS = AVR = VSS even if the A/D con verter are not in use.
4. Treatment of N.C. Pins
Be sure to leave (internally connected) N.C. pins open.
5. Power Supply Voltage Fluctuations
Although operation is assured within the rated range of VCC power supply voltage, a rapid fluctuation of the
v oltage could cause malfunctions, e ven if it occurs within the rated range. Stabilizing voltage supplied to the IC
is therefore important. As stabilization guidelines, it is recommended to control power so that VCC ripple fluc tu -
ations (P-P value) will be less than 10% of the standard VCC value at the commercial frequency (50 to 60 Hz)
and the transient fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when
power is switched.
6. Precautions when Using an External Clock
When an external clock is used, oscillation stabilization time is required even for power-on reset (optional) and
wake-up from stop mode.
7. Turning on the supply voltage (only for the MB89P135A)
Power on sharply up to the option enabling voltage (2 V) within 13 clock cycles after starting of oscillation.
MB89130/130A Series
DS07-12510-11E 15
PROGRAMMING TO THE EPROM ON THE MB89P131
The MB89P131 is an OTPROM version of the MB89131.
1. Features
4-Kby te PROM on chip
Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer)
2. Memory Space
Memory space in EPROM mode is diagrammed below.
3. Programming to the EPROM
In EPROM mode, the MB89P131 functions equivalent to the MBM27C256A. This allows the PROM to be
programmed with a general-purpose EPROM programmer (the electronic signature mode cannot be used) by
using the dedicated socket adapter.
Programming procedure
(1) Set the EPROM programmer for the MBM27C256A.
(2) Load program data into the EPROM programmer at 7000H to 7FFFH (note that addresses F000H to FFFFH
while operating as a single chip correspond to 7000H to 7FFFH in EPROM mode) .
(3) Program with the EPROM progr am m er .
0000H
0080H
00C0H
F000H
FFFFH
I/O
RAM
Not available
PROM
4 KB
7000H
7FFFH
Not available
EPROM
4 KB
0000H
Single chip EPROM mode
(Corresponding addresses on the EPROM programmer)
Not available
Address
0140H
MB89130/130A Series
16 DS07-12510-11E
PROGRAMMING TO THE EPROM ON THE MB89P133A
The MB89P133A is an OTPROM version of the MP89133A.
1. Features
8-Kby te PROM on chip
Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer)
2. Memory Space
Memory space in EPROM mode is diagrammed below.
3. Programming to the EPROM
In EPROM mode, the MB89P133A functions equivalent to the MBM27C256A. This allows the PROM to be
programmed with a general-purpose EPROM programmer (the electronic signature mode cannot be used) by
using the dedicated socket adapter .
Programming procedure
(1) Set the EPROM programmer for the MBM27C256A.
(2) Load program data into the EPROM programmer at 6000H to 7FFFH (note that addresses E000H to FFFFH
while operating as a single chip correspond to 6000H to 7FFFH in EPROM mode) .
(3) Pro gram with the EPROM progr ammer.
0000H
0080H
E000H
FFFFH
I/O
RAM
Not available
PROM
8 KB
6000H
7FFFH
Not available
EPROM
8 KB
0000H
EPROM mode
(Corresponding addresses on the EPROM programmer)
Single chipAddress
0180H
MB89130/130A Series
DS07-12510-11E 17
PROGRAMMING TO THE EPROM ON THE MB89P135A
The MB89P135A is an OTPROM version of the MB89133A/135A.
1. Features
16-Kbyte PROM on chip
Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer)
2. Memory Space
Memory space in EPROM mode is diagrammed below.
3. Programming to the EPROM
In EPROM mode, the MB89P135A functions equivalent to the MBM27C256A. This allows the PROM to be
programmed with a general-purpose EPROM programmer (the electronic signature mode cannot be used) by
using the dedicated socket adapter.
Programming procedure
(1) Set the EPROM programmer for the MBM27C256A.
(2) Load program data into the EPROM programmer at 4000H to 7FFFH (note that addresses C000H to FFFFH
while operating as a single chip correspond to 4000H to 7FFFH in EPROM mode) .
(3) Lo ad option data into the EPROM programmer at 3FF0H to 3FF6H.
(4) Pro gram with the EPROM progr ammer.
0000H
0080H
BFF6H
BFF0H
C000H
FFFFH
I/O
RAM
Not available
Not available
Not available
Not available
PROM
16 KB
EPROM mode
(Corresponding addresses on the EPROM programmer)
Single chipAddress
0280H
8000H
Vacancy
(Read value FFH)
Vacancy
(Read value FFH)
Option area
EPROM
16 KB
0000H
3FF6H
7FFFH
3FF0H
4000H
MB89130/130A Series
18 DS07-12510-11E
4. Setting OTPROM Options (MB89P135A Only)
The programming procedure is the same as that for the PROM. Options can be set by programming values at
the addresse s sho wn on the memory map. The relationship between bits and opt ions is show n on the following
bit map :
OTPROM option bit map
Note : Each bit is set to ‘1’ as the initialized value, therefore the pull-up option is selected.
Ad-
dress Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
3FF0H
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Clock
mode
selection
1 : Single
clock
0 : Dual
clock
Reset pin
output
1 : Yes
0 : No
Power-on
reset
1 : Yes
0 : No
Oscillation
stabilization time
00 : 22/FCH
01 : 212/FCH 10 : 216/FCH
11 : 218/FCH
3FF1H
P07
Pull-up
1 : Yes
0 : No
P06
Pul-up
1 : Yes
0 : No
P05
Pull-up
1 : Yes
0 : No
P04
Pull-up
1 : Yes
0 : No
P03
Pull-up
1 : Yes
0 : No
P02
Pull-up
1 : Yes
0 : No
P01
Pull-up
1 : Yes
0 : No
P00
Pull-up
1 : Yes
0 : No
3FF2H
P17
Pull-up
1 : No
0 : Yes
P16
Pull-up
1 : No
0 : Yes
P15
Pull-up
1 : Yes
0 : No
P14
Pull-up
1 : Yes
0 : No
P13
Pull-up
1 : Yes
0 : No
P12
Pull-up
1 : Yes
0 : No
P11
Pull-up
1 : Yes
0 : No
P10
Pull-up
1 : Yes
0 : No
3FF3H
P37
Pull-up
1 : Yes
0 : No
P36
Pull-up
1 : Yes
0 : No
P35
Pull-up
1 : Yes
0 : No
P34
Pull-up
1 : Yes
0 : No
P33
Pull-up
1 : Yes
0 : No
P32
Pull-up
1 : Yes
0 : No
P31
Pull-up
1 : Yes
0 : No
P30
Pull-up
1 : Yes
0 : No
3FF4H
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
3FF5H
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
3FF6H
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
Vacancy
Readable
and
writable
MB89130/130A Series
DS07-12510-11E 19
HANDLING THE MB89P131/P133A/P135A
1. Recommended Screening Conditions
High-temperature aging is recommended as the pre-assembly scree ning procedure.
2. Programming Yield
Due to its nature, bit pro gramming test can’t be cond ucted as Fujitsu deliver y te st.
For this reason, a programming yield of 100% cannot be assured at all times.
Program, verify
Aging
+150 °C, 48 h
Data verification
Assembly
MB89130/130A Series
20 DS07-12510-11E
PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE
1. EPROM for Use
MBM27C256A-20TVM
2. Memory Space
Memory space in each mode, such as 32-Kbyte PROM is diagrammed below.
3. Programming to the EPROM
(1) Set the EPROM programmer for the MBM27C256A.
(2) Load program data into the EPROM programmer at 0000H to 7FFFH.
(3) Program with the EPROM progr am m er .
PROM
32 KB
FFFF
H
0000
H
8000
H
0080
H
0480
H
Single chip
I/O
RAM
Not available
7FFF
H
0000
H
EPROM
32 KB
Corresponding addresses on the EPROM programmer
Address
MB89130/130A Series
DS07-12510-11E 21
BLOCK DIAGRAM
Main clock oscillator Timebase timer
External interrupt 2*
(wake-up function)
CMOS I/O port
CMOS output port
Ports 0 and 1
F2MC-8L
RAM
MOD0, MOD1, VCC, VSS
The other pins
X0
X1
RST
P00/ (INT20)
ROM
8-bit serial I/O
Buzzer output
N-ch open-drain output port
P30/SCK
P34/TO/INT0
Internal bus
CPU
8-bit timer/counter
CMOS I/O port
8
8
P10 to P17
Reset circuit
(WDT)
External interrupt 1
8-bit timer/counter
P33/EC/SCO
P32/SI
P31/SO
P35/INT1
P36/INT2
P37/BZ/(RCO)
P40/AN0
to P43/AN3
Subclock oscillator
(32.768 kHz)
8
Remote control*
transmitting
frequency generator
Clock controller
4
X0A
X1A
8-bit A/D converter 4
AVR
AVCC
AVSS
to P07/ (INT27)
Port 2
Port 3Port 4
P20 to P27
* : Only for the MB89130A series.
Note : Parenthesized pin function is only for the MB89130A series.
MB89130/130A Series
22 DS07-12510-11E
CPU CORE
1. Memory Space
The microcontroller s of the MB89130/130A series offer a memory space of 64 Kbytes for storing all of I/O , data,
and program areas. The I/O area is allocated from the lowest address. The data area is allocated immediately
above the I/O area. The data area can be divided into register, stack, and direct areas according to the application.
The program area is allocated from exactly the opposite end, that is, near the highest address. The tables of
interrupt reset vectors and vector call instructions are allocated from the highest address within the program
area. The memory space of the MB89130/130A series is structured as illustrated below.
ROM
4 KB
MB89P131
MB89131
RAM
128 B
I/O
Register
0000H
007FH
00C0H
0100H
013FH
0140H
EFFFH
FFFFH
F000H
Vacancy
Vacancy
ROM
8 KB
MB89P133A
MB89133A
RAM
256 B
I/O
Register
0000H
007FH
0080H
00FFH
0100H
017FH
0180H
DFFFH
FFFFH
E000H
Vacancy
ROM
16 KB
MB89135A
RAM
256 B
I/O
Register
0000H
007FH
0080H
00FFH
0100H
017FH
0180H
BFFFH
FFFFH
C000HBFFFH
C000H
Vacancy
ROM
16 KB
MB89P135A
RAM
512 B
I/O
Register
0000H
007FH
0080H
00FFH
0100H
027FH
0280H
01FFH
0200H01FFH
0200H
FFFFH
Vacancy
External
ROM
32 KB
MB89PV130A
RAM
1 KB
I/O
Register
0000H
007FH
0080H
00FFH
0100H
7FFFH
FFFFH
8000H
Vacancy
047FH
0480H
Memory Space
MB89130/130A Series
DS07-12510-11E 23
2. Registers
The F2MC-8L family has two types of registers; dedicated hardware registers in the CPU and general-purpose
memory regis te rs. The follo win g re gis te rs ar e pr ov ide d :
The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for
use as a condition code register (CCR) . (See the diagr am below.)
Program counter (PC) : A 16-bit register for indicating the instruction storage positions.
Accumulator (A) : A 16-bit temporary register for sto ring arithmetic operations, etc. When the
instruction is an 8-bit data processing instruction, the lower byte is used.
Temporary accumulator (T) : A 16-bit register which is used for arithmetic operations with the accumulator
When the instruction is an 8-bit data processing instruction, the lower byte is
used.
Index register (IX) : A 16-bit register for index modification
Extra pointer (EP) : A 16-bit pointer for indicating a memory address
Stack pointer (SP) : A 16-bit pointer for ind icating a stac k area
Program status (PS) : A 16-bit register for storing a register pointer, a condition code
PC
A
T
IX
EP
SP
PS
16 bits
: Program counter
: Accumulator
: Temporary accumulator
: Index register
: Extra pointer
: Stack pointer
: Program status
FFFDH
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
I-flag = 0, IL1, 0 = 11
The other bit values are Indeterminate.
Initial value
Vacancy
H I IL1, 0 N Z VC
54
RPPS
109876 321015 14 13 12 11
RP CCR
Vacancy Vacancy
Structure of the Program Status Register
MB89130/130A Series
24 DS07-12510-11E
The RP indicates the address of the register bank currently in use. The relationship between the pointer contents
and the actual address is based on the conversion rule illustrated below.
The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data, and
bits for control of CPU operations at th e time of an interrupt.
H-flag : Set to ‘1’ when a carry or a borrow fr om bit 3 to bit 4 occurs as a r esult of an arithmetic operation .
Cleared to ‘0’ otherwise. This flag is for decimal adjustment instructions.
I-flag : Interrupt is enabled when this flag is set to ‘1’. Interrupt is disabled when the flag is cleared to ‘0’.
Cleared to ‘0’ at the reset.
IL1, 0 : Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level
is higher than the value indicated by this bit.
IL1 IL0 Interrupt level High-low
00 1High
Low
01
10 2
11 3
N-flag : Set to ‘1’ if the MSB beco mes ‘1’ as the result of an arithmetic operation. Cleared to ‘0’ otherwise.
Z-flag : Set to ‘1’ when an arithmetic operation results in ‘0’. Cleared to ‘0’ otherwise.
V-flag : Set to ‘1’ if the complement on ‘2 ’ overflows as a result of an arithme tic operation. Cleared to ‘0’ if the
overflow does not occur.
C-flag : Set to ‘1’ when a carry or a b orrow from bit 7 occurs as a result of an arithmetic op eration. Cleared to
‘0’ otherwise.
Set to the shift-out valu e in the c as e of a shift inst ru ctio n .
“0”
A15
“0”
A14
“0”
A13
“0”
A12
“0”
A11
“0”
A10
“0”
A9
“1”
A8
R4
A7
R3
A6
R2
A5
R1
A4
R0
A3
b2
A2
b1
A1
b0
A0
RP
Generated addresses
Lower OP codes
Rule for Conversion of Actual Addresses of the General-purpose Register Area
MB89130/130A Series
DS07-12510-11E 25
The following gene ra l- pu rp o s e re gis te rs ar e pr ov ide d :
General-purpose registers : An 8-bit resister for storing data
The general-pur pose registers are o f 8 bits and located in the register banks of the memory. One ba nk contains
eight registers. Up to a total of 8 banks can be used on the MB89131/ P131 and a total of 16 banks can be used
on the MB89133A/P133A/135A and a total of 32 banks can be used on the MB89P135A/PV130A. The bank
currently in use is indicated by the register bank pointer (RP) .
This address = 0100H + 8 × (RP)
Memory area
8 banks (MB89131/P131)
16 banks (MB89133A/P133A/135A)
32 banks (MB89P135A/PV130A)
R0
R1
R2
R3
R4
R5
R6
R7
Register Bank Configuration
MB89130/130A Series
26 DS07-12510-11E
I/O MAP
(Continued)
Address Read/write Register name Register description
00H (R/W) PDR0 Port 0 data reg iste r
01H (W) DDR0 Port 0 data direction register
02H (R/W) PDR1 Port 1 data reg iste r
03H (W) DDR1 Port 1 data direction register
04H (R/W) PDR2 Port 2 data reg iste r
05HVacancy
06HVacancy
07H (R/W) SYCC System clock control register
08H (R/W) STBC Standby control register
09H (R/W) WDTC Watchdog timer control register
0AH (R/W) TBTC Timebase timer control register
0BH (R/W) WPCR Watch prescaler control register
0CH (R/W) PDR3 Port 3 data registe r
0DH (W) DDR3 Port 3 data direction register
0EH (R/W) PDR4 Port 4 data register
0FH (R/W) B ZC R Buzzer register
10HVacancy
11HVacancy
12H (R/W) SCGC Peripheral control clock register
13HVacancy
14H (R/W) RCR1 Remote control transmitting control register 1*
15H (R/W) RCR2 Remote control transmitting control register 2*
16HVacancy
17HVacancy
18H (R/W) T2CR Timer 2 control register
19H (R/W) T1CR Timer 1 control register
1AH (R/W) T2 DR Timer 2 data registe r
1BH (R/W) T1 DR Timer 1 data registe r
1CH (R/W) SMR Serial mode register
1DH (R/W) SDR Serial data registe r
1EHVacancy
1FHVacancy
MB89130/130A Series
DS07-12510-11E 27
(Continued)
* : Only for the MB89130A series
Note : Do not use vacancies.
Address Read/write Register name Register description
20H (R/W) ADC1 A/D converter control register 1
21H (R/W) ADC2 A/D converter control register 2
22H (R/W) ADCD A/D converter data register
23H (R/W) EIC1 External int errupt 1 control register 1
24H (R/W) EIC2 External interrupt 1 control register 2
25HVacancy
26H to 31HVacancy
32H (R/W) EIE2 External interrupt 2 enable register*
33H (R/W) EIF2 External interrupt 2 flag register*
34H to 7BHVacancy
7CH (W) ILR1 Interrupt level setting register 1
7DH (W) ILR2 Interrupt level setting register 2
7EH (W) ILR3 Interrupt level setting register 3
7FHVacancy
MB89130/130A Series
28 DS07-12510-11E
ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Ratings (AVSS = VSS = 0.0 V)
* : Use AVCC an d V CC set to the same voltage.
Take care so that AVCC does not exceed VCC, such as when power is turned on.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
Parameter Symbol Value Unit Remarks
Min. Max.
Power supply voltage VCC
AVCC VSS 0.3 VSS + 7.2 V *
AVR VSS 0.3 VSS + 7.2 V AVR must not exceed VCC + 0.3 V
Program voltage VPP VSS 0.6 VSS + 13.0 V Only for the MB89P131/P133A/
P135A
Input voltage VIVSS 0.3 VCC + 0.3 V
Output voltage VOVSS 0.3 VCC + 0.3 V
“L” level maximum output cur rent IOL 10 mA
“L” level average output current IOLAV 4mA
Average value (operating current ×
operating rate)
“L” level total maximum output cur-
rent ΣIOL 100 mA
“L” level total average out put cur-
rent ΣIOLAV 20 mA Average value (operating current ×
operating rate)
“H” level maximum output current IOH –10 mA
“H” level average output current IOHAV –2 mA Average value (operating current ×
operating rate)
“H” level total maximum output cur-
rent ΣIOH –30 mA
“H” level total average output cur-
rent ΣIOHAV –10 mA Average value (operating current ×
operating rate)
Power consumption PD200 mW
Operating temperature TA40 +85 °C
Storage temperature Tstg 55 +150 °C
MB89130/130A Series
DS07-12510-11E 29
2. Recommended Operating Conditions (AVSS = VSS = 0.0 V)
* : These values vary with the operating frequencies and the analog assurance range. See Figure 1 and 2, and
“5. A/D Converter Electr ical Characteristics”.
Parameter Symbol Value Unit Remarks
Min. Max.
Power supply voltage VCC
AVCC
2.2* 6.0* V Normal operation assurance range*
MB89131/133A/135A
2.7* 6.0* V Normal operation assurance range*
MB89P131/P133A/135A/PV130A
1.5 6.0 V Retains the RAM state in the stop mode
AVR 2.0 AVCC V
Operating temperature TA40 +85 °C
1
2
3
4
5
6
Operation assurance range
1234
4.0 2.0 1.0
Main clock oprating frequency (at an instruction cycle of 4/FCH) (MHz)
Minimum execution time (Instruction cycle) (µs)
Operating voltage (V)
Figure 1 Operating Voltage vs. Main Clock Operating Freque ncy
(MB89P131/P133A/P135A/PV130A, and single-clock MB89131/133/133A/135/135A)
Note : The shaded area is assured only for the MB89131/133/133A/135/135A.
MB89130/130A Series
30 DS07-12510-11E
Figure 1 and 2 indicate the operating frequency of the external oscillator at an instruction cycle of 4/FCH.
Since the operating voltage range is dependent on the instruct ion cycle, see minimum execution time if the oper-
ating speed is switched using a gear.
WARNING: The recommended opera ting conditions are required in order to ensure the normal operation of
the semiconducto r device. All of the device's electrical characteristics are warranted when the
device is operated within these ranges.
Always use semiconductor devices within their recommende d operating condition ranges.
Operation outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented
on the data shee t. Users consider ing application outside th e listed cond itions are advised t o contact
their representatives before hand.
1
2
3
4
5
6
Operation assurance range
1234
4.0 2.0 1.0
Operating voltage (V)
Main clock oprating frequency (at an instruction cycle of 4/FCH) (MHz)
Minimum execution time (Instruction cycle) (µs)
Figure 2 Operating Voltage vs. Main Clock Operating Frequency
(Dual-clock MB89131/133/133A/135/135A)
MB89130/130A Series
DS07-12510-11E 31
3. DC Characteristics (AVCC = VCC = +5.0 V, AVSS = VSS = 0.0 V, TA = 40 °C to +85 °C)
(Continued)
Parameter Sym-
bol Pin Condition Value Unit Remarks
Min. Typ. Max.
“H” level
input voltage
VIH P00 to P07,
P10 to P17
0.7 VCC VCC +
0.3 V
VIHS
RST,
P30 to P37,
INT20 to
INT27
0.8 VCC VCC +
3.0 V
INT20 to INT27
are available
only for the
MB89130A se-
ries.
“L” level
input voltage
VIL P00 to P07,
P10 to P17 VSS
0.3 0.3 VCC V
VILS
RST,
P30 to P37
INT20 to
INT27
VSS
0.3 0.2 VCC V
INT20 to INT27
are available
only for the
MB89130A se-
ries.
Open-drain
output pin
applied
voltage
VDP40 to P43 VCC
0.3 VCC +
0.3 V
“H” level
output voltage VOH
P00 to P07,
P10 to P17,
P20 to P27,
P30 to P37
IOH = 2.0 mA 2.4 ⎯⎯V
“L” level
output voltage VOL
P00 to P07,
P10 to P17,
P20 to P27,
P30 to P37,
P40 to P43
IOL = 1.8 mA ⎯⎯0.4 V
VOL2 RST IOL = 4.0 mA ⎯⎯0.6 V
Input leakage
current
(Hi-Z output
leakage current)
ILI1
P00 to P07,
P10 to P17,
P20 to P27,
P30 to P37,
P40 to P43,
MOD0, MOD1
0.0 V < VI < VCC ⎯⎯±5µAWithout pull-up
resistor
Pull-up
resistance RPULL
P00 to P07,
P10 to P17,
P30 to P37,
P40 to P43,
RST
VI = 0.0 V 25 50 100 k
MB89130/130A Series
32 DS07-12510-11E
(Continued) (AVCC = VCC = +5.0 V, AVSS = VSS = 0.0 V, TA = 40 °C to +85 °C)
*1 : The power supply current is measured at the external clock.
*2 : For information on tinst, see “ (4) Instruction Cycle” in “4. AC Characteristics”.
Parameter Sym-
bol Pin Condition Value Unit Remarks
Min. Typ. Max.
Power supply
current*1
ICC1
VCC (External
clock opera-
tion)
FCH = 4.00 MHz
VCC = 5.0 V
tinst*2 = 1.0 µs
47mA
MB89131/
133A/135A
610mA
MB89P131/
P133A/P135A
ICCS1
FCH = 4.00 MHz
VCC = 5.0 V
tinst*2 = 1.0 µs
Main clock sleep
mode
25mA
ICCL FCL = 32.768 kHz
VCC = 3.0 V
Subclock mode
50 100 µAMB89131/
133A/135A
13mA
MB89P131/
P133A/P135A
ICCLS
FCL = 32.768 kHz
VCC = 3.0 V
Subclock sleep
mode
25 50 µA
ICCT
FCL = 32.768 kHz
VCC = 3.0 V
Watch mode
Main clock stop
mode in dual-
clock system
⎯⎯15 µA
ICCH
TA = +25 °C
Subclock stop
mode
Main clock stop
mode in single-
clock system
⎯⎯ 1µA
IAAVCC
FCH = 4 MHz,
when A/D
conversion is op-
erating
13mA
IAH AVCC
FCH = 4 MHz,
TA = +25 °C,
when A/D
conversion is not
operating
⎯⎯ 1µA
Input
capacitance CIN Other than
AVCC, AVSS,
VCC, and VSS f = 1 MHz 10 pF
MB89130/130A Series
DS07-12510-11E 33
4. AC Characteristics
(1) Reset Timing (VCC = +5.0 V ± 10%, AVSS = VSS = 0.0 V, TA = 40 °C to +85 °C)
* : tHCYL is the oscillation cycle (1/FCH) to input to the X0 pin.
(2) Power-on Reset (AVSS = VSS = 0.0 V, TA = 40 °C to +85 °C)
Note : Make sure that power supply rises within the oscillation stabilization time selected.
F or example, whe n the main clock is opera ting at 3 MHz (FCH) and the oscillation stabilization time selecting
option has been set t o 212/FCH, the oscillation stabilization time is 1.4 ms. Theref ore, the maxim um v alue of
power supply rising time is about 1.4 ms.
Rapid changes in power su pply vo ltag e may cause a powe r- on reset . If po we r su pp ly volt age need s t o be
varied in the course of operation, a smooth voltage rise is recommended.
Parameter Symbol Condition Value Unit Remarks
Min. Max.
RST “L” pulse width tZLZH 48 tHCYL*ns
Parameter Symbol Condition Value Unit Remarks
Min. Max.
Power supply rising time tR50 ms Power-on reset function only
Power supply cut-off time tOFF 1ms Due to repeated operations
t
ZLZH
0.2 V
CC
0.2 V
CC
0.8 V
CC
RST
0.2 V 0.2 V
2.0 V
VCC 0.2 V
tRtOFF
MB89130/130A Series
34 DS07-12510-11E
(3) Clock Timing (VSS = 0.0 V, TA = 40 °C to +85 °C)
Parameter Symbol Pin Value Unit Remarks
Min. Typ. Max.
Input clock frequen cy FCH X0, X1 1 4.2 MHz Main clock
FCL X0A, X1A 32.768 kHz Subclock
Clock cycle time tHCYL X0, X1 238 1000 ns Main clock
tLCYL X0A, X1A 30.5 ⎯µs Subclock
Input clock pulse width PWH1
PWL1 X0 30 ⎯⎯ns External clock
Input clock rising/falling time tCR1
tCF1 X0 ⎯⎯24 ns External clock
X0 0.8 V
CC
0.2 V
CC
X0 X1
P
WH1
C0C1
FCH
When a crystal
or
ceramic resonator is used
Open
X0 X1
When an external clock is used
FCH
tHCYL
P
WL1
t
CF1
0.8 V
CC
0.8 V
CC
0.2 V
CC
t
CR1
X0 and X1 Timing and Conditions of Applied Voltage
Main Clock Conditions
MB89130/130A Series
DS07-12510-11E 35
(4) Instruction Cycle
Parameter Symbol Value Unit Remarks
Instruction cycle
(minimum execution time) tinst
4/FCH, 8/FCH, 16/FCH, 64/FCH µs (4/FCH) tinst = 1.0 µs when operating at
FCH = 4 MHz
2/FCL µstinst = 61.036 µs when operating at
FCL = 32.768 kHz
X0A X1A
C
0
C
1
F
CL
X0A X1A
Open
Rd
0.8 V
CC
X0A
t
LCYL
When a crystal
or
ceramic resonator is used When a single-clock option is used
0.8 V
CC
X0A and X1A Timing and Conditions of Applied Voltage
Subclock Conditions
MB89130/130A Series
36 DS07-12510-11E
(5) Serial I/O Timing (VCC = +5.0 V ± 10%, AVSS = VSS = 0.0 V, TA = 40 °C to +85 °C)
* : For information on tinst, see “ (4) Instruction Cycle”.
Parameter Symbol Pin Condition Value Unit Remarks
Min. Max.
Serial clock cycle time tSCYC SCK
Internal shift
clock mode
2 tinst*⎯µs
SCK SO time tSLOV SCK, SO 200 200 ns
Valid SI SCK t
IVSH SI, SCK 200 ns
SCK valid SI hold time tSHIX SCK, SI 200 ns
Serial clock “H” pulse width tSHSL SCK
External shift
clock mode
1 tinst*⎯µs
Serial clock “L” pulse width tSLSH 1 tinst*⎯µs
SCK SO time tSLOV SCK, SO 0 200 ns
Valid SI SCK tIVSH SI, SCK 200 ns
SCK valid SI hold time tSHIX SCK, SI 200 ns
MB89130/130A Series
DS07-12510-11E 37
0.8 V
2.4 V
tSCYC
2.4 V
tSLOV
0.2 VCC
tSHIX
0.8 V
0.8 V
tIVSH
0.8 VCC
0.2 VCC
0.8 VCC
SCK
SO
SI
tSLSH
2.4 V
tSLOV
0.2 VCC
tSHIX
0.8 VCC
0.8 V
tIVSH
0.8 VCC
0.2 VCC
0.8 VCC
tSHSL
0.8 VCC
0.2 VCC0.2 VCC
SO
SI
SCK
Internal Shift Clock Mode
External Shift Clock Mode
MB89130/130A Series
38 DS07-12510-11E
(6) Peripheral Input Timing (VCC = +5.0 V ± 10%, AVSS = VSS = 0.0 V, TA = 40 °C to +85 °C)
* : For information on tinst, see “ (4) Instruction Cycle”.
Parameter Symbol Pin Condition Value Unit Remarks
Min. Max.
Peripheral inpu t “H” level pulse width 1 tILIH1 EC,
INT0 to INT2 2 tinst*⎯µs
Peripheral input “L” level pulse width 1 tIHIL1 2 tinst*⎯µs
0.2 VCC
0.8 VCC
tIHIL1
0.8 VCC
EC,
INT0 to INT2 0.2 VCC
tILIH1
MB89130/130A Series
DS07-12510-11E 39
5. A/D Converter Electrical Characteristics
(AVCC = VCC = +3.5 V to +6.0 V, FCH = 3 MHz, AVSS = VSS = 0.0 V, TA = 40 °C to +85 °C)
* : For information on tinst, see “ (4) Instruction Cycle” in “4. AC Characteristics”.
6. A/D Converter Glossary
Resolution
Analog changes that are identifiable by the A/D conver ter.
When the number of bits is 8, analog voltage can be divided into 28 = 256.
Linearity error (unit : LSB)
The deviation of the straight line connecting the zero transition point ( 0000 0000” “0000 0001”) with the
full-scale transition point (“1111 1111” “1111 1110”) from actual conversion characteristics.
Differential linearity error (unit : LSB)
The deviation of input voltage needed to change the output code by 1 LSB from the theoretical value.
Parameter Symbol Pin Condition Value Unit Remarks
Min. Typ. Max.
Resolution
AVR = AVCC = 5.0 V ⎯⎯ 8bit
Total error
AVR = AVCC
⎯⎯±1.5 LSB
Linearity error ⎯⎯±1.0 LSB
Differential
linearity error ⎯⎯±0.9 LSB
Zero tran sition
voltage VOT AVSS
1.0 LSB AVSS +
0.5 LSB AVSS +
2.0 LSB V1LSB =
(AVR AVSS)
/256
Full-scale transition
voltage VFST AVR
3.0 LSB AVR
1.5 LSB AVR V
Interchannel
disparity
⎯⎯0.5 LSB
A/D mode
conversion time
44 tinst*⎯µs
Sense mode
conversion time 12 tinst*⎯µs
Analog port input
current IAIN AN0
to
AN3
⎯⎯10 µA
Analog input
voltage 0AVR V
Reference voltage
AVR
2.0 AVCC V
Reference voltage
supply current
IRAVR = AVCC = 5.0 V,
when A/D conversion
is operating 100 300 µA
IRH AVR = AVCC = 5.0 V,
when A/D conversion
is not operating ⎯⎯ 1µA
MB89130/130A Series
40 DS07-12510-11E
Total error (unit : LSB)
The difference between theoretical and actual conversion values
Linearity error
(1 LSB × N + VOT)
Digital output
VOT VNT V(N+1)T VFST
Theoretical conversion value
1111 1111
1111 1110
0000 0010
0000 0001
0000 0000
1 LSB = (AVR AVSS)
256
VNT (1 LSB × N + VOT)
1 LSB
1
V(N+1)T VNT
1 LSB
Total error =
Differential linearity error =
Linearity error =
VNT (1 LSB × N + 1 LSB)
1 LSB
Analog input
Actual conversion value
MB89130/130A Series
DS07-12510-11E 41
7. Notes on Using A/D Converter
Input impedance of the analog input pins
The A/D conver ter used for the MB89130/130A series contains a sample & hold circuit as illustrated below to
f etch analog input volta ge into the sample & hold capacitor f or eight instruction cycles after starting A/D conv er-
sion.
F o r th is re ason, if th e outpu t impe dan ce of the external circuit for the analog input is high, analog input voltage
might not stabilize within the analog input sampling period. Therefore, it is recommended to keep the output
impedance of the external circuit low (below 10 k) .
Note that if the impedance cannot be kept low, it is recommended to connect an extern al capacitor of approx.
0.1 µF for the analog input pin.
Error
The smaller the | AVR AVSS |, the greater the error would become relatively.
Sample & hold circuit
Comparator
Analog input pin C = 28 pF
.
.
R = 9 k
.
.
Close for 8 instruction cycles after starting
A/D conversion.
Analog channel selector
If the analog input
impedance is higher
than 10 kΩ, it is
recommended to
connect an external
capacitor of approx.
0.1 µF.
Analog Input Equivalent Cir cuit
MB89130/130A Series
42 DS07-12510-11E
EXAMPLE CHARACTERISTICS
(1) “L” Level Output Voltage (2) “H” Level Output Voltage
(3) “H” Level Input Voltage/“L” Level Input
Voltage (CMOS Input) (4) “H” Level Input Voltage/“L” Level Input
Voltage (Hysteresis Input)
VIHS : Threshold when input voltage in hysteresis
characteristics is set to “H” level
VILS : Threshold when input voltage in hysteresis
characteristics is set to “L” level
(5) Pull-up Resistance
VOL (V)
VCC = 4.0 V
VCC = 5.0 V
VCC = 6.0 V
IOL (mA)
012345678910
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
1.1 VCC = 2.5 V
VCC = 3.0 V
TA = +25 °C
V
OL
vs. I
OL
VCC = 2.2 V
VCC – VOH (V)
VCC = 6.0 V
VCC = 5.0 V
VCC = 4.0 V
IOH (mA)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
1.1 VCC = 2.5 V
VCC = 2.2 V
0.0 0.5 1.0 1.5 2.0 2.5 3.0
VCC = 3.0 V
TA = +25 °C
VCC VOH vs. IOH
0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
VIN (V)
VCC (V)
1234567
T
A
= +25 °C
VIN vs. VCC
V
IHS
V
ILS
0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
IN
(V)
V
CC
(V)
1234567
T
A
= +25 °C
V
IN
vs. V
CC
1234567
1000
R
PULL
(k)
V
CC
(V)
300
100
50
10 0
T
A
= +25 °C
RPULL vs. VCC
MB89130/130A Series
DS07-12510-11E 43
(6) Power Supply Current (External Clock)
(Continued)
1.5 6.5
VCC (V)
5.0
ICC (mA)
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
ICC1 vs. VCC
2 2.5 3 3.5 4 4.5 5 5.5 6
Divide by 4(ICC1)
Divide by 64
FCH = 4.0 MHz
TA = +25 °C
1.5 6.5
VCC (V)
ICCS1 (mA)
0.0
ICCS1 vs. VCC
2 2.5 3 3.5 4 4.5 5 5.5 6
Divide by 4(ICCS1)
0.5
1
1.5
2
2.5
3
ICCL (µA)
VCC (V)
0
1.5 2
20
40
60
80
100
120
140
160
180
200
ICCL vs. VCC
2.5 3 3.5 4 4.5 5 5.5 6 6.5
TA = +25 °C
1.5 6.5
VCC (V)
ICCLS (µA)
0
ICCT vs. VCC
2 2.5 3 3.5 4 4.5 5 5.5 6
5
10
15
20
25
30 TA = +25 °C
1.5 6.5
VCC (V)
50
ICCT (µA)
45
40
35
30
25
20
15
10
5
0
ICCLS vs. VCC
2 2.5 3 3.5 4 4.5 5 5.5 6
TA = +25 °C
IR (µA)
AVR (V)
0
1.5 2
20
40
60
80
100
120
140
160
180
200
IR vs. AVR
2.5 3 3.5 4 4.5 5 5.5 6 6.5
TA = +25 °C
Divide by 64
FCH = 4.0 MHz
TA = +25 °C
MB89130/130A Series
44 DS07-12510-11E
(Continued)
ICCH (µA)
VCC (V)
0
1.5 2.0 6.5
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
ICCH vs. VCC
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
TA = +25 °C
IA (mA)
AVCC (V)
0
1.5
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
IA vs. AVCC
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
TA = +25 °C
FCH = 4 MHz
MB89130/130A Series
DS07-12510-11E 45
MASK OPTIONS
*1 : Both external clock and oscillation resonator can be used on the OTPROM product.
*2 : “Used” must be selected when P33 (39 pin) is used as SCO for the peripheral control clock output.
*3 : The peripheral control clock output function can be used only by software.
No. Part number MB89131 MB89133A
MB89135A MB89P131
MB89P133A
Specifying procedure Specify when
ordering masking Specif y wh e n
ordering masking Specify when
ordering masking
1Pull-up resistors
P00 to P07, P10 to P17,
P30 to P37, P40 to P43
Selectable by pin
(P40 to P43 must be
fixed to no pull-up
resistor opti on whe n
an A/D converter is
used.)
Selectable by pin
(P40 to P43 must be
fixed to no pull-u p
resistor option when
an A/D converter is
used.)
Selectable by pin
(P40 to P43 must be
fixed to no pull-up
resistor option when
an A/D converter is
used.)
2Power-on reset
Power-on reset provided
No power-on reset Selectable Selectable Selectable
3
Selection of oscillation stabilization
time
The oscillation stabilization time ini-
tial value is selectable from 4 types
given below.
0 : Oscillation stabilization 22/FCH
1 : Oscillation stabilization 212/FCH
2 : Oscillation stabilization 216/FCH
3 : Oscillation stabilization 218/FCH
Selectable Selectable Selectable
4Reset pin output
Reset output enab led
Reset output disabled Selectable Selectable Selectable
5Clock mode selection
Single-clock mode
Dual-clock mode Selectable Selectable Selectable
6Selection of oscillation circuit type
Crystal or ceramic oscillation type
External clock input type Selectable Selectable Not required*1
7
Peripheral control clock output func-
tion*2
Not used
Used
Selectable Not required*3 Not required*3
MB89130/130A Series
46 DS07-12510-11E
*1 : Both external clock and oscillation resonator can be used.
*2 : “Used” must be selected when P33 (39 pin) is used as SCO for the peripheral control clock output.
*3 : The peripheral control clock output function can be used only by software.
No. Part number MB89P135 A MB89PV130A
Specifying procedure Set with EPROM programmer Setting not possible
1Pull-up resistors
P00 to P07, P10 to P17,
P30 to P37, P40 to P43
Selectable by pin
(P40 to P43 must be fixed to no
pull-up resistor option.)
All pins fixed to no pull-up resis-
tor option
2Power-on reset
Power-on reset provided
No power-on reset Selectable Power-on reset provided
3
Selection of oscillation stabilization
wait time
The oscillation stabilization time ini-
tial value is selectable from 4 types
given below.
0 : Oscillation stabilization 22/FCH
1 : Oscillation stabilization 212/FCH
2 : Oscillation stabilization 216/FCH
3 : Oscillation stabilization 218/FCH
Selectable Oscillation stabilization 218/FCH
4Reset pin output
Reset output enab led
Reset output disabled Selectable Reset output enabled
5Selection of clock mode selection
Single-clock mode
Dual-clock mode Selectable Dual-clock mode
6Selection of oscillation circuit type
Crystal or ceramic oscillation type
External clock input type Not required*1 Not required*1
7
Peripheral control clock output func-
tion*2
Not used
Used
Not required*3 Not required*3
MB89130/130A Series
DS07-12510-11E 47
MB89P131/P133A STANDARD OPTIONS
ORDERING IN FORMATION
No. P roduct option MB89P131-101 MB89P133A-201
1 Pull-up resistor Not provided for any port Not provided for any port
2 Power-on reset Provided Provided
3Selection of oscillation stabiliza-
tion time 2 : Oscillation stabilization 216/FCH 2 : Oscillation stabilization 216/FCH
4 Reset pin output Enabled Enabled
5 Selection of clock mode Dual-clock mode Dual-clock mode
Part number Package Remarks
MB89131PFM
MB89133APFM
MB89135APFM
MB89P131-101PFM
MB89P133A-201PFM
MB89P135A-101PFM
48-pin Plastic QFP
(FPT-48P-M13)
MB89133AP-SH
MB89P133A-201P-SH 48-pin Plastic SH-DIP
(DIP-48P-M 01 )
MB89PV130ACF-ES 48-pin Ceramic MQFP
(MQP-48C-P01)
MB89130/130A Series
48 DS07-12510-11E
PACKAGE DIMENSIONS
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/ (Continued)
48-pin plastic QFP Lead pitch 0.80 mm
Package width ×
package length 10 × 10 mm
Lead shape Gullwing
Sealing method Plastic mold
Mounting height 2.35 mm MAX
Code
(Reference) P-QFP44-10×10-0.80
48-pin plastic QFP
(FPT-48P-M13)
(FPT-48P-M13)
C
2003-2008 FUJITSU MICROELECTRONICS LIMITED F48023S-c-3-5
(.013±.002)
0.32±0.05
0.80(.031)
M
0.20(.008)
0.10(.004)
(.007±.002)
0.17±0.06
10.00±0.20(.394±.008)SQ
13.10±0.40(.516±.016)SQ
112
13
24
37
48
2536
INDEX
Details of "A" part
0.80±0.20
(.031±.008)
0.88±0.15
(.035±.006)
0.25(.010)
.008
–.008
+.004
–0.20
+0.10
0.20
(Stand off)
1.95
+0.40
–0.20
+.016
–.008
.077 (Mounting height)
0~8
°
"A"
0.10(.004)
*
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3)Pins width do not include tie bar cutting remainder.
MB89130/130A Series
DS07-12510-11E 49
Please confirm th e latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/ (Continued)
48-pin plastic SH-DIP Lead pitch 1.778mm(70mil)
Row spacing 15.24mm(600mil)
Sealing method Plastic mold
48-pin plastic SH-DIP
(DIP-48P-M01)
(DIP-48P-M01)
C
1994-2008 FUJITSU MICROELECTRONICS LIMITED D48002S-3C-4
43.69
+0.20
–0.30
+.008
–.012
1.720
13.80±0.25
(.543±.010)
INDEX-1
5.25(.207)
3.00(.118)
0.45±0.10
(.018±.004)
+.020
–0
.039
–0
+0.50
1.00
1.778±0.18
(.070±.007)
1.778(.070)
MAX
0.25±0.05
(.010±.002)
15.24(.600)
TYP 15°MAX
INDEX-2
40.894(1.610)REF
MAX
MIN
0.51(.020)MIN
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
MB89130/130A Series
50 DS07-12510-11E
(Continued)
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/
48-pin ceramic MQFP Lead pitch 0.8 mm
Lead shape Straight
Motherboard
materialCeramic
Mounted package
materialPlastic
48-pin ceramic MQFP
(MQP-48C-P01)
(MQP-48C-P01)
C
1994-2008 FUJITSU MICROELECTRONICS LIMITED M48001SC-4-3
14.82±0.35
(.583±.014)
15.00±0.25
(.591±.010)
17.20(.677)TYP
PIN No.1 INDEX
.430
–0
+.005
–0.0
+0.13
10.92
1.02±0.13
(.040±.005)
7.14(.281) 8.71(.343)
TYP
TYP
0.30(.012)TYP 4.50(.177)TYP
PAD No.1 INDEX
0.15±0.05
(.006±.002)
8.50(.335)MAX
0.60(.024)TYP1.10
+0.45
–0.25
+.018
–.010
.043
0.40±0.08
(.016±.003)
0.80±0.22
(.0315±.0087)
8.80(.346)REF
1.00(.040)TYP
1.50(.059)TYP
PIN No.1 INDEX
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
MB89130/130A Series
DS07-12510-11E 51
MAIN CHANGES IN THIS EDITION
The vertical lines marked in the left side of the page show the changes.
Page Section Change Resul ts
3, 4 FEATURES Changed the name of a "Standby mode".
clock mode watch mode
19 HANDLING THE MB89P131/P133A/
P135A Deleted the “3. EPROM Programmer Socket Adapter”.
20 PROGRAMMING TO THE EPROM
WITH PIGGYBACK/EVALUATION
DEVICE
Deleted the “2. Programming Socket Adapter”.
ELECTRICAL CHARACTERISTICS
4. AC Characteristics Deleted the “(5) Recommended Resonator Manu facturers”.
39
5. A/D Converter Electrical
Characteristics Changed the items of “Zero tran s itio n vo lta ge” an d
“Full-scale transition voltage”.
Unit : mV V
Remarks : AVR/256 (AVRAVSS) /2 56
40 6. A/D Converter Glossary Changed the expression of “1LSB”.
AVR/256 (AVRAVSS) /256
47
ORDERING INFORMATION Changed the order informations.
MB89133AP MB89133AP-SH
MB89P131PFM-101 MB89P131-10 1PFM
MB89P133APFM-201 MB89P133A-201PFM
MB89P133AP-201 MB89P133A-201P-SH
MB89P135APFM MB89P135A-101PFM
MB89130/130A Series
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome,
Shinjuku-ku, Tokyo 163-0722, Japan
Tel: +81-3-5322-3347 Fax: +81-3-5322-3387
http://jp.fujitsu.com/fml/en/
F or further inf ormation please contact:
North and South America
FUJITSU MICROELECTRONICS AMERICA, INC.
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Tel: +1-408-737-5600 Fax: + 1-408-737-5999
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Europe
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Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/microelectronics/
Korea
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206 Kosmo Tower Building, 1002 Daechi-Dong,
Gangnam-Gu, Seoul 135-280, Republic of Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://kr.fujitsu.com/fmk/
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE. LTD.
151 Lorong Chuan,
#05-08 New Tech Park 556741 Singapore
Tel : +65-6281-0770 Fax : +65-6281-0220
http://www.fmal.fujitsu.com/
FUJITSU MICROELECTR ONICS SHANGHAI CO., LTD.
Rm. 3102, Bund Center, No.222 Yan An Road (E),
Shanghai 200002, China
Tel : +86-21-6146-36 88 Fax : +86-21-6335-1605
http://cn.fujitsu.com/fmc/
FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road,
Tsimshatsui, Kowloon, Hong Kong
Tel : +852-2377-0226 Fax : +852-2376-3269
http://cn.fujitsu.com/fmc/en/
Specifications are subject to change without notice. For further information please contact each office.
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The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The informatio n, such as desc riptions of function and application circuit examples, in this document a re present ed solely for the purpose
of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS
does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating
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FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of functio n and schematic diagrams, shall not be construed as license of the use
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or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual p roper ty right or
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The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and househo ld use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to
the public, and could lead directly to death, personal injury, severe p hysical damage or other loss (i.e., nuclear reaction control in nuclear
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Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising
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Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and equipment such as redund ancy, fire protection, and prevention of over-current
levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of
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