INTEGRATED CIRCUITS DATA Sil 74LV132 = = | Quad 2-input NAND Schmitt-trigger Product specification Supersedes data of 1997 Feb 04 IC24 Data Handbook Philips Semiconductors Di 1998 Apr 28 PHILIPSPhilips Semiconductors ee Quad 2-input NAND Schmitt-trigger Product specification 74LV132 FEATURES Wide operating voltage: 1.0 to 5.5V Optimized for Low Voltage applications: 1.0 to 3.6V Accepts TTL input levels between Voc = 2.7V and Voc = 3.6V Typical Vo_p (output ground bounce) < 0.8V @ Vcc = 3.3V, Tamb = 25C Typical Voyy (output Voy undershoot) > 2V @ Vcc = 3.3V, Tamb = 25C Output capability: standard loc category: SSI QUICK REFERENCE DATA GND = OV; Tamb = 25C; t, =} $2.5 ns APPLICATIONS Wave and pulse shapers Astable multivibrators Monostable multivibrators DESCRIPTION The 74LV132 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT132. The 74LV132 contains four 2-input NAND gates which accept standard input signals. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The gate switches at different points for positive and negative-going signals. The difference between the positive voltage V7, and the negative voltage Vy_ is defined as the hysteresis voltage Vy. SYMBOL PARAMETER CONDITIONS TYPICAL UNIT Propagation delay CL = 15pF teHUAPLH nA, nB to nY Veo = 3.3V 10 ns Cc Input capacitance 3.5 pF Cpp Power dissipation capacitance per gate Notes 1 and 2 24 pF NOTES: 1. Cpp is used to determine the dynamic power dissipation (Pp in uW) Pp =Cpp X Voc? x f, +2 (CL x Voc? x fy) where: f, = input frequency in MHz; C_ = output load capacitance in pF; fy = output frequency in MHz; Vcc = supply voltage in V; Z(CL xX Vec? x fy) = sum of the outputs. 2. The condition is V; = GND to Voc ORDERING INFORMATION PACKAGES TEMPERATURE RANGE | OUTSIDE NORTH AMERICA | NORTH AMERICA PKG. DWG. # 14-Pin Plastic DIL 40C to +125C 74LV132 N 74LV132 N SOT27-1 14-Pin Plastic SO 40C to +125C 74LV132 D 74LV132 D SOT108-1 14-Pin Plastic SSOP Type Il 40C to +125C 74LV132 DB 74LV132 DB SOT337-1 14-Pin Plastic TSSOP Type | 40C to +125C 74LV132 PW 74LV132PW DH SOT402-1 PIN DESCRIPTION FUNCTION TABLE NUMINER | SYMBOL FUNCTION INPUTS OUTPUT nA nB nY 1,4,9,12 1Ato 4A Data inputs L L H 2,5, 10, 13 1B to 4B Data inputs L H H 3, 6, 8, 11 1Y to 4Y Data outputs H L H 7 GND Ground (OV) H H L = NOTES: 14 Voc Positive supply voltage H = HIGH voltage level 1998 Apr 28 L = LOW voltage level 853-1912 19290Philips Semiconductors Product specification Quad 2-input NAND Schmitt-trigger 74LV132 PIN CONFIGURATION LOGIC SYMBOL aT [iW \e Eps 3 18 [2] 3] 48 218[ oro vy BI 12] 4A 2A [4] tt] 4Y 2B [5] 0] 3B ey [6] BES GND [7] 8] 3Y SV00213 LOGIC SYMBOL (IEEE/IEC) 1 =e 2 PD 3 SV00215 ir 4 OE 5 D6 T_T 9 =e 10 8 TT 12 =e 13 ps a SVv00217 SV00216 RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT Voc DC supply voltage See Note1 1.0 3.3 5.5 Vv V| Input voltage 0 - Voc Vv Vo Output voltage 0 - Voc Vv T. Operating ambient temperature range in free See DC and AC -40 +85 C amb air characteristics 40 +125 Voc = 1.0V to 2.0V - - 500 tt Input rise and fall times except for Voc = 2.0V to 2.7V - - 200 ns/V nit Schmitt-trigger inputs Voc = 2.7V to 3.6V - - 100 Voc = 3.6V to 5.5V - - 50 NOTE: 1. The LV is guaranteed to function down to Voc = 1.0V (input levels GND or Voc); DC characteristics are guaranteed from Voc = 1.2V to Voc = 5.5V. 1998 Apr 28 3Philips Semiconductors Product specification Quad 2-input NAND Schmitt-trigger 74LV132 ABSOLUTE MAXIMUM RATINGS": 2 In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = OV). SYMBOL PARAMETER CONDITIONS RATING UNIT Voc DC supply voltage 0.5 to +7.0 Vv +k DC input diode current V, <-0.5 or Vi > Voc + 0.5V 20 mA +lox DC output diode current Vo < 0.5 or Vo > Veco + 0.5V 50 mA DC output source or sink current _ tlo standard outputs 0.5V PH I LI PS