General Description
The MAX3450E/MAX3451E/MAX3452E USB-compliant
transceivers interface low-voltage ASICs with USB
devices. The devices fully comply with USB 1.1 and
USB 2.0 when operating at full (12Mbps) and low
(1.5Mbps) speeds. The MAX3450E/MAX3451E/
MAX3452E operate with VLas low as +1.65V, ensuring
compatibility with low-voltage ASICs.
The MAX3450E/MAX3451E/MAX3452E feature a logic-
selectable suspend mode that reduces current con-
sumption to less than 40µA. Integrated ±15kV ESD
protection protects the USB D+ and D- bidirectional
bus connections. The MAX3450E is pin compatible with
Micrel’s MIC2550A. The MAX3451E features an internal
1.5kΩUSB pullup resistor and an enumeration function
that allows devices to logically disconnect while
plugged in. The MAX3452E provides a push-pull bus-
detect (BD) output that asserts high when VBUS is
greater than +4.0V.
The MAX3450E/MAX3451E/MAX3452E operate over the
-40°C to +85°C extended temperature range and are
available in 14-pin TSSOP and 3mm x 3mm 16-pin Thin
QFN packages.
Applications
PDAs
PC Peripherals
Cellular Telephones
Data Cradles
MP3 Players
Features
♦±15kV ESD Protection on D+ and D-
♦Combined VP and VM Inputs/Outputs
♦+1.65V to +3.6V VLLogic Supply Input for
Interfacing with Low-Voltage ASICs
♦Enumerate Input Function (MAX3451E)
♦Powered from Li+ Battery as Low as +3.1V
(MAX3450E and MAX3451E)
♦VBUS Detection (MAX3452E)
♦Pin Compatible with Micrel MIC2550A (MAX3450E)
♦Internal D+ or D- Pullup Resistor (MAX3451E)
♦No Power-Supply Sequencing Required
MAX3450E/MAX3451E/MAX3452E
±15kV ESD-Protected USB Transceivers
________________________________________________________________
Maxim Integrated Products
1
9
TOP VIEW
TSSOP
++
14
1
VLVBUS
13
2
SPD N.C. *(ENUM) **(BD)
12
3
RCV VTRM
11
4
VP D+
10
5
VM D-
8
7
GND SUS
3mm x 3mm
THIN QFN-EP
16
1
2
3
4
12
11
10
9
15 14 13
5678
N.C.
VL
VBUS
N.C.
*(ENUM)
**(BD)
VTRM
D+
D-
OE
RCV
VP
***EXPOSED PAD
VM
N.C.
*MAX3451E ONLY
**MAX3452E ONLY
***CONNECT EXPOSED PADDLE TO GND OR LEAVE UNCONNECTED
SUS
N.C.
SPD
MAX3450E
MAX3451E
MAX3452E
MAX3450E
MAX3451E
MAX3452E
GND
6
N.C. OE
Pin Configurations
19-2843; Rev 2; 10/08
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Ordering Information
PART PIN-PACKAGE TOP MARK
MAX3450EEUD+ 14 TSSOP —
MAX3450EETE+
16 Thin QFN-EP†
AAJ
MAX3451EEUD+ 14 TSSOP —
MAX3451EETE+
16 Thin QFN-EP†
AAK
MAX3452EEUD+ 14 TSSOP —
MAX3452EETE+
16 Thin QFN-EP†
AAL
Typical Operating Circuit appears at end of data sheet.
Note: All devices are specified over the -40°C to +85°C operat-
ing temperature range.
+
Denotes lead(Pb)-free package/RoHS-compliant package.
†
EP = Exposed pad.
MAX3450E/MAX3451E/MAX3452E
±15kV ESD-Protected USB Transceivers
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VBUS = +4.0V to +5.5V or VTRM = +3.0V to +3.6V, VL= +1.65V to +3.6V, TA= TMIN to TMAX, unless otherwise noted. Typical values
are at VBUS = +5.0V, VL= +2.5V, and TA= +25°C.) (Note 2)
PARAMETER SYM B O L CONDITIONS
MIN TYP MAX UNITS
SUPPLY INPUTS (VBUS, VTRM, VL)
Regulated Supply Voltage
Output VTRM Internal regulator 3.0 3.3 3.6 V
Operating Supply Current IVBUS Full-speed transmitting/receiving at 12Mbps,
CL = 50pF on D+ and D- (Note 3) 10
mA
Operating VL Supply Current IVL Full-speed transmitting/receiving at 12Mbps
(Note 3) 2.5
mA
Full-speed idle: VD+ > 2.7V, VD- < 0.3V 250 350
Full-Speed Idle and SE0 Supply
Current
IVBUS
(
IDLE
)
SE0: VD+ < 0.3V, VD- < 0.3V 250 350 µA
MAX3450E,
MAX3451E 5
Static VL Supply Current
IVL
(
STATIC
)
Full-speed idle,
SE0, or suspend
mode MAX3452E 15
µA
MAX3450E,
MAX3451E
(ENUM = low)
35
Suspend Supply Current
IVBUS
(
SUSP
)
VM = VP = open,
SUS = OE = high
MAX3452E 40
µA
Disable-Mode Supply Current
IVBUS
(
DIS
)
VL = GND or open 20 µA
MAX3450E,
MAX3451E 5
Sharing-Mode VL Supply
Current
IVL
(
SHARING
)
VBUS = GND or open,
OE = low, VP = low or
high, VM = low or
high, SUS = high MAX3452E 20
µA
D+/D- Sharing-Mode
Load Current
ID_
(
SHARING
)
VBUS = GND or open, VD_ = 0 or +5.5V 20 µA
D+/D- Disable-Mode
Load Current ID_(DIS) VL = GND or open, VD_ = 0 or +5.5V 5 µA
VBUS, VL, D+, D- to GND.......................................-0.3V to +6.0V
VTRM to GND ............................................-0.3V to (VBUS + 0.3V)
VP, VM, SUS, SPD, ENUM,
RCV, OE, BD to GND ................................-0.3V to (VL+ 0.3V)
Current (into any pin)........................................................±15mA
Short-Circuit Current (D+ and D-) ..................................±150mA
Continuous Power Dissipation (TA= +70°C)
14-Pin TSSOP
(derate 10mW/°C above +70°C)..................................797mW
16-Pin Thin QFN-EP 3mm x 3mm
(derate 20.8mW/°C above +70°C).............................1667mW
Package Junction-to-Ambient Thermal Resistance (θJA) (Note 1)
14-Pin TSSOP..........................................................100.4°C/W
16-Pin Thin QFN-EP .....................................................48°C/W
Package Junction-to-Case Thermal Resistance (θJC) (Note 1)
14-Pin TSSOP...............................................................30°C/W
16-Pin Thin QFN-EP .......................................................7°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1: Package thermal resistances were obtained using the method described in JEDEC specifications. For detailed information
on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
MAX3450E/MAX3451E/MAX3452E
±15kV ESD-Protected USB Transceivers
_______________________________________________________________________________________ 3
DC ELECTRICAL CHARACTERISTICS (continued)
(VBUS = +4.0V to +5.5V or VTRM = +3.0V to +3.6V, VL= +1.65V to +3.6V, TA= TMIN to TMAX, unless otherwise noted. Typical values
are at VBUS = +5.0V, VL= +2.5V, and TA= +25°C.) (Note 1)
PARAMETER SYM B O L CONDITIONS
MIN TYP MAX UNITS
MAX3450E/MAX3451E, supply lost 0.8
M AX 3450E /M AX3451E , sup p l y p r esent ( Note 4)
3.6
MAX3452E, supply lost 3.6
USB Power-Supply Detection
Threshold
VTH_VBUS
MAX3452E, supply present 4.0
V
MAX3450E/MAX3451E 75
USB Power-Supply Detection
Hysteresis
VHYST_VBUS
MAX3452E 40
mV
VL Power-Supply Detection
Threshold VTH_VL
0.85
V
DIGITAL INPUTS/OUTPUTS (VP, VM, RCV, SUS, OE, SPD, BD, ENUM)
Input Voltage Low VIL VM, VP, SUS, SPD, ENUM, OE
0.3 x VL
V
Input Voltage High VIH VM, VP, SUS, SPD, ENUM, OE
0.7 x VL
V
Output Voltage Low VOL VM, VP, RCV, BD, IOL = +2mA 0.4 V
Output Voltage High VOH VM, VP, RCV, BD, IOH = -2mA
VL - 0.4
V
Input Leakage Current ILKG -1 +1 µA
Input Capacitance CIN Measured from input to GND 10 pF
ANALOG INPUTS/OUTPUTS (D+, D-)
Differential Input Sensitivity VID |VD+ - VD-|0.2V
Differential Common-Mode
Voltage VCM Includes VID range 0.8 2.5 V
Single-Ended Input Low Voltage
VILSE 0.8 V
S i ng l e- E nd ed Inp ut H i g h V ol tag e
VIHSE 2.0 V
Hysteresis VHYST 250
mV
Output Voltage Low VOLD RL = 1.5kΩ to +3.6V 0.3 V
Output Voltage High VOHD RL = 15kΩ to GND 2.8 3.6 V
Off-State Leakage Current ILZ -1 +1 µA
Transceiver Capacitance CIND Measured from D_ to GND 20 pF
Driver Output Impedance ZDRV Steady-state drive 4.0
15.5
Ω
Input Impedance ZIN Driver off 10
MΩ
Internal Pullup Resistance RPULLUP ILOAD = 500µA (MAX3451E) (Note 5)
1.425 1.575 kΩ
ESD PROTECTION (D+, D-)
Human Body Model
±15
kV
IE C 1000- 4- 2 C ontact D i schar g e
±8 kV
MAX3450E/MAX3451E/MAX3452E
±15kV ESD-Protected USB Transceivers
4 _______________________________________________________________________________________
Note 2: Parameters are 100% production tested at +25°C, unless otherwise noted. Limits over temperature are guaranteed by
design.
Note 3: Guaranteed by design, not production tested.
Note 4: Production tested to +2.7V for VL≤+3.0V.
Note 5: Including external 24.3Ωseries resistor.
TIMING CHARACTERISTICS
(VBUS = +4.0V to +5.5V or VTRM = +3.0V to +3.6V, VL= +1.65V to +3.6V, TA= TMIN to TMAX, unless otherwise noted. Typical values
are at VBUS = +5V, VL= +2.5V, and TA= +25°C.) (Note 1)
PARAMETER SYM B O L CONDITIONS
MIN TYP MAX UNITS
DRIVER CHARACTERISTICS (FULL-SPEED MODE, CL = 50pF)
Rise Time tFR 10% to 90% of |VOHD - VOLD|, Figures 1, 6 4 20 ns
Fall Time tFF 90% to 10% of |VOHD - VOLD|, Figures 1, 6 4 20 ns
Rise-/Fall-Time Matching
(Note 3) tFR/tFF Excluding the first transition from idle state,
(Figures 1, 6) 90 110 %
Output-Signal Crossover
Voltage (Note 3) VCRS_F Excluding the first transition from idle state,
(Figures 2, 6) 1.3 2.0 V
tPLH_DRV Low-to-high transition 18
Driver Propagation Delay
(Figures 2, 6) tPHL_DRV High-to-low transition 18 ns
tPHZ_DRV
High-to-off transition 20
Driver Disable Delay
(Figure 3) tPLZ_DRV Low-to-off transition 20 ns
tPZH_DRV
Off-to-high transition 20
Driver Enable Delay
(Figure 3) tPZL_DRV Off-to-low transition 20 ns
DRIVER CHARACTERISTICS (LOW-SPEED MODE, CL = 200pF TO 600pF)
Rise Time tLR 10% to 90% of |VOHD - VOLD|, Figures 1, 6 75 300 ns
Fall Time tLF 90% to 10% of |VOHD - VOLD|, Figures 1, 6 75 300 ns
Rise-/Fall-Time Matching tLR/tLF Excluding the first transition from idle state,
Figures 1, 6 80 125 %
Output-Signal Crossover
Voltage VCRS_L Excluding the first transition from idle state,
Figures 2, 6 1.3 2.0 V
RECEIVER CHARACTERISTICS (CL = 15pF)
tPLH_RCV Low-to-high transition 22
D i ffer enti al Recei ver P r op ag ati on
D el ay, Fi g ur es 4, 6 tPHL_RCV High-to-low transition 22 ns
tPLH_SE Low-to-high transition 12
S i ng l e- E nd ed Recei ver
P r op ag ati on D el ay, Fi g ur es 4, 6 tPHL_SE High-to-low transition 12 ns
tPHZ_SE High-to-off transition 15
Single-Ended Receiver Disable
Delay, Figure 5 tPLZ_SE Low-to-off transition 15 ns
tPZH_SE Off-to-high transition 15
Single-Ended Receiver Enable
Delay, Figure 5 tPZL_SE Off-to-low transition 15 ns
MAX3450E/MAX3451E/MAX3452E
±15kV ESD-Protected USB Transceivers
_______________________________________________________________________________________ 5
SINGLE-ENDED RECEIVER
PROPAGATION DELAY vs. VL
MAX3450-52E toc01
VL (V)
PROPAGATION DELAY (ns)
3.43.21.8 2.0 2.2 2.6 2.82.4 3.0
1
2
3
4
5
6
7
8
0
1.6 3.6
CL = 15pF
TA = +25°C
TA = +85°C
TA = -40°C
RISE-/FALL-TIME MATCHING
(FULL SPEED)
MAX3450-52E toc02
20ns/div
D+/D-
1V/div
CL = 50pF
RISE-/FALL-TIME MATCHING
(LOW SPEED)
MAX3450-52E toc03
100ns/div
D+/D-
1V/div
CL = 400pF
Typical Operating Characteristics
(VBUS = +5.0V, VL= +3.3V, TA= +25°C, unless otherwise noted.)
MAX3450E/MAX3451E/MAX3452E
±15kV ESD-Protected USB Transceivers
6 _______________________________________________________________________________________
PIN
TSSOP
THIN
QFN-EP
NAME
FUNCTION
115V
LDigital I/O Connections Logic Supply. Connect a +1.65V to +3.6V supply to VL. Bypass VL to
GND with a 0.1µF ceramic capacitor.
2 1 SPD Speed-Selector Input. Connect SPD to GND to select the low-speed data rate (1.5Mbps).
Connect SPD to VL to select the full-speed data rate (12Mbps).
3 2 RCV Differential-Receiver Output. RCV responds to the differential input on D+ and D- (Tables 3 and
4). RCV asserts low if SUS = VL.
43VP
Receiver Output/Driver Input. VP functions as a receiver output when OE = VL. VP duplicates D+
when receiving. VP functions as a driver input when OE = GND.
54VM
Receiver Output/Driver Input. VM functions as a receiver output when OE = VL. VM duplicates D-
when receiving. VM functions as a driver input when OE = GND.
6
5, 8, 16
N.C. No Connection. Not internally connected.
7 6 GND Ground
8 7 SUS
Suspend Input. Drive SUS low for normal operation. Drive SUS high to put the MAX3450E/
MAX3451E/MAX3452E into suspend mode. RCV asserts low in suspend mode. VP and VM
remain active in suspend mode.
99OE Output Enable. Drive OE to GND to enable the transmitter outputs. Drive OE to VL to disable the
transmitter outputs. OE also controls the I/O direction of VP and VM (Tables 3 and 4).
10 10 D-
U S B Inp ut/Outp ut. For OE = GN D , D - functi ons as a U S B outp ut, w i th V M p r ovi d i ng the i np ut si g nal . For
OE = V
L, D - functi ons as a U S B i np ut, w i th V M functi oni ng as a si ng l e- end ed r ecei ver outp ut. C onnect a
1.5kΩ r esi stor fr om D - to V
TRM
for l ow - sp eed ( 1.5M b p s) op er ati on ( M AX 3450E and M AX 3452E ) .
11 11 D+
U S B Inp ut/Outp ut. For OE = GN D , D + functi ons as a U S B outp ut, w i th V P p r ovi d i ng the i np ut si g nal . For
OE = V
L, D + functi ons as a U S B i np ut, w i th V P functi oni ng as a si ng l e- end ed r ecei ver outp ut. C onnect
a 1.5kΩ r esi stor fr om D + to V
TRM
for ful l - sp eed ( 12M b p s) op er ati on ( M AX 3450E and M AX 3452E ) .
12 12 VTRM
Internal Regulator Output. VTRM provides a regulated +3.3V output. Bypass VTRM to GND with a
1µF (min) ceramic capacitor as close to the device as possible. VTRM normally derives power
fr om V
BU S
. Al ter nati vel y, d r i ve V
TR M
d i r ectl y w i th a + 3.3V ±10% sup p l y ( M AX 3450E and M AX 3451E ) .
VTRM provides power to internal circuitry and provides the pullup voltage for an external USB
pullup resistor (MAX3450E and MAX3452E). Do not use VTRM to power external circuitry.
N.C. No Connection. Not internally connected (MAX3450E).
ENUM
Enumerate Function Selection Input (MAX3451E). Drive ENUM to VL to connect the internal 1.5kΩ
resistor between VTRM and D+ or D-, depending on the SPD state. Drive ENUM to GND to
disconnect the internal 1.5kΩ resistor. For SPD = VL, the 1.5kΩ pullup resistor connects to D+.
For SPD = GND, the 1.5kΩ pullup resistor connects to D-.
13 13
BD Bus-Detection Output (MAX3452E). The push-pull BD output asserts low and the device enters
sharing mode if VBUS < +3.6V. BD asserts high if VBUS > +4.0V.
14 14 VBUS
USB Power-Supply Input. Connect a +4.0V to +5.5V power supply to VBUS. VBUS provides power
to the internal linear regulator. Bypass VBUS to GND with a 0.1µF ceramic capacitor as close to
the device as possible. Connect VBUS and VTRM together when powering the MAX3450E or
MAX3451E with an external power supply (+3.3V ±10%).
— — EP Exposed Pad. Connect exposed pad to ground.
Pin Description
Detailed Description
The MAX3450E/MAX3451E/MAX3452E USB-compliant
transceivers convert single-ended or differential
logic-level signals to USB signals and USB signals to
single-ended or differential logic-level signals. The
devices fully comply with USB 1.1, as well as USB 2.0
at full- (12Mbps) and low-speed (1.5Mbps) operation.
The MAX3450E/MAX3451E/MAX3452E operate with VL
as low as +1.65V, ensuring compatibility with low-volt-
age ASICs.
The MAX3450E/MAX3451E/MAX3452E derive power from
the USB host (VBUS) or from a single-cell Li+ battery
(MAX3450E and MAX3451E) connected to VBUS or from
a +3.3V regulated supply connected to VBUS and VTRM.
The MAX3450E/MAX3451E/MAX3452E meet the
physical-layer specifications for logic-level supply volt-
MAX3450E/MAX3451E/MAX3452E
±15kV ESD-Protected USB Transceivers
_______________________________________________________________________________________ 7
LEVEL
TRANSLATOR
SUS
RCV
D+
D-
SPD
VTH_VBUS
VP
VM
OE
VL
TO INTERNAL
CIRCUITRY
TO INTERNAL
CIRCUITRY
LDO
REGULATOR
VTRM
VBUS
GND
BD
MAX3452E
ONLY
CONTROL
LOGIC
VTRM
SPD
ENUM
MAX3451E
ONLY
MAX3450E
MAX3451E
MAX3452E
Functional Diagram
MAX3450E/MAX3451E/MAX3452E
ages (VL) from +1.65V to +3.6V. Integrated ±15kV ESD
protection protects the D+ and D- USB I/O ports.
The MAX3451E features an enumerate function provid-
ing an internal 1.5kΩpullup resistor to VTRM. The enu-
merate function disconnects the 1.5kΩpullup resistor,
allowing the MAX3451E to simulate a bus disconnect
while powered and connected to the USB cable. The
MAX3450E is pin-for-pin compatible with Micrel’s
MIC2550A. The MAX3452E features a BD output that
asserts high if VBUS is greater than +4.0V. BD asserts
low if VBUS is less than +3.6V. The MAX3450E and
MAX3452E require external pullup resistors from either
D+ or D- to VTRM to set the bus speed.
Applications Information
Power-Supply Configurations
Normal Operating Mode
Connect VLand VBUS to system power supplies
(Table 1). Connect VLto a +1.65V to +3.6V supply.
Connect VBUS to a +4.0V to +5.5V supply. Alternatively,
the MAX3450E and MAX3451E can derive power from
a single Li+ battery. Connect the battery to VBUS. VTRM
remains above +3.0V for VBUS as low as +3.1V.
Additionally, the MAX3450E and MAX3451E can derive
power from a +3.3V ±10% voltage regulator. Connect
VBUS and VTRM to an external +3.3V voltage regulator.
VBUS no longer consumes current to power the internal
linear regulator in this configuration.
Disable Mode
Connect VBUS to a system power supply and leave VL
unconnected or connect to GND. D+ and D- enter a tri-
state mode and VBUS (or VBUS and VTRM) consumes
less than 20µA of supply current. D+ and D- withstand
external signals up to +5.5V in disable mode (Table 2).
Sharing Mode
Connect VLto a system power supply and leave VBUS
(or VBUS and VTRM) unconnected or connect to GND.
D+ and D- enter a tri-state mode, allowing other circuitry
to share the USB D+ and D- lines, and VLconsumes less
than 20µA of supply current. D+ and D- withstand
external signals up to +5.5V in sharing mode (Table 2).
±15kV ESD-Protected USB Transceivers
8 _______________________________________________________________________________________
Table 1. Power-Supply Configurations
VBUS (V) VTRM (V) VL (V) CONFIGURATION NOTES
+4.0 to +5.5
+3.0 to +3.6 output
+1.65 to +3.6 Normal mode —
+3.1 to +4.5
+3.0 to +3.6 output
+1.65 to +3.6 Battery supply MAX3450E, MAX3451E
+3.0 to +3.6
+3.0 to +3.6 input
+1.65 to +3.6 Voltage regulator supply MAX3450E, MAX3451E
GND or floating Output +1.65 to +3.6 Sharing mode Table 2
+3.0 to +5.5 VBUS GND or floating Disable mode Table 2
*
High impedance or low
**
High or low
INPUTS/OUTPUTS
DISABLE MODE SHARING MODE
VBUS/VTRM
• +5V input/+3.3V output
• +3.3V input/+3.3V input (MAX3450E and MAX3451E)
• +3.7V input/+3.3V output (MAX3450E and MAX3451E)
• Floating or connected to GND (MAX3450E
and MAX3451)
• < +3.6V (MAX3452E)
VLFloating or connected to GND +1.65V to +3.6V input
D+ and D- High impedance High impedance
High impedance for OE = low
VP and VM Invalid* High for OE = high
RCV Invalid* Undefined**
SPD, SUS, OE, ENUM
(MAX3451E) High impedance High impedance
BD (MAX3452E) Invalid* Low
Table 2. Disable-Mode and Sharing-Mode Connections
Device Control
OE
OE controls the direction of communication. Drive OE
low to transfer data from the logic side to the USB side.
For OE = low, VP and VM serve as differential driver
inputs to the USB transmitter.
Drive OE high to transfer data from the USB side to the
logic side. For OE = high, VP and VM serve as single-
ended receiver outputs from the USB inputs
(D+ and D-). RCV serves as a differential receiver out-
put, regardless of the state of OE.
ENUM (MAX3451E)
The MAX3451E features an enumerate function that
allows software control of USB enumeration. USB proto-
col requires a 1.5kΩpullup resistor to D+ or D- to indi-
cate the transmission speed to the host (see the
SPD
section). The MAX3451E provides an internal 1.5kΩ
pullup resistor. Remove the pullup resistor from the cir-
cuit to simulate a device disconnect from the USB. Drive
ENUM low to disconnect the internal pullup resistor.
Drive ENUM high to connect the internal pullup resistor.
The SPD state determines whether the pullup resistor
connects to D+ or D-. For ENUM = high, the internal
1.5kΩpullup resistor connects to D+ when SPD = VL
(full speed) or to D- when SPD = GND (low speed).
SPD
SPD sets the transceiver speed. Connect SPD to GND to
select the low-speed data rate (1.5Mbps). Connect SPD
to VLto select the full-speed data rate (12Mbps). The
MAX3451E provides an internal pullup resistor for
selecting the bus speed. The MAX3450E and
MAX3452E require an external pullup resistor to D+ or
D- to set the bus speed. Connect the 1.5kΩresistor
between D+ and VTRM to set the full-speed (12Mbps)
data rate, or connect the 1.5kΩresistor between D- and
VTRM to set the low-speed (1.5 Mbps) data rate.
SUS
The SUS state determines whether the MAX3450E/
MAX3451E/MAX3452E operate in normal mode or in
suspend mode. Connect SUS to GND to enable normal
operation. Drive SUS high to enable suspend mode.
RCV asserts low and VP and VM remain active in sus-
pend mode (Tables 3 and 4). Supply current decreases
in suspend mode (see the
Electrical Characteristics
).
MAX3450E/MAX3451E/MAX3452E
±15kV ESD-Protected USB Transceivers
_______________________________________________________________________________________ 9
Figure 1. Rise and Fall Times
VOHD
VOLD
90%
10%
90%
10%
tFR, tLR tFF, tLF
Table 3a. Transmit Truth Table
(OE = 0, SUS = 0)
INPUTS OUTPUTS
VP
VM D+
D-
RCV OUTPUT STATE
0000X SE0
01010 Logic 0
10101 Logic 1
1 1 1 1 X Undefined
X = Undefined.
Table 3b. Transmit Truth Table
(OE = 0, SUS = 1)
INPUTS OUTPUTS
VP
VM D+
D-
RCV OUTPUT STATE
00000 SE0
01010 Logic 0
10100 Logic 1
1 1 1 1 0 Undefined
Table 4a. Receive Truth Table
(OE = 1 and SUS = 0)
INPUTS OUTPUTS
D+
D-
VP VM RCV OUTPUT STATE
0000X SE0
01010 Logic 0
10101 Logic 1
1 1 1 1 X Undefined
X = Undefined.
MAX3450E/MAX3451E/MAX3452E
BD (MAX3452E)
The push-pull bus detect (BD) output monitors VBUS
and asserts high if VBUS is greater than +4.0V. BD
asserts low if VBUS is less than +3.6V and the
MAX3452E enters sharing mode (Table 2).
V
TRM
An internal linear regulator generates the VTRM voltage
(+3.3V typ). VTRM derives power from VBUS (see the
Power-Supply Configurations
section). VTRM powers the
internal portions of the USB circuitry and provides the
pullup voltage for an external USB pullup resistor
MAX3450E/MAX3452E. Bypass VTRM to GND with a 1µF
ceramic capacitor as close to the device as possible.
Do not use VTRM to provide power to external circuitry.
D+ and D-
D+ and D- serve as bidirectional bus connections and
are ESD protected to ±15kV (Human Body Model). For
OE = low, D+ and D- serve as transmitter outputs. For
OE = high, D+ and D- serve as receiver inputs.
V
BUS
For most applications, VBUS connects to the VBUS ter-
minal on the USB connector. VBUS can also connect to
an external supply as low as +3.1V (MAX3450E and
MAX3451E). See the
Power-Supply Configurations
sec-
tion. Drive VBUS low to enable sharing mode. Bypass
VBUS to GND with a 0.1µF ceramic capacitor as close
to the device as possible.
External Components
External Resistors
Proper USB operation requires two external resistors,
each 24.3Ω±1%, 1/8W (or greater). Install one resistor
in series between D+ of the MAX3450E/MAX3451E/
MAX3452E and D+ on the USB connector. Install the
other resistor in series between D- of the MAX3450E/
MAX3451E/MAX3452E and D- on the USB connector
(see the
Typical Operating Circuit
).
The MAX3450E/MAX3452E requires an external 1.5kΩ
pullup resistor between VTRM and D+ or D- to set the
bus speed.
External Capacitors
The MAX3450E/MAX3451E/MAX3452E require three
external capacitors for proper operation. Bypass VLto
GND with a 0.1µF ceramic capacitor. Bypass VBUS to
GND with a 0.1µF ceramic capacitor. Bypass VTRM to
GND with a 1µF (min) ceramic capacitor. Install all capac-
itors as close to the device as possible.
Data Transfer
Transmitting Data to the USB
The MAX3450E/MAX3451E/MAX3452E transmit data to
the USB differentially on D+ and D-. VP and VM serve as
differential input signals to the driver (Tables 3a and 3b).
Receiving Data from the USB
To receive data from the USB, drive OE high and SUS
low. Differential data received by D+ and D- appears
as a differential logic signal at RCV. Single-ended
receivers on D+ and D- drive VP and VM, respectively
(Tables 4a and 4b).
±15kV ESD-Protected USB Transceivers
10 ______________________________________________________________________________________
Figure 2. Timing of VP and VM to D+ and D-
VM
VP
D-
D+
tPLH_DRV tPHL_DRV
VCRS_F , VCRS_L
VP AND VM RISE/FALL TIMES < 4ns
Table 4b. Receive Truth Table
(OE = 1 and SUS = 1)
INPUTS OUTPUTS
D+
D-
VP VM RCV
OUTPUT STATE
00000 SE0
01010 Logic 0
10100 Logic 1
11110 Undefined
MAX3450E/MAX3451E/MAX3452E
±15kV ESD-Protected USB Transceivers
______________________________________________________________________________________ 11
Figure 3. Enable and Disable Timing, Driver
OE
D+/D-
tPLZ_DRV tPZL_DRV
tPHZ_DRV tPZH_DRV
VP/VM CONNECTED TO GND,
D+/D- CONNECTED TO PULLUP
VP/VM CONNECTED TO VL,
D+/D- CONNECTED TO PULLDOWN
OE
D+/D-
VL
DUT
+3V
150Ω
150Ω
VP/VM D+/D-
Figure 4. Timing of D+ and D- to RCV, VM, and VP
+3V
0
RCV, VM, AND VP
VL
D+ / D-
tPLH_RCV,
tPLH_SE
tPHL_RCV,
tPHL_SE
INPUT RISE/FALL TIME < 4ns
Figure 5. Enable and Disable Timing, Receiver
OE
VP/VM
VP/VM
tPLZ_SE tPZL_SE
tPHZ_SE tPZH_SE
D+/D- CONNECTED TO GND,
VP/VM CONNECTED TO PULLUP
D+/D- CONNECTED TO +3V,
VP/VM CONNECTED TO PULLDOWN
OE
VL
DUT
+3V
560Ω
560Ω
VP/VM D+/D-
Figure 6. Test Circuits
MAX3450E
MAX3451E
MAX3452E RCV, VM,
AND VP
TEST
POINT
(a) LOAD FOR RCV, VM, AND VP
MAX3450E
MAX3451E
MAX3452E D+ AND D-
24Ω
15kΩ
CL
CL
TEST
POINT
(b) LOAD FOR D+/D-
MAX3450E/MAX3451E/MAX3452E
ESD Protection
D+ and D- possess extra protection against static elec-
tricity to protect the devices up to ±15kV. The ESD
structures withstand high ESD in all operating modes:
normal operation, suspend mode, and powered down.
D+ and D- provide protection to the following limits:
• ±15kV using the Human Body Model
• ±8kV using the Contact Discharge method specified
in IEC 1000-4-2
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents
test setup, test methodology, and test results.
Human Body Model
Figure 7 shows the Human Body Model and Figure 8
shows the current waveform generated when dis-
charged into a low impedance. This model consists of a
100pF capacitor charged to the ESD voltage of interest,
which then discharges into the test device through a
1.5kΩresistor.
IEC 1000-4-2
The IEC 1000-4-2 standard covers ESD testing and
performance of finished equipment. It does not specifi-
cally refer to integrated circuits. The major difference
between tests done using the Human Body Model and
IEC 1000-4-2 is a higher peak current in IEC 1000-4-2,
due to lower series resistance. Hence, the ESD with-
stand voltage measured to IEC 1000-4-2 generally is
lower than that measured using the Human Body
Model. Figure 9 shows the IEC 1000-4-2 model. The
Contact Discharge method connects the probe to the
device before the probe is charged.
Machine Model
The Machine Model for ESD tests all connections using
a 200pF storage capacitor and zero discharge resis-
tance. Its objective is to emulate the stress caused by
contact that occurs with handling and assembly during
manufacturing. All pins require this protection during
manufacturing, not just inputs and outputs. After PC
board assembly, the Machine Model is less relevant to
I/O ports.
±15kV ESD-Protected USB Transceivers
12 ______________________________________________________________________________________
Figure 8. Human Body Model Current Waveform
IP 100%
90%
36.8%
tRL TIME
tDL
CURRENT WAVEFORM
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
Ir
10%
0
0
AMPERES
Figure 7. Human Body ESD Test Models
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
Cs
100pF
RC
1MΩ
RD
1.5kΩ
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
Figure 9. IEC 1000-4-2 ESD Test Model
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
Cs
150pF
RC
50Ω to 100Ω
RD
330Ω
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
MAX3450/MAX3451E/MAX3452E
±15kV ESD-Protected USB Transceivers
______________________________________________________________________________________ 13
MAX3451E
+1.65V TO +3.6V
VL(I/O)
VL
ASIC
VP
VM
RCV
ENUM
SUS VTRM
1μF
PC
USB
POWER
D-
D+
15kΩ15kΩ
GND
0.1μF
0.1μF
GND
D+
24.3Ω 1%
24.3Ω 1%
D-
VBUS
SPD
OE
Typical Operating Circuit
Chip Information
PROCESS: BiCMOS
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
14 TSSOP U14-1 21-0066
16 Thin QFN-EP T1633-4 21-0136
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.
MAX3450/MAX3451E/MAX3452E
±15kV ESD-Protected USB Transceivers
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 4/03 Initial release ⎯
1 11/03 Changed specs ⎯
2 10/08 Added lead-free packaging. Updated Absolute Maximum Ratings information
of package thermal resistances. Updated EC table notation. 1–4, 6