Description
The A8512 is a multi-output WLED/RGB driver for medium
size display backlighting. It integrates a boost controller to
drive external MOSFET, and six internal current-sinks. The
boost converter operates in constant frequency (programmable)
current mode control.
PWM dimming allows LED currents to be controlled in 500:1
ratio. The LED sinks are capable of sinking up to 80 mA each,
and can be combined together to achieve even higher currents.
Multiple A8512s can be connected in parallel, with one master
controller controlling the boost stage, and up to five slave
controllers, which act as LED sinks. This allows up to 36 LED
strings to be powered by just one boost converter.
The A8512 operates from a single supply of 8 to24 V. It provides
protection against overvoltage, open or shorted LED string,
and overtemperature. A dual level cycle-by-cycle current limit
function provides soft start and protects against overloads.
The device is provided in a 24-pin SOICW package (LB), with
internally fused pins for enhanced thermal dissipation, and a
28-contact 5 mm × 5 mm QFN package (ET), with an exposed
thermal pad for enhanced thermal dissipation. Both packages
are lead (Pb) free, with 100% matte tin leadframe plating.
A8512L-DS
Features and Benefits
Six individual current sinks capable of 80 mA each
Fixed frequency current mode control with integrated
gate driver
300 kHz to 1 MHz adjustable switching frequency
Controlled startup using options of Enable, PWM signal,
or battery voltage ramp
Parallel operation with one boost controller (master) and
up to five slave controllers
Active current sharing between LED strings for ±0.6%
accuracy and matching
No audible MLCC noise during PWM dimming
Adjustable overvoltage protection (OVP)
Open or shorted LED string protection
Overtemperature, cycle-by-cycle current limit, and
undervoltage protection
SOIC 24-pin package for easy single-side PCB
manufacturing or QFN 28-contact package with exposed
thermal pad for better thermal performance
LED Backlight Driver for Medium/Large Displays
Packages:
Typical Application Circuit
Not to scale
A8512
24-pin SOICW
with internally fused pins
(LB package)
28-contact QFN
with exposed thermal pad
(ET Package)
Fi
g
ure 1. T
y
pical application circuit
f
or sin
g
le I
C
operation, and
(
in dotted box
)
master
/
slave multiple I
C
operation.
FSET
DRIVER
VBIAS
VREG7V
VIN
PWM
EN
SENSE1 SENSE2
LED1
LED2
LED3
LED4
LED5
LED6
VBAT
A8512
(LB package)
COMP
ISET
AGND AGND LGND LGND PGND
ROVP2
OVP
18 LEDs per string
To additional slavesControl Bus
RFSET
RISET
Rz2
Cz2
FAULT
VOUT
P
P
C7
C8
FSET
DRIVER
VBIAS
VREG7V
VIN
PWM
EN
SENSE1 SENSE2
LED1
LED2
LED3
LED4
LED5
LED6
VBAT
8 to 24 V
A8512
(LB package)
Master Slave A
COMP
ISET
AGND AGND LGND LGND PGND
RSC ROVP1
OVP
18 LEDs per string
RFSET
RISET
Rz1
Cz1
D1
Q1
L1
FAULT
Fault
Enable
PWM
P
P
C5
C6
R1
C4
C3
P
C2C1
P
LED Backlight Driver for Medium/Large Displays
A8512
2
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Absolute Maximum Ratings
Characteristic Symbol Notes Rating Unit
VIN Pin Input Voltage VIN –0.3 to 34 V
LED1-LED6 Pin Voltage VLEDx –0.3 to 40 V
OVP Pin Input Voltage VOVP –0.3 to 50 V
SENSE1 and SENSE2 Pin Input
Voltage VSENx –0.3 to 1 V
VBIAS, VREG7V, and DRIVER Pins –0.3 to 10 V
Remaining Pins Input Voltage –0.3 to 7 V
Operating Ambient Temperature TARange E –40 to 85 ºC
Maximum Junction Temperature TJ(max) 150 ºC
Storage Temperature Tstg –55 to 150 ºC
Selection Guide
Part Number Packing Package
A8512ELBTR-T 1000 pieces per 13-in. reel 24-pin SOICW, with internally fused pins for enhanced
thermal dissipation
A8512EETTR-T 1500 pieces per 7-in. reel 28-contact QFN, with exposed thermal pad for enhanced
thermal dissipation
Thermal Characteristics may require derating at maximum conditions, see application information
Characteristic Symbol Test Conditions* Value Unit
Package Thermal Resistance RJA
Package LB, on 2-layer PCB, 1-in.
2 2-oz copper exposed area 51 ºC/W
Package LB, on 4-layer PCB, based on JEDEC standard 35 ºC/W
Package ET, 4-layer PCB, based on JEDEC standard 32 ºC/W
*Additional thermal information available on the Allegro website
LED Backlight Driver for Medium/Large Displays
A8512
3
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
LED1
OSC Current Mode
Boost
Controller
EN
FSET
PWM
VIN
VBIAS
FAULT
TSD
LDO
OVP
OCP
DRIVER SENSE1 SENSE2
VIN
OVP
L1 D1
Q1
Overvoltage
Protection
LED2
LED3
LED4
LED5
LED6
Control and
Feedback
Reference
Current
LED Select
Logic
Open/Short
LED Detect
6
6
6
COMP
Ref
OCP SS
ISET
50 k
7 V
5 V
RSC
RFSET
RISET
CCOMP
ROVP
10 k
0.1 F
Control
Logic/
UVLO
+5 V
PGND LGND LGND
PAD
ET Only LB Only
GND
GND GND
0.1 F
P
PP
P
VREG7V
Functional Block Diagram
LED Backlight Driver for Medium/Large Displays
A8512
4
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Package LBPackage ET
Pin-out Diagrams
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
PWM
FAULT
LED6
LED5
LED4
LGND
LGND
LED3
LED2
LED1
COMP
FSET
EN
PGND
DRIVER
VREG7V
VIN
AGND
AGND
VBIAS
OVP
SENSE2
SENSE1
ISET
PAD
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
PGND
NC
EN
DGND
PWM
FAULT
LED6
SENSE2
SENSE1
ISET
AGND
AGND
FSET
COMP
LED5
LED4
LGND
LGND
LED3
LED2
LED1
DRIVER
VREG7V
NC
VIN
NC
VBIAS
OVP
Terminal List Table
Number Name Function
ET LB
26 1 EN Device Enable. Apply logic-high signal to enable, low to shut down.
28 2 PGND Power ground for external FET gate driver. Connect directly to RSC ground and to common star ground.
1 3 DRIVER Gate driver terminal to drive external MOSFET.
2 4 VREG7V Gate driver supply from internal voltage regulator. Bypass with 0.1 to 1 F ceramic capacitor to PGND.
4 5 VIN Input supply voltage for the IC.
11, 12 6, 7 AGND Analog (signal) GND for the IC. Connect to common star ground.
6 8 VBIAS Bias supply voltage from internal regulator. Bypass with 0.1 to 1 F ceramic capacitor to AGND
7 9 OVP Overvoltage Protection terminal. Connect this pin to output capacitor through a resistor ROVP to set the
OVP threshold.
8 10 SENSE2 Connect to ground side of current sense resistor RSC.
9 11 SENSE1 Connect to high side of current sense resistor RSC.
10 12 ISET Sets 100% Current through LED strings; connect RISET from ISET to AGND.
13 13 FSET Sets switching frequency; connect RFSET from FSET to AGND.
14 14 COMP Compensation pin; connect CCOMP (1 F typical) capacitor to AGND.
15,16,17 15,16,17 LED1-3 LED current sinks; connect unused LEDx pins to ground to disable.
18,19 18,19 LGND LED current sink ground; connect to common star ground.
20,21,22 20,21,22 LED4-6 LED current sinks; connect unused LEDx pins to ground to disable.
23 23 ¯
F
¯
¯
A
¯¯¯
U ¯¯
L
¯
¯
T
¯ This open-drain output is pulled low when fault condition occurs; connect to external pull-up resistor.
24 24 PWM Pulse width modulation LED-current control; apply logic level PWM for dimming.
25 – DGND Digital ground for input control signals (EN and PWM); connect to common star ground.
3,5,27 – NC Not connected electrically.
PAD – PAD Exposed pad. Solder to GND plane for enhanced thermal dissipation.
LED Backlight Driver for Medium/Large Displays
A8512
5
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
ELECTRICAL CHARACTERISTICS Valid at VIN = 12 V; TA = 25°C, RFSET = 52 k, RISET = 12.4 k, except indicates
specifications guaranteed over the full operating temperature range with TA = TJ , unless otherwise noted
Characteristics Symbol Test Conditions Min. Typ.1Max. Unit
Input Voltage Range VIN 8 – 24 V
Internal Bias Voltage Range VBIAS 4.75 – 5.5 V
Internal Gate Driver Voltage VDRIVER VIN 10 V 6.5 – 8 V
Undervoltage Lockout Threshold for VIN VUVLO VIN falling 5.7 6.5 6.8 V
Undervoltage Lockout Hysteresis for VIN VUVLOHYS – 0.55 – V
Supply Current2IVIN
Switching at no load – 7 – mA
Shutdown, EN = VIL, TA = 25°C – 0.1 1 A
Standby, EN = VIH, PWM = VIL, soft start
completed –23mA
Boost Controller
Switching Frequency fSW 0.8 1 1.25 MHz
Minimum Switch Off-Time toff(min) Driver output – 72 – ns
Minimum Switch On-Time ton(min) Driver output – 72 – ns
Logic Input Levels (EN and PWM pins)
Input Voltage Level Low VIL – – 0.4 V
Input Voltage Level High VIH 1.5 – – V
Input Leakage Current2I
IN EN = PWM = 5 V – 100 – A
Error Amplifier
COMP Pin Source Current IEA(src) VCOMP = 1.5 V – 160 – A
COMP Pin Sink Current IEA(snk) VCOMP = 1.5 V – 20 – A
COMP Pin Pull-Down Resistance RCOMPPD ¯
F
¯
¯
A
¯¯¯
U ¯¯
L
¯
¯
T
¯
= 1 – 1000 – k
Driver Section
Peak Source Current5Ipk(src) Measured at VDRIVER = 0 V – 2 – A
Peak Sink Current5Ipk(snk) Measured at VDRIVER = VREG7V –2–A
High Side Gate Drive On Resistance RDS(on)H Measured at VDRIVER = VREG7V / 2 – 4 –
Low Side Gate Drive On Resistance RDS(on)L Measured at VDRIVER = VREG7V / 2 – 3 –
Sense Overcurrent Threshold Voltage VSEN VSENSE1 – VSENSE2 80 95 110 mV
LED Current Sinks
LEDx Pin Regulation Voltage VLEDx ILED = 80 mA – 1.4 – V
ISET to ILEDx Current Gain AISET ISET = 100 A – 640 – A/A
ISET Pin Voltage VISET – 1.235 – V
ISET Allowable Current Range2ISET 41 – 125 A
Continued on the next page…
LED Backlight Driver for Medium/Large Displays
A8512
6
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
ELECTRICAL CHARACTERISTICS (continued) Valid at VIN = 12 V; TA = 25°C, RFSET = 52 k, RISET = 12.4 k, except
indicates specifications guaranteed over the full operating temperature range with TA = TJ , unless otherwise noted
Characteristics Symbol Test Conditions Min. Typ.1Max. Unit
LEDx Accuracy3ErrILEDX LED1 through LED6 = 1.5 V, at 100% Current –3 ±0.6 3 %
LEDx Matching
4ILEDX LED1 through LED6 = 1.5 V, ISET = 100 A –3 ±0.6 3 %
LEDx Switch Leakage Current2ISL VLEDx = 12 V, EN = 0 – 48 – A
LEDx Bleeder Resistor to GND RLEDX PWM = Low, VLEDx = 10 V – 250 – k
Soft Start
Soft Start Sense Threshold Voltage VSENS
Sense voltage for boost switch current
sensing – 28.5 – mV
Soft Start LEDx Current Limit Relative to LED
100% Current ILED(SS)
Current through enabled LEDx pins during
soft start –8–%
Protection Features
Thermal Shutdown Threshold TTSD TJ rising – 165 – °C
Short Circuit Detect Voltage VSC Measured on any LEDx pin – 25 – V
Output Overvoltage Threshold VOVP ROVP = 0 18.0 19.5 21.0 V
OVP Pin Leakage Current2IOVPLK VOVP = 22 V, EN = VIL, or PWM=VIL – 0.1 – A
Overvoltage Protection Sense Current2IOVPH 183 200 217 A
¯
F
¯
¯
A
¯¯¯
U ¯¯
L
¯
¯
T
¯
Pin Output Leakage2IFLT V = 5 V – – 1 A
¯
F
¯
¯
A
¯¯¯
U ¯¯
L
¯
¯
T
¯
Pin Output Voltage VOL I = 500 A – – 0.4 V
1Typical specifications are at TA = 25ºC.
2For input and output current specifications, negative current is defined as coming out of the node or pin (sourcing), positive current is defined as going
into the node or pin (sinking).
3LED accuracy is defined as (ISET × 640 – ILED(av)) / (ISET × 640), ILED(av) measured as the average of ILED1 through ILED6. Refer to characterization
chart for variation over temperature range.
4LED current matching is defined as (ILEDx – ILED(av)) / ILED(av), with ILED(av) as defined in footnote 3. Refer to characterization chart for variation over
temperature range.
5Guaranteed by design and characterization.
101.0
100.5
100.0
99.5
99.0
98.5
98.0
-60 -40 -20 20 40 60 80 1000
Normalized Total ILED(av) (%)
Temperature, T
A
(°C)
Variation of Total LED Current versus Ambient Temperature
100% Current = 64 mA per channel at 25°C
LED Backlight Driver for Medium/Large Displays
A8512
7
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Characteristic Performance
10 11 12 13 14 15 16 17 18 19 20 21 22 23
Efficiency (%)
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
Efficiency (%)
V
BAT
(V) V
BAT
(V)
Efficiency versus Battery Voltage
for Various LED Configurations
FET = IRFR120N, V
IN
= 12 V, f
SW
= 500 kHz
L = 22 H, Load = OVS3W LEDs at 112 mA per string
LED Current versus ISET Resistor Value
V
REF
= 1.24 V, Gain = 640
Efficiency versus Battery Voltage
for Various LED Configurations
FET = FQB17N08L, V
IN
= 12 V, f
SW
= 500 kHz
L = 22 H, Load = OVS3W LEDs at 112 mA per string
10 11 12 13 14 15 16 17 18 19 20 21 22 23
20
30
40
50
60
70
80
10 12 14 16 18 20 22 24 26 28 30
I
LED
(mA)
RISET (kΩ)
300
400
500
600
700
800
900
1000
1100
50 60 70 80 90 100 110 120 130 140 150
fSW (kHz)
RFSET (kΩ)
Switching Frequency versus FSET Resistor Value
f
SW
(MHz) = 52 / R
FSET
(k)
3 strings 18 LEDs per string
V
OUT
60 V, P
OUT
20.2 W
2 strings 18 LEDs per string
V
OUT
60 V, P
OUT
13.4 W
3 strings 14 LEDs per string
V
OUT
47 V, P
OUT
15.8 W
2 strings 14 LEDs per string
V
OUT
47 V, P
OUT
10.5 W
3 strings 18 LEDs per string
V
OUT
60 V, P
OUT
20.2 W
2 strings 18 LEDs per string
V
OUT
60 V, P
OUT
13.4 W
3 strings 14 LEDs per string
V
OUT
47 V, P
OUT
15.8 W
2 strings 14 LEDs per string
V
OUT
47 V, P
OUT
10.5 W
Efficiency of the boost converter stage is affected by the selection of
power MOSFET, switching frequency, input/output voltages, and output
power. The external MOSFET used for the above chart is the IRFR120N,
which has a relatively high RDS(on) = 0.21 . This causes higher
conduction loss, especially at lower input voltage.
The power MOSFET is replaced with FQB17N08L, which has a lower
RDS(on) = 0.115 . This results in less conduction loss at lower input
voltage, however, the switching loss becomes more significant at higher
input voltage.
LED Backlight Driver for Medium/Large Displays
A8512
8
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Normal Startup Power Sequences
VBAT = 12 V, Load = 6 strings, 16 LEDs each string, 56 mA per string, Output capacitors = 2 × 2.2 F ceramic
The A8512 can startup with any combination of input and power sequences, as shown in waveforms below:
Symbol Parameter Units/Division
C1 VEN 5 V
C2 VPWM 5 V
C3 VOUT 10 V
C4 Total ILED 100 mA
t time 2 ms
Symbol Parameter Units/Division
C1 VEN 5 V
C2 VPWM 5 V
C3 VOUT 10 V
C4 Total ILED 100 mA
t time 2 ms
Symbol Parameter Units/Division
C1 VEN 5 V
C2 VPWM 5 V
C3 VOUT 10 V
C4 Total ILED 100 mA
t time 2 ms
Symbol Parameter Units/Division
C1 VEN 5 V
C2 VPWM 5 V
C3 VOUT 10 V
C4 Total ILED 100 mA
t time 2 ms
C3,C4
C1
C1
C1
C1
C2
C2
C2
C2
VPWM
t
VOUT
ILED
VEN
Normal startup with EN = Low-to-
High transition (PWM = High)
Normal startup with PWM = Low-to-
High transition (EN = High)
Normal startup with PWM signal
toggling at 500 Hz, 50% duty cycle
Normal startup with battery voltage
ramping up from 2 to 12 V (EN=
PWM = High)
t
t
t
VPWM
VOUT
ILED
VEN
VPWM
VOUT
ILED
VEN
VPWM
VOUT
ILED
VEN
C3,C4
C3,C4
C3,C4
LED Backlight Driver for Medium/Large Displays
A8512
9
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Typical PWM Operation Waveforms
VBAT = 12 V, Load = 6 strings, 16 LEDs each string, 56 mA per string, Output capacitors = 2 × 2.2 F ceramic
t
t
VPWM
VOUT
VEN
VPWM
VOUT
ILED
VEN
C1
C1
C2
C2
C4
Symbol Parameter Units/Division
C1 VEN 5 V
C2 VPWM 5 V
–* VOUT 1 V
C4 Total ILED 100 mA
t time 2 ms
*Offset = 46 V
Symbol Parameter Units/Division
C1 VEN 5 V
C2 VPWM 5 V
–* VOUT 1 V
C4 ILED 100 mA
t time 50 s
*Offset = 46 V
PWM dimming at 200 Hz 10% duty cycle;
Output voltage ripple approximately 0.8 V (out of 50 V)
PWM dimming at 5 kHz 10% duty cycle
1
100
90
80
70
60
50
40
30
20
10
0
100.1
Ratio of LED Current (%)
100
10
1
0.1
Ratio of LED Current (%)
PWM Frequency (kHz)PWM Duty Cycle (%)
Ratio of LED Current versus PWM Frequency
PWM duty cycle = 10%
Ratio of LED Current versus PWM Duty Cycle
PWM frequency = 200 Hz
0.1 1 10 100
Compensated
pulse width
Uncompensated
pulse width
To improve the accuracy of PWM dimming at very high frequency and/or very low duty cycle, it is
necessary to compensate the PWM pulse width, as described in Application Information section.
LED Backlight Driver for Medium/Large Displays
A8512
10
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Normal Operation and Fault Conditions
VBAT = 12 V, Load = 6 strings, 18 LEDs each string, 56 mA per string, Output capacitors = 2 × 2.2 F ceramic, ROVP = 249 k (OVP at 69 V)
t
t
t
t
VPWM
VOUT
ILED
VEN
VPWM
VOUT
OVP tripped
ILED
VEN
VPWM
VOUT
ILED
VEN
VPWM
VOUT
ILED
VFAULT
C1
C1
C1
C1
C2,C3
C2,C3
C2,C3
C2,C3
C4
C4
C4
C4
Symbol Parameter Units/Division
C1 VEN 5 V
C2 VPWM 5 V
C3 VOUT 10 V
C4 Total ILED 100 mA
t time 2 ms
Symbol Parameter Units/Division
C1 VEN 5 V
C2 VPWM 5 V
C3 VOUT 10 V
C4 Total ILED 100 mA
t time 2 ms
Symbol Parameter Units/Division
C1 VEN 5 V
C2 VPWM 5 V
C3 VOUT 10 V
C4 Total ILED 100 mA
t time 2 ms
Symbol Parameter Units/Division
C1 VFAULT 5 V
C2 VPWM 5 V
C3 VOUT 10 V
C4 Total ILED 100 mA
t time 2 ms
Normal startup with VBAT = 12 V,
(VOUT ≈ 58 V when cold)
Startup with one LED string open;
(OVP tripped at ≈69 V. Open string
removed from regulation. Remaining
strings operate normally.)
Startup with all LED strings connected,
then one LED string becomes open;
(OVP tripped at ≈69 V. Open string
removed from regulation. Remaining
strings operate normally)
OVP setpoint too high for the application.
Startup with one string open; voltage
at LEDx pin exceeded Short-Detect
threshold (25 V) before OVP could be
tripped. IC shuts down.
LED short-
detect tripped
OVP tripped
LED Backlight Driver for Medium/Large Displays
A8512
11
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Overview The A8512 is a multi-output WLED/RGB control-
ler for backlighting medium-size displays. It has an integrated
gate driver for driving an external N-channel boost MOSFET.
The gate driver voltage is regulated at 7 V, which allows a wide
selection of power MOSFET (in contrast to being limited to
logic-level MOSFETs when using a 5 V gate driver). The boost
controller operates in fixed-frequency current-mode control. The
switching frequency can be set in the range from 300 kHz to
1 MHz, by an external resistor, RFSET
, connected between FSET
and ground.
The external MOSFET switch is protected by pulse-by-pulse cur-
rent limiting. The current limit is independent of duty cycle, and
is set using an external sense resistor, RSC.
The A8512 has six well-matched current sinks that provide regu-
lated current through the LEDs for uniform display brightness.
The boost converter is controlled by monitoring all LEDx pins
simultaneously and continuously.
Multiple A8512 can be connected in parallel, for applications
that require more than six LED strings. One master controller is
in charge of the boost converter stage, while other slave control-
lers act as LED current sinks only. The converter output voltage
will be boosted to a level just sufficient for all LED currents to be
within regulation.
Up to six A8512s (1 master + 5 slaves) can be connected in
parallel, which allows up to 36 LED strings to be powered by just
one boost converter. The maximum number of LEDs within each
string is limited only by the voltage ratings of the external power
components (MOSFET, diode, and capacitors).
LED Current Setting The maximum LED current can be set,
at up to 80 mA/channel, through the ISET pin. Connect a resistor,
RISET , between this pin and ground to set the reference current
level, ISET . The value of ISET (mA) is determined by:
I
SET = 1.235 / RISET (k) . (1)
The resulting current is multiplied internally with a gain of 640
and mirrored on all enabled LEDx pins. This sets the maximum
current through each LEDx, referred as the 100% Current. The
LEDx current can be reduced from the 100% Current value by
applying an external PWM signal on the PWM pin. Conversely,
we can calculate RISET according to the LED current required:
RISET = ( 1.235 / ILED ) × 640 . (2)
Boost Switching Frequency Setting Connect an external
resistor between the FSET pin and GND, to set boost switching
frequency, fSW . The value of fSW (MHz) is determined by:
f
SW = 52 / RFSET , (3)
where fSW is in MHz and RFSET is in k. The typical range of
RFSET is approximately 51 to 174 k, which corresponds to
1 MHz to 300 kHz.
Enable The IC turns on when a high signal is applied on the EN
pin, and turns off when this pin is pulled low. The LED current
sinks are turned on when both the EN and the PWM inputs are high.
Channel Selection The A8512 can be used to drive 1 to 6 LED
channels. During startup, the IC detects LED sink pins which are
shorted to ground, and disables the corresponding LED channel.
Therefore, any unused LED pins must be connected to ground,
otherwise the IC will go into overvoltage protection fault during
startup. LED pins can be paralleled together for higher cur-
rent. For example for a 3 parallel string configuration, connect
LED1-2, LED3-4, and LED5-6 together to deliver up to 160 mA
per LED.
PWM Dimming The A8512 has a very wide range for PWM
signal input. It can accept a PWM signal from 100 Hz to 5 kHz.
When a PWM high signal is applied, the LEDx pins sink
100% Current. When the PWM signal is low, the LED sinks
turn off.
Referring to figure 13, there is a ramp-up delay between when
the PWM signal is applied and when the current reaches the
90% level. To improve current dimming linearity for PWM pulse
widths less than 100 s, increase the applied PWM pulse-width
by 3 to 5 s to compensate for this delay.
Functional Description
t
D
PWM
I
LED
Figure 13. Propagation delay from the PWM signal rising edge to ILEDx
reaching the 90% level
LED Backlight Driver for Medium/Large Displays
A8512
12
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Startup Sequence When EN is pulled high, the IC enters
soft start. The IC first tries to determine which LEDx pins are
being used, by raising the LEDx pin voltage with a small current.
After a duration of 512 switching cycles, the LEDx pin voltage
is checked. Any LEDx channel with a drain voltage smaller then
100 mV is removed from the control loop. This is the reason why
unused LEDx pins should be connected to GND,
After the first PWM positive trigger, the boost current is limited
to 30% of normal value and all active LEDx pins sink 1/12 of
the set current until output voltage reaches sufficient regulation
level. When the device comes out of soft start, boost current and
the LEDx pin currents are set to normal operating level. Within
a few cycles, the output capacitor charges to the voltage required
to supply full LEDx current. After output voltage, VOUT , reaches
the required level, LEDx current toggles between 0% and 100%
with each PWM command signal.
In case of a heavy overload on VOUT at startup, the device will
stay in soft start mode indefinitely, as the output voltage cannot
rise to the LED regulation level.
LED Short Detect Any LEDx pins that have a voltage exceed-
ing the Short Circuit Detect Voltage, VSC , cause the device to
shut down and this condition is latched. This faults occurs when
multiple LEDs short. In case only a few LEDs short, the IC will
continue to work as long as power dissipation in the IC is limited.
Overvoltage Protection The A8512 has an adjustable over-
voltage protection feature to protect the power components
(external MOSFET, output diode and capacitors) against output
overvoltage. The overvoltage level can be set, from 19.5 V to a
higher voltage, with an external resistor, ROVP
. When the current
though the OVP pin exceeds 200 A, internal OVP comparator
goes high and the device shuts down. The OVP fault disables all
LEDx strings that are below regulation, thus preventing them
from controlling the boost output voltage.
Calculate the value for ROVP () as follows:
ROVP = (VOVP – 19.5) / 200 A , (4)
where VOVP is the required OVP level in V.
For single-IC operation, select ROVP such that its OVP setpoint is
approximately 10 V above the LED operating voltage at cold. For
example, given the pin regulation voltage, VLEDx of 1.4 V (typ.), if
LED VF = 3.4 V (max.) and there are 15 LEDs in series, then the
operating voltage is approximately:
VOUT = 3.4 V × 15 + 1.4 V = 52.4 V .
In this case, select OVP at about 60 V, which gives ROVP = 200 k.
Open LED Protection During normal operation, if any enabled
LED string opens, voltage on the corresponding LEDx pin goes
to zero. The boost loop operates in open loop till the OVP level
is reached. The A8512 identifies the open LED string when over-
voltage is detected. Open strings are then removed from the regu-
lation loop. Afterwards, the boost controller operates in normal
manner, and the output voltage is regulated to drive the remaining
strings. If the open LED string is reconnected, it will sink current
up to the programmed current level.
Note: Open strings are removed from boost regulation, but not
disabled. This keeps the string in operation if LEDs open for only
a short length of time, or reach OVP level on a transient event.
The disconnected string can be restored to normal mode by reen-
abling the IC. It can also be restored to normal operation if the
fault is removed from the corresponding LEDx pin, but an OVP
event occurs on any other LEDx pin.
Overcurrent Protection The IC provides pulse-by-pulse
current limiting for the boost MOSFET. The current limit level,
ISC (A), can be set by selecting the external resistor, RSC ():
R
SC = 0.095 / ISC . (5)
If the boost output voltage is unable to reach the regulation target
even when the switch is operating at maximum current limit, the
boost control loop will force the compensating capacitor, CCOMP
,
to rise in voltage until it reaches the overcurrent fault level
(3.4 V approximately). The overcurrent fault forces the device
into soft start.
Thermal Shutdown (TSD) The IC shuts down when junction
temperature exceeds 165°C. It will recover automatically when
the junction temperature falls below 125°C approximately.
VIN Undervoltage Lockout (UVLO) The device is shut
down when input voltage, VIN , falls below VUVLO. Any existing
latched fault is cleared.
VIN Operating Range Considerations When VIN is above
VUVLO and below 10 V, the IC will operate correctly, but its gate
driver voltage may not reach the regulation target of 7 V. This
may cause excessive switching and conduction loss if the external
MOSFET is not fully enhanced.
During normal operation, the IC draws approximately
10 to 15 mA from the VIN pin, depending on switching fre-
quency and the external MOSFET. At VIN = 12 V, this translates
into 120 to 180 mW of power consumption, most of it dissipated
in internal linear regulators. This power increases proportionally
LED Backlight Driver for Medium/Large Displays
A8512
13
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
with input voltage. Therefore it is highly recommended to keep
VIN between 10 and 24 V during normal operation.
If the input battery voltage must be higher than 24 V, a better
solution is to power the VIN pin separately using a 12 V supply.
Doing this reduces the heat dissipation of the IC, and improves
the overall system efficiency.
Fault Mode in Single-Controller Operation
Fault State Auto-
Restart Description
Over-
voltage
Protection
Yes
Fault occurs when output voltage exceeds
the OVP setpoint voltage. Used to prevent
the output voltage from damaging the power
components.
Pulse-
by-Pulse
Current Limit
Yes
Fault occurs when the current through the
external MOSFET increases such that the
voltage across the SENSE1 and SENSE2 pins
exceeds 95 mV typical. The MOSFET switch is
turned off on a cycle-per-cycle basis.
Overcurrent
Protection Yes
Multiple pulse-by-pulse current limits will cause
the COMP pin voltage to rise. After a time
period determined by the COMP pin current
and the COMP capacitor, the COMP voltage will
exceed the overcurrent detect threshold, forcing
a fault. System may hiccup if the total current
requirement is too high.
Over-
temperature
Protection
Yes Fault occurs when the die temperature exceeds
the over-temperature threshold, 165°C typical.
LED Short
Protection No Fault occurs when the LED pin voltage exceeds
VSC , 25 V typical.
VIN UVLO No Fault occurs when VIN drops below VUVLO,
6.5 V typical. This fault resets all latched faults.
Parallel Operation The A8512 is designed to operate with up
to six A8512 devices connected in parallel, in order to drive a
greater number of LED strings. In this case, the A8512 which
controls the boost converter is designated the master, while the
other devices are slaves which serve as current sinks for their
own LED strings. Slaves communicate with the master through
the shared COMP signal. PWM dimming and protection mecha-
nisms work consistently across all devices.
Select ROVP1 for the master controller such that its OVP set-
point is approximately 10 V above the LED operating voltage
at cold. Select ROVP2 for each slave controller at approximately
15 to 25 k lower than that for the master. This ensures that, in
the case in which an open-LED fault occurs, the slave controllers
will enable OVP before the master does.
LED Backlight Driver for Medium/Large Displays
A8512
14
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
PCB Layout Guidelines As with any switching power supply,
care should be taken in laying out the board. A switching power
supply has sources of high dv/dt and high di/dt which can cause
malfunction. All general norms should be followed for board
layout. Refer to figure 14 for a typical application schematic. The
A8512 evaluation board provides a useful model for designing
application circuit layouts.
The following guidelines should be observed:
• Place bypass capacitors physically close to their respective pins
(VIN, VBIAS, and VREG7V).
• Route analog ground, digital signal ground, LED ground
(LGND pin), and power ground (PGND pin) separately. Con-
nect all these grounds at the common ground plane under the
A8512, serving as a star ground.
• Place the input capacitors (C1, C2), inductor (L1), boost diode
(D1), MOSFET (Q1), and output capacitors (C3, C4) so that
they form the smallest loop practical. Avoid long traces for
these paths.
• Place the resistors RFSET and RISET, and the compensation com-
ponents (Rz and Cz) close to the FSET, ISET, and COMP pins,
respectively. Connect the other ends to the common star ground.
• A8512 has 50 k internal pull-down resistors on the EN and
PWM pins to keep these pins low while driving through tri-state
state (for example, shutdown). Add external resistors R2 and
R3 between the EN and PWM pins and ground, for added noise
immunity. Connect these resistors close to the pins and return to
the common star ground.
• Sense voltage across RSC with smaller length traces. Place the
SENSE1 and SENSE2 traces as close to each other as pos-
sible to minimize noise pickup. Connect the SENSE2 trace to
the negative end of the resistor and do not connect it to power
ground plane.
• Provide a substantial copper plane near MOSFET Q1 and the
IC, to provide good thermal conduction.
Application Information
Figure 14. Typical application circuit with single controller; VIN pin tied to VBAT .
FSET
DRIVER
VBIAS
VREG7V
VIN
PWM
EN
SENSE1 SENSE2
LED1
LED2
LED3
LED4
LED5
LED6
VBAT
8 to 24 V
A8512
(LB package)
COMP
ISET
AGND AGND LGND LGND PGND
RSC ROVP
OVP
VOUT 18 LEDs per string
R3
R2, R3 optional (A8512 has
internal pull-down resistors)
R2 RFSET
RISET
Rz1
Cz1
D1
Q1
L1
FAULT
P
P
C5
C6
R1
C4
C3
P
C2C1
P
LED Backlight Driver for Medium/Large Displays
A8512
15
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Package ET 28-Contact QFN
0.25 +0.05
–0.07 0.50 0.90 ±0.10
C0.08
29X SEATING
PLANE C
ATerminal #1 mark area
BExposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
For Reference Only; not for tooling use
(reference JEDEC MO-220VHHD-1)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
CReference land pattern layout (reference IPC7351
QFN50P500X500X100-29V1M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
28
2
1
A
28
1
2
PCB Layout Reference View
B3.15
0.73 MAX
3.15
3.15
3.15
0.30
1
28 0.50
1.15
4.80
4.80
C
5.00 ±0.15
5.00 ±0.15
D
DCoplanarity includes exposed thermal pad and terminals
LED Backlight Driver for Medium/Large Displays
A8512
16
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Copyright ©2010, Allegro MicroSystems, Inc.
The products described here are manufactured under one or more U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per-
mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;
nor for any in fringe ment of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Package LB 24-Pin SOICW with Internally Fused Pins
C
SEATING
PLANE GAUGE PLANE
SEATING PLANE
ATerminal #1 mark area
B
B
PCB Layout Reference View
21
24
C
SEATING
PLANE
C0.10
24X
0.25 BSC
1.40 REF
2.65 MAX
Pins 6, 7, 18, and 19 internally fused for enhanced thermal dissipation
For Reference Only; not for tooling use (reference MS-013AD)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
15.40 ±0.20
7.50 ±0.10 10.30 ±0.33
0.30
0.10
0.33
0.20
1.27
0.40
8°
0°
A
1.27 BSC
0.51
0.31
21
24
Reference pad layout (reference IPC SOIC127P1030X265-24M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
2.20
0.65
9.60
1.27
Branded Face
