SEIKO EPSON CORPORATION 1
PF993-01
Micro MINI E0C6009
4-bit Single Chip Microcomputer
● E0C6200B Core CPU
● Low Voltage and Low Power
● Built-in LCD Driver
● Low Cost Performance
■DESCRIPTION
Micro MINI "E0C6009" is a single chip microcomputer for battery-driven products with 7-segment LCD display.
It achieves low cost performance, and is suitable for a product added some feature instead of standard IC.
It consists that Seiko Epson's original core CPU E0C6200B, LCD driver (38 segments × 4 commons), 144 words
RAM, 1.5K words ROM, clock timer and so on.
■FEATURES
● CMOS LSI 4-bit parallel processing
● Clock ...............................................................Crystal 32.768kHz (Typ.) or CR oscillation 65kHz (Typ.)
● Instruction set..................................................100 instructions
● ROM capacity .................................................1,536 × 12 bits
● RAM capacity..................................................144 × 4 bits
● I/O port ............................................................I: 4 bits (with pull-down resistor selectable by mask option)
O: 4 bits (clock and buzzer outputs possible by mask option)
I/O: 8 bits
● Supply voltage detector (SVD) .......................No support
● Clock timer ......................................................1ch.
● Stopwatch timer ..............................................1ch.
● LCD driver.......................................................38 segments × 4/3/2 commons
● Interrupt...........................................................External : Key interrupt 1 line
Internal : Timer interrupt 2 lines
● Operation voltage ...........................................1.2 to 1.8V (E0C60L09)
2.6 to 3.6V (E0C6009)
● Power consumption ........................................1.0µA (32.768kHz X'tal, 3.0V, HALT)
2.5µA (32.768kHz X'tal, 3.0V, RUN)
● Package ..........................................................Die form (pad pitch = 130µm)
Low Voltage
Operation
Products
2
E0C6009
■BLOCK DIAGRAM
COM0–3
SEG0–37
V
DD
V
L1
–V
L3
CA, CB
V
S1
V
SS
K00–K03
TEST
RESET
OSC1
OSC2
R00, R03 (BZ, BZ)
∗1
R01
R02 (FOUT)
∗1
∗1: Terminal specifications can be selected by mask option.
P00–P03
P10–P13
Core CPU E0C6200B
ROM
1,536 words × 12 bits
System Reset
Control
Interrupt
Generator
RAM
144 words × 4 bits
Stopwatch
Timer
LCD Driver
38 SEG × 4 COM
Power
Controller
OSC
I/O Port
Clock
Timer
Input Port
Output Port
■PAD LAYOUT
Pad Layout Diagram
X
(0, 0)
Y
2.87mm
2.90mm
151015
35
Die No.
40 45 50
55
60
65
70
20
25
30
Chip thickness: 400µm
Pad opening: 95µm
Pad Coordinates
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
Pad name
SEG37
K03
K02
K01
K00
P13
P12
P11
P10
P03
P02
P01
P00
R02
R01
R00
R03
VSS
RESET
VS1
OSC2
OSC1
VDD
VL3
VL2
VL1
CB
CA
COM3
COM2
COM1
COM0
SEG0
SEG1
SEG2
X
1,020
861
731
601
471
297
167
37
-93
-246
-376
-507
-637
-835
-969
-1,102
-1,236
-1,284
-1,284
-1,284
-1,284
-1,284
-1,284
-1,284
-1,284
-1,284
-1,284
-1,284
-1,284
-1,284
-1,284
-1,284
-1,284
-1,237
-1,107
Y
1,268
1,268
1,268
1,268
1,268
1,268
1,268
1,268
1,268
1,268
1,268
1,268
1,268
1,268
1,268
1,268
1,268
965
835
705
575
445
286
156
26
-104
-234
-364
-494
-624
-754
-884
-1,014
-1,268
-1,268
No.
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
Pad name
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
TEST
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
X
-977
-795
-665
-535
-405
-275
-145
-15
115
245
375
505
635
765
895
1,025
1,284
1,284
1,284
1,284
1,284
1,284
1,284
1,284
1,284
1,284
1,284
1,284
1,284
1,284
1,284
1,284
1,284
1,284
1,284
Y
-1,268
-1,268
-1,268
-1,268
-1,268
-1,268
-1,268
-1,268
-1,268
-1,268
-1,268
-1,268
-1,268
-1,268
-1,268
-1,268
-1,196
-1,037
-879
-749
-619
-489
-359
-229
-99
32
162
292
422
552
682
812
942
1,072
1,202
3
E0C6009
■PAD DESCRIPTION
Pad name
V
DD
V
SS
V
S1
V
L1
–
3
CA, CB
OSC1
OSC2
K00–03
P00–03
P10–13
R00
R03
R01
R02
SEG0–37
COM0–3
RESET
TEST
Function
Power supply terminal (+)
Power supply terminal (-)
Constant voltage output terminal
Power source for LCD
Booster capacitor connecting terminal
Crystal or CR oscillation input terminal ∗
Crystal or CR oscillation output terminal ∗
Input port terminal
I/O port terminal
I/O port terminal
Output port terminal (BZ output is selectable ∗)
Output port terminal (BZ output is selectable ∗)
Output port terminal
Output port terminal (FOUT output is selectable ∗)
LCD segment output (DC output is selectable ∗)
LCD common output terminal (1/4, 1/3 or 1/2 duty are selectable ∗)
Initial reset input terminal
Test input terminal
Pad No.
23
18
20
26–24
28, 27
22
21
5–2
13–10
9–6
16
17
15
14
33–52, 54–70, 1
32–29
19
53
I/O
(I)
(I)
–
–
–
I
O
I
I/O
I/O
O
O
O
O
O
O
I
I
∗ Can be selected by mask option
■BASIC EXTERNAL CONNECTION DIAGRAM
Piezo Buzzer Single Terminal Driving
Note: The above table is simply an example, and is not guaranteed to work.
K00
K01
K02
K03
P00
P01
P02
P03
P10
P11
P12
P13
R02 (FOUT)
R03 (BZ)
R01 SEG0
SEG37
COM0
COM3
R00 (BZ)
CB
CA
V
L1
V
L2
V
L3
V
DD
OSC1
OSC2
V
S1
RESET
TEST
V
SS
+
Lamp Piezo
C
1
C
2
C
4
C
P
C
3
C
GX
X'tal
Connection depends on
power supply and LCD
panel specification.
E0C6009
E0C60L09
LCD panel
I/O
O
I
X'tal
C
GX
C
1
C
2
C
3
C
4
C
P
Crystal oscillator
Trimmer capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
32.768 kHz, C
I
= 35 kΩ
5–25 pF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
3.3 µF
4
E0C6009
■ELECTRICAL CHARACTERISTICS
●Absolute Maximum Ratings
E0C6009
Rating
Supply voltage
Input voltage (1)
Input voltage (2)
Operating temperature
Storage temperature
Soldering temperature / time
(V
DD
=0V)
Symbol
V
SS
V
I
V
IOSC
Topr
Tstg
Tsol
Value
-5.5 to 0.5
V
SS
- 0.3 to 0.5
V
S1
- 0.3 to 0.5
-20 to 70
-65 to 150
260°C, 10sec (lead section)
Unit
V
V
V
°C
°C
–
E0C60L09
Rating
Supply voltage
Input voltage (1)
Input voltage (2)
Operating temperature
Storage temperature
Soldering temperature / time
(V
DD
=0V)
Symbol
V
SS
V
I
V
IOSC
Topr
Tstg
Tsol
Value
-2.0 to 0.5
V
SS
- 0.3 to 0.5
V
S1
- 0.3 to 0.5
-20 to 70
-65 to 150
260°C, 10sec (lead section)
Unit
V
V
V
°C
°C
–
●Recommended Operating Conditions
E0C6009
Condition
Supply voltage
Oscillation frequency
Booster capacitor
Capacitor between VDD and VS1
∗1:
(Ta=-20 to 70°C)
Symbol
VSS
fOSC
C1
C3 or C4∗1
Unit
V
kHz
kHz
µF
µF
Max.
-2.6
80
Typ.
-3.0
32.768
65
Min.
-3.6
0.1
0.1
Depends on the LCD specification.
Remark
VDD=0V
Crystal oscillation
CR oscillation, RCR=475kΩ
E0C60L09
Condition
Supply voltage
Oscillation frequency
Booster capacitor
Capacitor between VDD and VS1
∗1:
(Ta=-20 to 70°C)
Symbol
VSS
fOSC
C1
C3 or C4∗1
Unit
V
kHz
kHz
µF
µF
Max.
-1.2
80
Typ.
-1.5
32.768
65
Min.
-1.8
0.1
0.1
Depends on the LCD specification.
Remark
VDD=0V
Crystal oscillation
CR oscillation, RCR=475kΩ
5
E0C6009
●DC Characteristics
E0C6009
Characteristic
High level input voltage (1)
High level input voltage (2)
Low level input voltage (1)
Low level input voltage (2)
High level input current (1)
High level input current (2)
High level input current (3)
Low level input current
High level output current (1)
High level output current (2)
Low level output current (1)
Low level output current (2)
Common output current
Segment output current
(during LCD output)
Segment output current
(during DC output)
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, fosc=32.768kHz, Ta=25°C, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
4
=0.1µF)
Symbol
V
IH1
V
IH2
V
IL1
V
IL2
I
IH1
I
IH2
I
IH3
I
IL
I
OH1
I
OH2
I
OL1
I
OL2
I
OH3
I
OL3
I
OH4
I
OL4
I
OH5
I
OL5
Unit
V
V
V
V
µA
µA
µA
µA
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
Max.
0
0
0.8·V
SS
0.9·V
SS
0.5
40
200
0
-1.8
-0.9
-3
-3
-200
Typ.Min.
0.2·V
SS
0.1·V
SS
V
SS
V
SS
0
4
50
-0.5
4.0
3.0
3
3
200
Condition
K00–03, P00–03, P10–13
RESET, TEST
K00–03, P00–03, P10–13
RESET, TEST
V
IH1
=0V, No pull-down K00–03, P00–03, P10–13
V
IH2
=0V, Pull-down K00–03
V
IH3
=0V, Pull-down P00–03, P10–13
RESET, TEST
V
IL
=V
SS
K00–03, P00–03, P10–13
RESET, TEST
V
OH1
=0.1·V
SS
R00, R03
V
OH2
=0.1·V
SS
R01, R02,
P00–03, P10–13
V
OL1
=0.9·V
SS
R00, R03
V
OL2
=0.9·V
SS
R01, R02,
P00–03, P10–13
V
OH3
=-0.05V COM0–3
V
OL3
=V
L3
+0.05V
V
OH4
=-0.05V SEG0–37
V
OL4
=V
L3
+0.05V
V
OH5
=0.1·V
SS
SEG0–37
V
OL5
=0.9·V
SS
E0C60L09
Characteristic
High level input voltage (1)
High level input voltage (2)
Low level input voltage (1)
Low level input voltage (2)
High level input current (1)
High level input current (2)
High level input current (3)
Low level input current
High level output current (1)
High level output current (2)
Low level output current (1)
Low level output current (2)
Common output current
Segment output current
(during LCD output)
Segment output current
(during DC output)
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, fosc=32.768kHz, Ta=25°C, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
4
=0.1µF)
Symbol
V
IH1
V
IH2
V
IL1
V
IL2
I
IH1
I
IH2
I
IH3
I
IL
I
OH1
I
OH2
I
OL1
I
OL2
I
OH3
I
OL3
I
OH4
I
OL4
I
OH5
I
OL5
Unit
V
V
V
V
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
Max.
0
0
0.8·V
SS
0.9·V
SS
0.5
16
100
0
-300
-150
-3
-3
-100
Typ.Min.
0.2·V
SS
0.1·V
SS
V
SS
V
SS
0
2
25
-0.5
1400
700
3
3
100
Condition
K00–03, P00–03, P10–13
RESET, TEST
K00–03, P00–03, P10–13
RESET, TEST
V
IH1
=0V, No pull-down K00–03, P00–03, P10–13
V
IH2
=0V, Pull-down K00–03
V
IH3
=0V, Pull-down P00–03, P10–13
RESET, TEST
V
IL
=V
SS
K00–03, P00–03, P10–13
RESET, TEST
V
OH1
=0.1·V
SS
R00, R03
V
OH2
=0.1·V
SS
R01, R02,
P00–03, P10–13
V
OL1
=0.9·V
SS
R00, R03
V
OL2
=0.9·V
SS
R01, R02,
P00–03, P10–13
V
OH3
=-0.05V COM0–3
V
OL3
=V
L3
+0.05V
V
OH4
=-0.05V SEG0–37
V
OL4
=V
L3
+0.05V
V
OH5
=0.1·V
SS
SEG0–37
V
OL5
=0.9·V
SS
6
E0C6009
●Analog Circuit Characteristics and Current Consumption
E0C6009 (Crystal Oscillation)
• 4.5 V LCD panel, 1/4, 1/3, 1/2 duty, 1/3 bias (VL2 is shorted to VSS inside the IC)
<Normal mode>
Characteristic
LCD drive voltage
Current consumption
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
4
=0.1µF)
Symbol
V
L1
V
L2
V
L3
I
OP
Unit
V
V
V
µA
µA
Max.
1/2·V
L2
×0.9
3/2·V
L2
×0.9
2.5
5.0
Typ.
V
SS
1.0
2.5
Min.
1/2·V
L2
- 0.1
3/2·V
L2
- 0.1
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
During HALT Without
During execution panel load
<Heavy load protection mode>
Characteristic
LCD drive voltage
Current consumption
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
4
=0.1µF)
Symbol
V
L1
V
L2
V
L3
I
OP
Unit
V
V
V
µA
µA
Max.
1/2·V
L2
×0.85
3/2·V
L2
×0.85
5.5
10.0
Typ.
V
SS
2.0
5.5
Min.
1/2·V
L2
- 0.1
3/2·V
L2
- 0.1
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
During HALT Without
During execution panel load
• 3 V LCD panel, 1/4, 1/3, 1/2 duty, 1/2 bias
(V
L3
is shorted to V
SS
inside the IC and V
L1
is shorted to V
L2
outside the IC)
<Normal mode>
Characteristic
LCD drive voltage
Current consumption
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
4
=0.1µF)
Symbol
V
L1
V
L2
V
L3
I
OP
Unit
V
V
V
µA
µA
Max.
1/2·V
L3
×0.9
1/2·V
L3
×0.9
2.5
5.0
Typ.
V
SS
1.0
2.5
Min.
1/2·V
L3
- 0.1
1/2·V
L3
- 0.1
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
During HALT Without
During execution panel load
<Heavy load protection mode>
Characteristic
LCD drive voltage
Current consumption
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
4
=0.1µF)
Symbol
V
L1
V
L2
V
L3
I
OP
Unit
V
V
V
µA
µA
Max.
1/2·V
L3
×0.85
1/2·V
L3
×0.85
5.5
10.0
Typ.
V
SS
2.0
5.5
Min.
1/2·V
L3
- 0.1
1/2·V
L3
- 0.1
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
During HALT Without
During execution panel load
7
E0C6009
E0C60L09 (Crystal Oscillation)
• 4.5 V LCD panel, 1/4, 1/3, 1/2 duty, 1/3 bias (VL1 is shorted to VSS inside the IC)
<Normal mode>
Characteristic
LCD drive voltage
Current consumption
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
4
=0.1µF)
Symbol
V
L1
V
L2
V
L3
I
OP
Unit
V
V
V
µA
µA
Max.
2·V
L1
×0.9
3·V
L1
×0.9
2.5
5.0
Typ.
V
SS
1.0
2.5
Min.
2·V
L1
- 0.1
3·V
L1
- 0.1
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
During HALT Without
During execution panel load
<Heavy load protection mode>
Characteristic
LCD drive voltage
Current consumption
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
4
=0.1µF)
Symbol
V
L1
V
L2
V
L3
I
OP
Unit
V
V
V
µA
µA
Max.
2·V
L1
×0.85
3·V
L1
×0.85
5.5
10.0
Typ.
V
SS
2.0
5.5
Min.
2·V
L1
- 0.1
3·V
L1
- 0.1
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
During HALT Without
During execution panel load
• 3 V LCD panel, 1/4, 1/3, 1/2 duty, 1/2 bias
(V
L1
is shorted to V
SS
inside the IC and V
L1
is shorted to V
L2
outside the IC)
<Normal mode>
Characteristic
LCD drive voltage
Current consumption
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
4
=0.1µF)
Symbol
V
L1
V
L2
V
L3
I
OP
Unit
V
V
V
µA
µA
Max.
2·V
L1
×0.9
2.5
5.0
Typ.
V
SS
V
SS
1.0
2.5
Min.
2·V
L1
- 0.1
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
During HALT Without
During execution panel load
<Heavy load protection mode>
Characteristic
LCD drive voltage
Current consumption
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
4
=0.1µF)
Symbol
V
L1
V
L2
V
L3
I
OP
Unit
V
V
V
µA
µA
Max.
2·V
L1
×0.85
5.5
10.0
Typ.
V
SS
V
SS
2.0
5.5
Min.
2·V
L1
- 0.1
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
During HALT Without
During execution panel load
8
E0C6009
E0C6009 (CR Oscillation)
• 4.5 V LCD panel, 1/4, 1/3, 1/2 duty, 1/3 bias (VL2 is shorted to VSS inside the IC)
<Normal mode>
Characteristic
LCD drive voltage
Current consumption
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC
=65kHz, Ta=25°C, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
4
=0.1µF, R
CR
=475kΩ)
Symbol
V
L1
V
L2
V
L3
I
OP
Unit
V
V
V
µA
µA
Max.
1/2·V
L2
×0.9
3/2·V
L2
×0.9
15.0
20.0
Typ.
V
SS
8.0
15.0
Min.
1/2·V
L2
- 0.1
3/2·V
L2
- 0.1
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
During HALT Without
During execution panel load
<Heavy load protection mode>
Characteristic
LCD drive voltage
Current consumption
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC
=65kHz, Ta=25°C, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
4
=0.1µF, R
CR
=475kΩ)
Symbol
V
L1
V
L2
V
L3
I
OP
Unit
V
V
V
µA
µA
Max.
1/2·V
L2
×0.85
3/2·V
L2
×0.85
30.0
40.0
Typ.
V
SS
16.0
30.0
Min.
1/2·V
L2
- 0.1
3/2·V
L2
- 0.1
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
During HALT Without
During execution panel load
• 3 V LCD panel, 1/4, 1/3, 1/2 duty, 1/2 bias
(V
L3
is shorted to V
SS
inside the IC and V
L1
is shorted to V
L2
outside the IC)
<Normal mode>
Characteristic
LCD drive voltage
Current consumption
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC
=65kHz, Ta=25°C, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
3
=0.1µF, R
CR
=475kΩ)
Symbol
V
L1
V
L2
V
L3
I
OP
Unit
V
V
V
µA
µA
Max.
1/2·V
L3
×0.9
1/2·V
L3
×0.9
15.0
20.0
Typ.
V
SS
8.0
15.0
Min.
1/2·V
L3
- 0.1
1/2·V
L3
- 0.1
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
During HALT Without
During execution panel load
<Heavy load protection mode>
Characteristic
LCD drive voltage
Current consumption
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC
=65kHz, Ta=25°C, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
3
=0.1µF, R
CR
=475kΩ)
Symbol
V
L1
V
L2
V
L3
I
OP
Unit
V
V
V
µA
µA
Max.
1/2·V
L3
×0.85
1/2·V
L3
×0.85
30.0
40.0
Typ.
V
SS
16.0
30.0
Min.
1/2·V
L3
- 0.1
1/2·V
L3
- 0.1
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
During HALT Without
During execution panel load
9
E0C6009
E0C60L09 (CR Oscillation)
• 4.5 V LCD panel, 1/4, 1/3, 1/2 duty, 1/3 bias (VL1 is shorted to VSS inside the IC)
<Normal mode>
Characteristic
LCD drive voltage
Current consumption
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC
=65kHz, Ta=25°C, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
4
=0.1µF, R
CR
=475kΩ)
Symbol
V
L1
V
L2
V
L3
I
OP
Unit
V
V
V
µA
µA
Max.
2·V
L1
×0.9
3·V
L1
×0.9
15.0
20.0
Typ.
V
SS
8.0
15.0
Min.
2·V
L1
- 0.1
3·V
L1
- 0.1
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
During HALT Without
During execution panel load
<Heavy load protection mode>
Characteristic
LCD drive voltage
Current consumption
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC
=65kHz, Ta=25°C, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
4
=0.1µF, R
CR
=475kΩ)
Symbol
V
L1
V
L2
V
L3
I
OP
Unit
V
V
V
µA
µA
Max.
2·V
L1
×0.85
3·V
L1
×0.85
30.0
40.0
Typ.
V
SS
16.0
30.0
Min.
2·V
L1
- 0.1
3·V
L1
- 0.1
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
During HALT Without
During execution panel load
• 3 V LCD panel, 1/4, 1/3, 1/2 duty, 1/2 bias
(V
L1
is shorted to V
SS
inside the IC and V
L1
is shorted to V
L2
outside the IC)
<Normal mode>
Characteristic
LCD drive voltage
Current consumption
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC
=65kHz, Ta=25°C, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
3
=0.1µF, R
CR
=475kΩ)
Symbol
V
L1
V
L2
V
L3
I
OP
Unit
V
V
V
µA
µA
Max.
2·V
L1
×0.9
15.0
20.0
Typ.
V
SS
V
SS
8.0
15.0
Min.
2·V
L1
- 0.1
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
During HALT Without
During execution panel load
<Heavy load protection mode>
Characteristic
LCD drive voltage
Current consumption
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC
=65kHz, Ta=25°C, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
3
=0.1µF, R
CR
=475kΩ)
Symbol
V
L1
V
L2
V
L3
I
OP
Unit
V
V
V
µA
µA
Max.
2·V
L1
×0.85
30.0
40.0
Typ.
V
SS
V
SS
16.0
30.0
Min.
2·V
L1
- 0.1
Condition
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
During HALT Without
During execution panel load
E0C6009
NOTICE:
No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko
Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of
any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that
this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual
property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this
material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the
subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Control Law of Japan and may require an
export license from the Ministry of International Trade and Industry or other approval from another government agency.
© Seiko Epson Corporation 1999 All right reserved.
SEIKO EPSON CORPORATION
ELECTRONIC DEVICES MARKETING DIVISION
IC Marketing & Engineering Group
ED International Marketing Department I (Europe & U.S.A.)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone : 042-587-5812 FAX : 042-587-5564
ED International Marketing Department II (Asia)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone : 042-587-5814 FAX : 042-587-5110
●Oscillation Characteristics
Oscillation characteristics will vary according to different conditions (elements used, boad pattern). Use the following char-
acteristics are as reference values.
E0C6009 Crystal Oscillation
Characteristic
Oscillation start voltage
Oscillation stop voltage
Built-in capacitance (drain)
Frequency/voltage deviation
Frequency/IC deviation
Frequency adjustment range
Harmonic oscillation start voltage
Permitted leak resistance
Symbol
Vsta
Vstp
C
D
∂f/∂V
∂f/∂IC
∂f/∂C
G
V
hho
R
leak
Unit
V
V
pF
ppm
ppm
ppm
V
MΩ
Max.
5
10
-3.6
Typ.
20
45
Min.
-2.6
-2.6
-10
35
200
Condition
t
sta≤5sec (V
SS
)
t
stp≤10sec (V
SS
)
Including the parasitic capacitance inside the chip
V
SS
=-2.6 to -3.6V
C
G
=5 to 25pF
(V
SS
)
Between OSC1 and V
DD
, V
SS
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC
=32.768kHz, Crystal: C-002R (C
I
=35kΩ), C
G
=25pF, C
D
=built-in, Ta=25°C)
E0C60L09 Crystal Oscillation
Characteristic
Oscillation start voltage
Oscillation stop voltage
Built-in capacitance (drain)
Frequency/voltage deviation
Frequency/IC deviation
Frequency adjustment range
Harmonic oscillation start voltage
Permitted leak resistance
Symbol
Vsta
Vstp
C
D
∂f/∂V
∂f/∂IC
∂f/∂C
G
V
hho
R
leak
Unit
V
V
pF
ppm
ppm
ppm
V
MΩ
Max.
5
10
-1.8
Typ.
20
45
Min.
-1.2
-1.2
-10
35
200
Condition
t
sta≤5sec (V
SS
)
t
stp≤10sec (V
SS
)
Including the parasitic capacitance inside the chip
V
SS
=-1.2 to -1.8V
C
G
=5 to 25pF
(V
SS
)
Between OSC1 and V
DD
, V
SS
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC
=32.768kHz, Crystal: C-002R (C
I
=35kΩ), C
G
=25pF, C
D
=built-in, Ta=25°C)
E0C6009 CR Oscillation
Characteristic
Oscillation frequency dispersion
Oscillation start time
Symbol
f
OSC
t
sta
Unit
kHz
mS
Max.
84.5
3
Typ.
65
Min.
45.5
Condition
V
SS
=-2.6 to -3.6V
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, R
CR
=475kΩ, Ta=25°C)
E0C60L09 CR Oscillation
Characteristic
Oscillation frequency dispersion
Oscillation start time
Symbol
f
OSC
t
sta
Unit
kHz
mS
Max.
84.5
3
Typ.
65
Min.
45.5
Condition
V
SS
=-1.2 to -1.8V
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, R
CR
=475kΩ, Ta=25°C)
