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1
2
3
4
8
7
6
5
SHUTDOWN
BYPASS
IN+
IN-
VO-
GND
VDD
VO+
D OR DGN PACKAGE
(TOP VIEW)
DESCRIPTION
Audio
Input
Bias
Control
VDD
350 mW
6
5
7
VO+
VDD
1
2
4
BYPASS
IN -
VDD/2
CI
RI
CS
1 µF
CB
0.1 µF
RF
SHUTDOWN
VO- 8
GND
From System Control
3 IN+
-
+
-
+
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
350-mW MONO AUDIO POWER AMPLIFIER WITH DIFFERENTIAL INPUTS
•Fully Specified for 3.3-V and 5-V Operation•Wide Power Supply Compatibility2.5 V – 5.5 V•Output Power for R
L
= 8 Ω– 350 mW at V
DD
= 5 V– 250 mW at V
DD
= 3.3 V•Ultralow Supply Current in ShutdownMode . . . 0.15 µA•Thermal and Short-Circuit Protection•Surface-Mount Packaging– SOIC
– PowerPAD™ MSOP
The TPA321 is a bridge-tied load (BTL) audio power amplifier developed especially for low-voltage applicationswhere internal speakers are required. Operating with a 3.3-V supply, the TPA321 can deliver 250 mW ofcontinuous power into a BTL 8-Ωload at less than 1% THD+N throughout voice band frequencies. Although thisdevice is characterized out to 20 kHz, its operation was optimized for narrower band applications such as cellularcommunications. The BTL configuration eliminates the need for external coupling capacitors on the output inmost applications, which is particularly important for small battery-powered equipment. This device features ashutdown mode for power-sensitive applications with a quiescent current of 0.15 µA during shutdown. TheTPA321 is available in an 8-pin SOIC surface-mount package and the surface-mount PowerPAD™ MSOP, whichreduces board space by 50% and height by 40%.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2000–2004, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATING TABLE
RECOMMENDED OPERATING CONDITIONS
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integratedcircuits be handled with appropriate precautions. Failure to observe proper handling and installationprocedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precisionintegrated circuits may be more susceptible to damage because very small parametric changes couldcause the device not to meet its published specifications.
AVAILABLE OPTIONS
PACKAGED DEVICES
MSOPT
A
SYMBOLIZATIONSMALL OUTLINE
(1)
(D) MSOP
(1)
(DGN)
–40°C to 85°C TPA321D TPA321DGN AJB
(1) The D and DGN packages are available taped and reeled. To order a taped and reeled part, add thesuffix R to the part number (e.g., TPA321DR).
over operating free-air temperature range (unless otherwise noted)
(1)
UNIT
V
DD
Supply voltage 6 VV
I
Input voltage –0.3 V to V
DD
+0.3 VContinuous total power dissipation Internally limited (see Dissipation Rating Table)T
A
Operating free-air temperature range –40°C to 85°CT
J
Operating junction temperature range –40°C to 150°CT
stg
Storage temperature range –65°C to 150°CLead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
PACKAGE T
A
≤25°C DERATING FACTOR T
A
= 70°C T
A
= 85°C
D 725 mW 5.8 mW/°C 464 mW 377 mWDGN 2.14 W
(1)
17.1 mW/°C 1.37 W 1.11 W
(1) See the Texas Instruments document, PowerPAD Thermally Enhanced Package Application Report(literature number SLMA002), for more information on the PowerPAD™ package. The thermal datawas measured on a PCB layout based on the information in the section entitled Texas InstrumentsRecommended Board for PowerPAD on page 33 of the before mentioned document.
MIN MAX UNIT
V
DD
Supply voltage 2.5 5.5 VV
IH
High-level voltage SHUTDOWN 0.9 V
DD
VV
IL
Low-level voltage SHUTDOWN 0.1 V
DD
VT
A
Operating free-air temperature –40 85 °C
2
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ELECTRICAL CHARACTERISTICS
OPERATING CHARACTERISTICS
ELECTRICAL CHARACTERISTICS
OPERATING CHARACTERISTICS
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
at specified free-air temperature, V
DD
= 3.3 V, T
A
= 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
|V
OO
| Output offset voltage (measured differentially) SHUTDOWN = 0 V, R
L
= 8 Ω, R
F
= 10 kΩ5 20 mVPSRR Power supply rejection ratio V
DD
= 3.2 V to 3.4 V 85 dBI
DD
Supply current (see Figure 3 ) SHUTDOWN = 0 V, R
F
= 10 kΩ0.7 1.5 mAI
DD(SD)
Supply current, shutdown mode (see Figure 4 ) SHUTDOWN = V
DD
, R
F
= 10 kΩ0.15 5 µA|I
IH
| High-level input current SHUTDOWN, V
DD
= 3.3 V, V
I
= 3.3 V 1 µA|I
IL
| Low-level input current SHUTDOWN, V
DD
= 3.3 V, V
I
= 0 V 1 µA
V
DD
= 3.3 V, T
A
= 25°C, R
L
= 8 Ω
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
P
O
Output power
(1)
THD = 0.5%, See Figure 9 250 mWP
O
= 250 mW, f = 20 Hz to 4 kHz,THD + N Total harmonic distortion plus noise 1.3%A
V
= -2 V/V, See Figure 7Maximum output power bandwidth A
V
= -2 V/V, THD = 3%, See Figure 7 10 kHzB
1
Unity-gain bandwidth Open loop, See Figure 15 1.4 MHzSupply ripple rejection ratio f = 1 kHz, C
B
= 1 µF, See Figure 2 71 dBA
V
= –1 V/V, C
B
= 0.1 µF,V
n
Noise output voltage 15 µV(rms)R
L
= 32 Ω, See Figure 19
(1) Output power is measured at the output terminals of the device at f = 1 kHz.
at specified free-air temperature, V
DD
= 5 V, T
A
= 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
|V
OO
| Output offset voltage (measured differentially) SHUTDOWN = 0 V, R
L
= 8 Ω, R
F
= 10 kΩ5 20 mVPSRR Power supply rejection ratio V
DD
= 4.9 V to 5.1 V 78 dBI
DD
Supply current (see Figure 3 ) SHUTDOWN = 0 V, R
F
= 10 kΩ0.7 1.5 mAI
DD(SD)
Supply current, shutdown mode (see Figure 4 ) SHUTDOWN = V
DD
, R
F
= 10 kΩ0.15 5 µA|I
IH
| High-level input current SHUTDOWN, V
DD
= 5.5 V, V
I
= V
DD
1 µA|I
IL
| Low-level input current SHUTDOWN, V
DD
= 5.5 V, V
I
= 0 V 1 µA
V
DD
= 5 V, T
A
= 25°C, R
L
= 8 Ω
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
P
O
Output power THD = 0.5%, See Figure 13 700 mWP
O
= 350 mW, f = 20 Hz to 4 kHz, SeeTHD + N Total harmonic distortion plus noise 1%A
V
= –2 V/V, Figure 11Maximum output power bandwidth A
V
= –2 V/V, THD = 2%, See Figure 11 10 kHzB
1
Unity-gain bandwidth Open loop, See Figure 16 1.4 MHzSupply ripple rejection ratio f = 1 kHz, C
B
= 1 µF, See Figure 2 65 dBA
V
= -1 V/V, C
B
= 0.1 µF,V
n
Noise output voltage 15 µV(rms)R
L
= 32 Ω, See Figure 20
3
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PARAMETER MEASUREMENT INFORMATION
Audio
Input
Bias
Control
VDD
6
5
7
VO+
VDD
1
2
4
BYPASS
IN -
VDD/2
CI
RI
CS
1 µF
CB
0.1 µF
RF
SHUTDOWN
VO- 8
RL = 8 Ω
GND
3 IN+
-
+
-
+
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
Terminal Functions
TERMINAL
I/O DESCRIPTIONNAME NO.
BYPASS is the tap to the voltage divider for internal mid-supply bias. This terminal should be connectedBYPASS 2 I
to a 0.1-µF to 1-µF capacitor when used as an audio amplifier.GND 7 GND is the ground connection.IN- 4 I IN- is the inverting input. IN- is typically used as the audio input terminal.IN+ 3 I IN+ is the noninverting input. IN+ is typically tied to the BYPASS terminal for SE operations.SHUTDOWN 1 I SHUTDOWN places the entire device in shutdown mode when held high (I
DD
~ 0.15 µA).V
DD
6 V
DD
is the supply voltage terminal.V
O
+ 5 O V
O
+ is the positive BTL output.V
O
- 8 O V
O
- is the negative BTL output.
Figure 1. Test Circuit
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TYPICAL CHARACTERISTICS
−50
−60
−80
−10020 100 1 k
−30
−20
f − Frequency − Hz
0
10 k 20 k
−10
−40
−70
−90
VDD = 5 V
VDD = 3.3 V
RL = 8 Ω
CB = 1 µF
kSVR − Supply Voltage Rejection Ratio − dB
VDD − Supply Voltage − V
1.1
0.7
0.3
−0.1
0.9
0.5
0.1
3 4 62 5
IDD− Supply Current − mA
SHUTDOWN = 0 V
RF = 10 kΩ
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
Table of Graphs
FIGURE
k
SVR
Supply voltage rejection ratio vs Frequency 2I
DD
Supply current vs Supply voltage 3, 4vs Supply voltage 5P
O
Output power
vs Load resistance 6vs Frequency 7, 8, 11, 12THD+N Total harmonic distortion plus noise
vs Output power 9, 10, 13, 14Open-loop gain and phase vs Frequency 15, 16Closed-loop gain and phase vs Frequency 17, 18V
n
Output noise voltage vs Frequency 19, 20P
D
Power dissipation vs Output power 21, 22
SUPPLY VOLTAGE REJECTION RATIO SUPPLY CURRENTvs vsFREQUENCY SUPPLY VOLTAGE
Figure 2. Figure 3.
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VDD − Supply Voltage − V
0.15
0.1
0.05 3 43.5 4.5
0.35
2 5
0.2
0.25
0.3
5.52.5
0.4
0.45
0.5
IDD(SD)− Supply Current − Aµ
SHUTDOWN = VDD
RF = 10 kΩ
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
SUPPLY CURRENT (SHUTDOWN)
vsSUPPLY VOLTAGE
Figure 4.
OUTPUT POWER
vsSUPPLY VOLTAGE
Figure 5.
6
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RL − Load Resistance − Ω
300
200
100
016 3224 40 64
800
8
P
48 56
O− Output Power − mW
400
THD+N = 1%
VDD = 5 V
500
600
VDD = 3.3 V
700
f − Frequency − Hz
THD+N −Total Harmonic Distortion + Noise − %
AV = −2 V/V
VDD = 3.3 V
PO = 250 mW
RL = 8 Ω
20 1k 10k
1
0.01
10
0.1
20k100
AV = −20 V/V
AV =− 10 V/V
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
OUTPUT POWER
vsLOAD RESISTANCE
Figure 6.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISEvs vsFREQUENCY FREQUENCY
Figure 7. Figure 8.
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PO − Output Power − W
THD+N −Total Harmonic Distortion + Noise − %
f = 20 Hz VDD = 3.3 V
RL = 8 Ω
AV = −2 V/V
0.01 0.1 1
1
0.01
10
0.1
f = 1 kHz
f = 10 kHz
f = 20 kHz
PO − Output Power − W
THD+N −Total Harmonic Distortion + Noise − %
RL = 8 Ω
0.04 0.1 0.4
1
0.01
10
0.1
0.16 0.22 0.28 0.34
VDD = 3.3 V
f = 1 kHz
AV = −2 V/V
f − Frequency − Hz
THD+N −Total Harmonic Distortion + Noise − %
AV = −2 V/V
VDD = 5 V
PO = 350 mW
RL = 8 Ω
20 1k 10k
1
0.01
10
0.1
20k100
AV = −20 V/V
AV =− 10 V/V
f − Frequency − Hz
THD+N −Total Harmonic Distortion + Noise − %
PO = 175 mW
VDD = 5 V
RL = 8 Ω
AV = −2 V/V
20 1k 10k
1
0.01
10
0.1
20k100
PO = 50 mW
PO = 350 mW
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISEvs vsOUTPUT POWER OUTPUT POWER
Figure 9. Figure 10.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISEvs vsFREQUENCY FREQUENCY
Figure 11. Figure 12.
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PO − Output Power − W
THD+N −Total Harmonic Distortion + Noise − %
f = 20 Hz
VDD = 5 V
RL = 8 Ω
AV = −2 V/V
0.01 0.1 1
1
0.01
10
0.1
f = 1 kHz
f = 10 kHz
f = 20 kHz
PO − Output Power − W
0.1 0.25 10.40 0.55 0.70 0.85
THD+N −Total Harmonic Distortion + Noise − %
RL = 8 Ω
VDD = 5 V
f = 1 kHz
AV = −2 V/V
1
0.01
10
0.1
10
0
−20
−30
20
30
f − Frequency − kHz
40
−10
180
120
0
−120
−180
VDD = 3.3 V
RL = Open
Gain
Phase
60
−60
Open-Loop Gain − dB
Phase − °
1101102103104
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISEvs vsOUTPUT POWER OUTPUT POWER
Figure 13. Figure 14.
OPEN-LOOP GAIN AND PHASEvsFREQUENCY
Figure 15.
9
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10
0
−20
−30 1
20
30
f − Frequency − kHz
40
−10
180
120
0
−120
−180
VDD = 5 V
RL = Open
Gain
Phase
60
−60
Open-Loop Gain − dB
Phase − °
101102103104
−0.5
−1
−1.5
−2
f − Frequency − Hz
−0.25
−0.75
−1.25
−1.75
0
0.5
Closed-Loop Gain − dB
0.25
0.75
130
120
140
Phase − °
150
160
VDD = 3.3 V
RL = 8 Ω
PO = 0.25 W
CI =1 µF
1
170
180
Gain
Phase
101102103104105106
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
OPEN-LOOP GAIN AND PHASEvsFREQUENCY
Figure 16.
CLOSED-LOOP GAIN AND PHASEvsFREQUENCY
Figure 17.
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−0.5
−1
−1.5
−2
f − Frequency − Hz
−0.25
−0.75
−1.25
−1.75
0
0.5
Closed-Loop Gain − dB
0.25
0.75
130
120
140
Phase − °
150
160
VDD = 5 V
RL = 8 Ω
PO = 0.35 W
CI =1 µF
1
170
180
Gain
Phase
101102103104105106
− Output Noise Voltage − µVn
f − Frequency − Hz
20 1 k 10 k
10
1
100
20 k100
VO BTL
VDD = 3.3 V
BW = 22 Hz to 22 kHz
RL = 32 Ω
CB =0.1 µF
AV = −1 V/V
VO+
V(rms)
− Output Noise Voltage − µVn
f − Frequency − Hz
20 1 k 10 k
10
1
100
20 k100
VDD = 5 V
BW = 22 Hz to 22 kHz
RL = 32 Ω
CB =0.1 µF
AV = −1 V/V
VO BTL
VO+
V(rms)
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
CLOSED-LOOP GAIN AND PHASEvsFREQUENCY
Figure 18.
OUTPUT NOISE VOLTAGE OUTPUT NOISE VOLTAGEvs vsFREQUENCY FREQUENCY
Figure 19. Figure 20.
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PO − Output Power − mW
200 600400 8000 1000 1200
VDD = 5 V
RL = 8 Ω
400
320
240
160
720
PD− Power Dissipation − mW
480
560
640
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
POWER DISSIPATION POWER DISSIPATIONvs vsOUTPUT POWER OUTPUT POWER
Figure 21. Figure 22.
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APPLICATION INFORMATION
BRIDGE-TIED LOAD
Power V(RMS)2
RL
V(RMS) VO(PP)
2 2
(1)
RL2x VO(PP)
VO(PP)
-VO(PP)
VDD
VDD
fc1
2RLCC
(2)
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
Figure 23 shows a linear audio power amplifier (APA) in a BTL configuration. The TPA321 BTL amplifier consistsof two linear amplifiers driving both ends of the load. There are several potential benefits to this differential driveconfiguration but power to the load should be initially considered. The differential drive to the speaker means thatas one side is slewing up, the other side is slewing down, and vice versa. This, in effect, doubles the voltageswing on the load as compared to a ground-referenced load. Plugging 2 ×V
O(PP)
into the power equation, wherevoltage is squared, yields 4×the output power from the same supply rail and load impedance (see Equation 1 ).
Figure 23. Bridge-Tied Load Configuration
In a typical portable handheld equipment sound channel operating at 3.3 V, bridging raises the power into an 8-Ωspeaker from a single-ended (SE, ground reference) limit of 62.5 mW to 250 mW. In sound power that is a 6-dBimprovement, which is loudness that can be heard. In addition to increased power, there are frequency responseconcerns. Consider the single-supply SE configuration shown in Figure 24 . A coupling capacitor is required toblock the dc offset voltage from reaching the load. These capacitors can be quite large (approximately 33 µF to1000 µF) so they tend to be expensive, heavy, occupy valuable PCB area, and have the additional drawback oflimiting low-frequency performance of the system. This frequency limiting effect is due to the high pass filternetwork created with the speaker impedance and the coupling capacitance and is calculated with Equation 2 .
For example, a 68-µF capacitor with an 8-Ωspeaker would attenuate low frequencies below 293 Hz. The BTLconfiguration cancels the dc offsets, eliminating the need for the blocking capacitors. Low-frequency performanceis then limited only by the input network and speaker response. Cost and PCB space are also minimized byeliminating the bulky coupling capacitor.
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RL
CCVO(PP)
VO(PP)
VDD
-3 dB
fc
BTL AMPLIFIER EFFICIENCY
VL(RMS)
VOIDD
IDD(RMS)
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
APPLICATION INFORMATION (continued)
Figure 24. Single-Ended Configuration and Frequency Response
Increasing power to the load does carry a penalty of increased internal power dissipation. The increaseddissipation is understandable considering that the BTL configuration produces 4×the output power of a SEconfiguration. Internal dissipation versus output power is discussed further in the thermal considerations section.
Linear amplifiers are inefficient. The primary cause of these inefficiencies is voltage drop across the output stagetransistors. There are two components of the internal voltage drop. One is the headroom or dc voltage drop thatvaries inversely to output power. The second component is due to the sine-wave nature of the output. The totalvoltage drop can be calculated by subtracting the RMS value of the output voltage from V
DD
. The internal voltagedrop multiplied by the RMS value of the supply current, I
DD(RMS)
, determines the internal power dissipation of theamplifier.
An easy-to-use equation to calculate efficiency starts out as being equal to the ratio of power from the powersupply to the power delivered to the load. To accurately calculate the RMS values of power in the load and in theamplifier, the current and voltage waveform shapes must first be understood (see Figure 25 ).
Figure 25. Voltage and Current Waveforms for BTL Amplifiers
Although the voltages and currents for SE and BTL are sinusoidal in the load, currents from the supply aredifferent between SE and BTL configurations. In an SE application the current waveform is a half-wave rectifiedshape, whereas in BTL it is a full-wave rectified waveform. This means RMS conversion factors are different.Keep in mind that for most of the waveform both the push and pull transistors are not on at the same time, whichsupports the fact that each amplifier in the BTL device only draws current from the supply for half the waveform.The following equations are the basis for calculating amplifier efficiency.
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IDDRMS2VP
RL
PSUP VDD IDDRMSVDD 2VP
RL
Efficiency PL
PSUP
where
PL
VLRMS2
RLVp2
2RL
VLRMSVP
2
(3)
Efficiency of a BTL configuration
VP
2VDD
PLRL
212
2VDD
(4)
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
APPLICATION INFORMATION (continued)
Table 1 employs Equation 4 to calculate efficiencies for three different output power levels. The efficiency of theamplifier is quite low for lower power levels and rises sharply as power to the load is increased resulting in anearly flat internal power dissipation over the normal operating range. The internal dissipation at full output poweris less than in the half-power range. Calculating the efficiency for a specific system is the key to proper powersupply design.
Table 1. Efficiency vs Output Power in 3.3-V 8-ΩBTL Systems
PEAK-to-PEAK INTERNALOUTPUT POWER EFFICIENCY
VOLTAGE DISSIPATION(W) (%)
(V) (W)
0.125 33.6 1.41 0.260.25 47.6 2.00 0.290.375 58.3 2.45
(1)
0.28
(1) High-peak voltage values cause the THD to increase.
A final point to remember about linear amplifiers (either SE or BTL) is how to manipulate the terms in theefficiency equation to utmost advantage when possible. Note that in Equation 4 , V
DD
is in the denominator. Thisindicates that as V
DD
goes down, efficiency goes up.
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APPLICATION SCHEMATICS
Audio
Input
Bias
Control
VDD
350 mW
6
5
7
VO+
VDD
1
2
4
BYPASS
IN -
VDD/2 CS
1 µF
CB
2.2 µF
SHUTDOWN
VO- 8
GND
From System Control
3 IN+
-
+
-
+
CI
0.47 µFRI
10 kΩ
RF
50 kΩ
CF
5 pF
Audio
Input-
Bias
Control
VDD
700 mW
6
5
7
VO+
VDD
1
2
4
BYPASS
IN -
VDD/2
CI
CS
1 µF
CB
2.2 µF
SHUTDOWN
VO- 8
GND
From System Control
3 IN+
RI
10 kΩ
RF
50 kΩ
-
+
-
+
RI
10 kΩ
Audio
Input+
CI
RF
50 kΩ
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
Figure 26 is a schematic diagram of a typical handheld audio application circuit, configured for a gain of –10 V/V.
Figure 26. TPA321 Application Circuit
Figure 27 is a schematic diagram of a typical handheld audio application circuit, configured for a gain of –10 V/Vwith a differential input.
Figure 27. TPA321 Application Circuit With Differential Input
It is important to note that using the additional R
F
resistor connected between IN+ and BYPASS causes V
DD
/2 toshift slightly, which could influence the THD+N performance of the amplifier. Although an additional externaloperational amplifier could be used to buffer BYPASS from R
F
, tests in the lab have shown that the THD+Nperformance is only minimally affected by operating in the fully differential mode as shown in Figure 27 . Thefollowing sections discuss the selection of the components used in Figure 26 and Figure 27 .
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COMPONENT SELECTION
Gain Setting Resistors, R
F
and R
I
BTL Gain AV 2RF
RI
(5)
Effective Impedance RFRI
RFRI
(6)
−3 dB
fc
fc1
2RFCF
(7)
Input Capacitor, C
I
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
The gain for each audio input of the TPA321 is set by resistors R
F
and R
I
according to Equation 5 for BTL mode.
BTL mode operation brings about the factor 2 in the gain equation due to the inverting amplifier mirroring thevoltage swing across the load. Given that the TPA321 is a MOS amplifier, the input impedance is high;consequently, input leakage currents are not generally a concern, although noise in the circuit increases as thevalue of R
F
increases. In addition, a certain range of R
F
values is required for proper start-up operation of theamplifier. Taken together, it is recommended that the effective impedance seen by the inverting node of theamplifier be set between 5 kΩand 20 kΩ. The effective impedance is calculated in Equation 6 .
As an example, consider an input resistance of 10 kΩand a feedback resistor of 50 kΩ. The BTL gain of theamplifier would be –10 V/V, and the effective impedance at the inverting terminal would be 8.3 kΩ, which is wellwithin the recommended range.
For high-performance applications metal film resistors are recommended because they tend to have lower noiselevels than carbon resistors. For values of R
F
above 50 kΩ, the amplifier tends to become unstable due to a poleformed from R
F
and the inherent input capacitance of the MOS input structure. For this reason, place a smallcompensation capacitor (C
F
) of approximately 5 pF in parallel with R
F
when R
F
is greater than 50 kΩ. In effect,this creates a low-pass filter network with the cutoff frequency defined in Equation 7 .
For example, if R
F
is 100 kΩand C
F
is 5 pF then f
c
is 318 kHz, which is well outside of audio range.
In the typical application, input capacitor C
I
is required to allow the amplifier to bias the input signal to the properdc level for optimum operation. In this case, C
I
and R
I
form a high-pass filter with the corner frequencydetermined in Equation 8 .
17
www.ti.com
−3 dB
fc
fc1
2RICI
(8)
CI1
2RIfc
(9)
Power Supply Decoupling, C
S
Midrail Bypass Capacitor, C
B
10
CB250 kΩ1
RFRICI
(10)
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
The value of C
I
is important to consider as it directly affects the bass (low-frequency) performance of the circuit.Consider the example where R
I
is 10 kΩand the specification calls for a flat bass response down to 40 Hz.Equation 8 is reconfigured as Equation 9 .
In this example, C
I
is 0.40 µF, so one would likely choose a value in the range of 0.47 µF to 1 µF. A furtherconsideration for this capacitor is the leakage path from the input source through the input network (R
I
, C
I
) andthe feedback resistor (R
F
) to the load. This leakage current creates a dc offset voltage at the input to the amplifierthat reduces useful headroom, especially in high gain applications. For this reason a low-leakage tantalum orceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitorshould face the amplifier input in most applications, as the dc level there is held at V
DD
/2, which is likely higherthan the source dc level. It is important to confirm the capacitor polarity in the application.
The TPA321 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling toensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also preventsoscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved byusing two capacitors of different types that target different types of noise on the power supply leads. For higherfrequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramiccapacitor, typically 0.1 µF, placed as close as possible to the device V
DD
lead, works best. For filteringlower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the audiopower amplifier is recommended.
The midrail bypass capacitor, C
B
, is the most critical capacitor and serves several important functions. Duringstart-up or recovery from shutdown mode, C
B
determines the rate at which the amplifier starts up. The secondfunction is to reduce noise produced by the power supply caused by coupling into the output drive signal. Thisnoise is from the midrail generation circuit internal to the amplifier, which appears as degraded PSRR and THD +N. The capacitor is fed from a 250-kΩsource inside the amplifier. To keep the start-up pop as low as possible,the relationship shown in Equation 10 should be maintained, which insures the input capacitor is fully chargedbefore the bypass capacitor is fully charged and the amplifier starts up.
As an example, consider a circuit where C
B
is 2.2 µF, C
I
is 0.47 µF, R
F
is 50 kΩ, and R
I
is 10 kΩ. Inserting thesevalues into the Equation 10 we get:
18.2 ≤35.5
which satisfies the rule. Bypass capacitor, C
B
, values of 2.2-µF to 1-µF ceramic or tantalum low-ESR capacitorsare recommended for the best THD and noise performance.
18
www.ti.com
USING LOW-ESR CAPACITORS
5-V VERSUS 3.3-V OPERATION
HEADROOM AND THERMAL CONSIDERATIONS
PdB 10Log PW
Pref 10Log 350 mW
1 W –4.6 dB
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
Low-ESR capacitors are recommended throughout this application. A real (as opposed to ideal) capacitor can bemodeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes thebeneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance, the more thereal capacitor behaves like an ideal capacitor.
The TPA321 operates over a supply range of 2.5 V to 5.5 V. This data sheet provides full specifications for 5-Vand 3.3-V operation, as these are considered to be the two most common standard voltages. There are nospecial considerations for 3.3-V versus 5-V operation with respect to supply bypassing, gain setting, or stability.The most important consideration is that of output power. Each amplifier in TPA321 can produce a maximumvoltage swing of V
DD
–1 V. This means, for 3.3-V operation, clipping starts to occur when V
O(PP)
= 2.3 V asopposed to V
O(PP)
= 4 V at 5 V. The reduced voltage swing subsequently reduces maximum output power into an8-Ωload before distortion becomes significant.
Operation from 3.3-V supplies, as can be shown from the efficiency formula in Equation 4 , consumesapproximately two-thirds the supply power for a given output-power level than operation from 5-V supplies.
Linear power amplifiers dissipate a significant amount of heat in the package under normal operating conditions.A typical music CD requires 12 dB to 15 dB of dynamic headroom to pass the loudest portions without distortionas compared with the average power output. The TPA321 data sheet shows that when the TPA321 is operatingfrom a 5-V supply into a 8-Ωspeaker, 350 mW peaks are available. Converting watts to dB:
Subtracting the headroom restriction to obtain the average listening level without distortion yields:
4.6 dB – 15 dB = –19.6 dB (15-dB headroom)4.6 dB – 12 dB = –16.6 dB (12-dB headroom)4.6 dB – 9 dB = –13.6 dB (9-dB headroom)4.6 dB – 6 dB = –10.6 dB (6-dB headroom)4.6 dB – 3 dB = –7.6 dB (3-dB headroom)
Converting dB back into watts:
P
W
= 10
PdB/10
×P
ref
= 11 mW (15 dB headroom)= 22 mW (12-dB headroom)= 44 mW (9-dB headroom)= 88 mW (6-dB headroom)= 175 mW (3-dB headroom)
This is valuable information to consider when attempting to estimate the heat dissipation requirements for theamplifier system. Comparing the absolute worst case, which is 350 mW of continuous power output with 0 dB ofheadroom, against 12-dB and 15-dB applications drastically affects maximum ambient temperature ratings forthe system. Using the power dissipation curves for a 5-V, 8-Ωsystem, the internal dissipation in the TPA321 andmaximum ambient temperatures is shown in Table 2 .
19
www.ti.com
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
Table 2. TPA321 Power Rating, 5-V, 8-ΩBTL
MAXIMUM AMBIENTPEAK OUTPUT
AVERAGE OUTPUT POWER DISSIPATION
TEMPERATUREPOWER
POWER (mW)(mW)
0 CFM
350 350 mW 600 46°C350 175 mW (3 dB) 500 64°C350 88 mW (6 dB) 380 85°C350 44 mW (9 dB) 300 98°C350 22 mW (12 dB) 200 115°C350 11 mW (15 dB) 180 119°C
Table 2 shows that the TPA321 can be used to its full 350-mW rating without any heat sinking in still air up to46°C.
20
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPA321D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPA321DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPA321DGN ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPA321DGNG4 ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPA321DGNR ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPA321DGNRG4 ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPA321DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPA321DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 18-Jul-2006
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPA321DGNR MSOP-
Power
PAD
DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TPA321DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPA321DGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0
TPA321DR SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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