dsPIC33CK256MP508 FAMILY
DS70005349C-page 610 2017-2018 Microchip Technology Inc.
ECCADDRL (ECC Fault Inject Address
Compare Low) .................................................... 89
ECCCONH (ECC Fault Injection
Configuration High) .............................................88
ECCCONL (ECC Fault Injection
Configuration Low).............................................. 88
ECCSTATH (ECC System Status Display High) ........ 90
ECCSTATL (ECC System Status Display Low).......... 90
FALTREG Configuration ........................................... 517
FBOOT Configuration ............................................... 519
FBSLIM Configuration...............................................507
FBTSEQ Configuration .............................................518
FDEVOPT Configuration........................................... 516
FDMT Configuration.................................................. 515
FDMTCNTH Configuration........................................ 514
FDMTCNTL Configuration ........................................514
FDMTIVTH Configuration .........................................513
FDMTIVTL Configuration .......................................... 513
FICD Configuration ...................................................512
FOSC Configuration..................................................509
FOSCSEL Configuration...........................................508
FPOR Configuration.................................................. 511
FSCL (Frequency Scale) .......................................... 260
FSEC Configuration .................................................. 506
FSIGN Configuration.................................................507
FSMINPER (Frequency Scaling
Minimum Period)...............................................260
FWDT Configuration ................................................. 510
I2CxCONH (I2Cx Control High) ................................397
I2CxCONL (I2Cx Control Low).................................. 395
I2CxMSK (I2Cx Slave Mode Address Mask) ............ 399
I2CxSTAT (I2Cx Status) ........................................... 398
IBIASCONH (Current Bias Generator Current
Source Control High) ........................................ 477
IBIASCONL (Current Bias Generator Current
Source Control Low) .........................................478
INDXxCNTH (Index x Counter High) ........................ 346
INDXxCNTL (Index x Counter Low)..........................346
INDXxHLD (Index x Counter Hold) ........................... 347
INTCON1 (Interrupt Control 1).................................. 108
INTCON2 (Interrupt Control 2).................................. 110
INTCON3 (Interrupt Control 3).................................. 111
INTCON4 (Interrupt Control 4).................................. 112
INTTREG (Interrupt Control and Status)................... 113
INTxTMRH (Interval x Timer High)............................344
INTxTMRL (Interval x Timer Low).............................344
INTXxHLDH (Interval x Timer Hold High) ................. 345
INTXxHLDL (Interval x Timer Hold Low)................... 345
LATx (Output Data for PORTx)................................. 120
LFSR (Linear Feedback Shift) .................................. 269
LOGCONy (Combinatorial PWM Logic
Control y) .......................................................... 265
MBISTCON (MBIST Control) ...................................... 49
MDC (Master Duty Cycle) .........................................261
MPER (Master Period).............................................. 262
MPHASE (Master Phase) ......................................... 261
NVMADR (Nonvolatile Memory Lower Address) ........ 86
NVMADRU (Nonvolatile Memory Upper Address)...... 86
NVMCON (Nonvolatile Memory (NVM) Control) ......... 84
NVMKEY (Nonvolatile Memory Key) .......................... 87
NVMSRCADR (NVM Source Data Address) .............. 87
ODCx (Open-Drain Enable for PORTx) .................... 120
OSCCON (Oscillator Control) ...................................189
OSCTUN (FRC Oscillator Tuning) ............................194
PCLKCON (PWM Clock Control)..............................259
PGxCAP (PWM Generator x Capture)...................... 289
PGxCONH (PWM Generator x Control High) ........... 271
PGxCONL (PWM Generator x Control Low) ............ 270
PGxDC (PWM Generator x Duty Cycle) ................... 285
PGxDCA (PWM Generator x Duty Cycle
Adjustment) ...................................................... 286
PGxDTH (PWM Generator x Dead-Time High) ........ 288
PGxDTL (PWM Generator x Dead-Time Low) ......... 288
PGxEVTH (PWM Generator x Event High) .............. 278
PGxEVTL (PWM Generator x Event Low)................ 277
PGxIOCONH (PWM Generator x
I/O Control High)............................................... 276
PGxIOCONL (PWM Generator x
I/O Control Low) ............................................... 275
PGxLEBH (PWM Generator x Leading-Edge
Blanking High) .................................................. 284
PGxLEBL (PWM Generator x Leading-Edge
Blanking Low) ................................................... 283
PGxPER (PWM Generator x Period)........................ 286
PGxPHASE (PWM Generator x Phase) ................... 285
PGxSTAT (PWM Generator x Status) ...................... 273
PGxTRIGA (PWM Generator x Trigger A)................ 287
PGxTRIGB (PWM Generator x Trigger B)................ 287
PGxTRIGC (PWM Generator x Trigger C) ............... 287
PGxyPCIH (PWM Generator xy PCI High) ............... 281
PGxyPCIL (PWM Generator xy PCI Low) ................ 279
PLLDIV (PLL Output Divider).................................... 195
PLLFBD (PLL Feedback Divider) ............................. 193
PMADDR (PMP Address)......................................... 407
PMAEN (PMP Pin Enable) ....................................... 410
PMCON (PMP Control)............................................. 402
PMCONH (PMP Control High).................................. 404
PMD1 (PMD1 Control).............................................. 494
PMD2 (PMD2 Control).............................................. 495
PMD3 (PMD3 Control).............................................. 496
PMD4 (PMD4 Control).............................................. 497
PMD6 (PMD6 Control).............................................. 498
PMD7 (PMD7 Control).............................................. 499
PMD8 (PMD8 Control).............................................. 500
PMDIN1 (PMP Data Input/Output Low) .................... 409
PMDIN2 (PMP Data Input/Output High) ................... 409
PMDOUT1 (PMP Data Output Low)......................... 408
PMDOUT2 (PMP Data Output High) ........................ 408
PMMODE (PMP Mode) ............................................ 405
PMRADDR (PMP Read Address)............................. 413
PMRDIN (PMP Read Input Data) ............................. 414
PMSTAT (PMP Status)............................................. 411
PMWADDR (PMP Write Address) ............................ 412
PORTx (Input Data for PORTx) ................................ 119
POSxCNTH (Position x Counter High) ..................... 340
POSxCNTL (Position x Counter Low)....................... 340
POSxHLD (Position x Counter Hold)........................ 341
PTGADJ (PTG Adjust).............................................. 464
PTGBTE (PTG Broadcast Trigger Enable Low) ....... 460
PTGBTEH (PTG Broadcast Trigger
Enable High)..................................................... 460
PTGC0LIM (PTG Counter 0 Limit)............................ 463
PTGC1LIM (PTG Counter 1 Limit)............................ 463
PTGCON (PTG Control/Status High) ....................... 459
PTGCST (PTG Control/Status Low)......................... 457
PTGHOLD (PTG Hold) ............................................. 461
PTGL0 (PTG Literal 0).............................................. 464
PTGQPTR (PTG Step Queue Pointer) ..................... 465
PTGQUEn (PTG Step Queue n Pointer) .................. 465
PTGSDLIM (PTG Step Delay Limit) ......................... 462
PTGT0LIM (PTG Timer0 Limit)................................. 461
PTGT1LIM (PTG Timer1 Limit)................................. 462