LTC4413-1/LTC4413-2
1
441312fd
TYPICAL APPLICATION
FEATURES
APPLICATIONS
DESCRIPTION
Dual 2.6A, 2.5V to 5.5V
Fast Ideal Diodes
in 3mm × 3mm DFN
The LTC
®
4413-1 and LTC4413-2 each contain two mono-
lithic ideal diodes, each capable of supplying up to 2.6A
from input voltages between 2.5V and 5.5V. The ideal
diodes use a 100mΩ P-channel MOSFET to independently
connect INA to OUTA and INB to OUTB. During normal
forward operation, the voltage drops across each of
these diodes are regulated to as low as 18mV. Quiescent
current is less than 80μA for diode currents up to 1A. If
either of the output voltages exceeds its respective input
voltage, that MOSFET is turned off and less than 1μA of
reverse current fl ows from OUT to IN. Maximum forward
current in each MOSFET is limited to a constant 2.6A and
internal thermal limiting circuits protect the part during
fault conditions. An internal overvoltage protection sensor
detects when a voltage exceeds the LTC4413-2 absolute
maximum voltage tolerance.
Two active-high control pins independently turn off the two
ideal diodes contained within the LTC4413-1/LTC4413-2.
When the selected channel is reverse biased, or the
LTC4413-1/LTC4413-2 is put into low power standby, the
status signal is pulled low by an 11μA open drain.
The LTC4413-1/LTC4413-2 are housed in a 10-lead 3mm
× 3mm DFN package.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. PowerPath is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
n 2-Channel Ideal Diode OR’ing or Load Sharing
n Low Loss Replacement for PowerPath™ OR’ing
Diodes
n Fast Response Replacement for LTC4413
n Low Forward On-Resistance (140mΩ Max at 3.6V)
n Low Reverse Leakage Current
n Low Regulated Forward Voltage (18mV Typ)
n Overvoltage Protection Sensor with Drive Output for
an External P-Channel MOSFET (LTC4413-2 Only)
n 2.5V to 5.5V Operating Range
n 2.6A Maximum Forward Current
n Internal Current Limit Protection
n Internal Thermal Protection
n Status Output to Indicate if Selected Channel is
Conducting
n Programmable Channel On/Off
n Low Profi le (0.75mm) 10-Lead 3mm
×
3mm DFN
Package
n Battery and Wall Adapter Diode OR’ing in Handheld
Products
n Backup Battery Diode OR’ing
n Power Switching
n USB Peripherals
n Uninterruptable Supplies
INA
IDEAL
FDR8508
LTC4413-2
INB
IDEAL
BAT
ENBA
GND
ENBB
OUTA
OUTB
STAT
470k
4.7μF
441312 TA01a
STAT
STAT IS HIGH WHEN WALL ADAPTER IS
SUPPLYING LOAD CURRENT
OVP IS HIGH WHEN WALL ADAPTER VOLTAGE > 6V
OVP
TO LOAD
VCC
OVI
OVP
+
10μF
0.1μF
WALL
ADAPTER
INPUT
1Ω
Automatic Switchover from a Battery to a Wall Adapter
LOAD (mA)
0
700
600
500
400
300
200
100
01500 2500
441312 TA01b
500 1000 2000 3000
POWER LOSS (mW)
1N5817
LTC4413-1
Power Loss vs Load
LTC4413-1/LTC4413-2
2
441312fd
PIN CONFIGURATION
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
INA, INB, OUTA, OUTB, STAT,
ENBA, ENBB Voltage .................................... –0.3V to 6V
OVI, OVP Voltage ....................................... –0.3V to 13V
Operating Temperature Range .................–40°C to 85°C
(Note 1)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN, VOUT Operating Supply Range for Channel A or B VIN and/or VOUT Must be in This Range for
Proper Operation
l2.5 5.5 V
UVLO UVLO Turn-On Rising Threshold Max (VINA, VINB, VOUTA, VOUTB)l2.45 V
UVLO Turn-Off Falling Threshold Max (VINA, VINB, VOUTA, VOUTB)l1.7 V
IQF Quiescent Current in Forward Regulation,
Measured via GND
VINA = 3.6V, IINA = 100mA, VINB = 0V,
IINB = 0mA (Note 3)
l40 58 μA
IQRIN Current Drawn from or Sourced into IN
When VOUT is Greater than VIN
VIN = 3.6V, VOUT = 5.5V (Note 6) l–1 2.5 4.5 μA
IQRGND Quiescent Current While in Reverse
Turn-Off, Measured via GND
VINA = VINB = 0V, VOUTB = VOUTA = 5.5V,
VSTAT = 0V
28 36 μA
LTC4413-1 LTC4413-2
TOP VIEW
11
DD PACKAGE
10-LEAD
(
3mm × 3mm
)
PLASTIC DFN
10
9
6
7
8
4
5
3
2
1OUTA
STAT
NC
NC
OUTB
INA
ENBA
GND
ENBB
INB
TJMAX = 125°C, θJA = 43°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
TOP VIEW
11
DD PACKAGE
10-LEAD
(
3mm × 3mm
)
PLASTIC DFN
10
9
6
7
8
4
5
3
2
1OUTA
STAT
OVI
OVP
OUTB
INA
ENBA
GND
ENBB
INB
TJMAX = 125°C, θJA = 43°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. (Notes 2, 6)
Storage Temperature Range .................. –65°C to 125°C
Continuous Power Dissipation ..........................1500mW
(Derate 25mW/°C Above 70°C)
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC4413EDD-1#PBF LTC4413EDD-1#TRPBF LCPP 10-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C
LTC4413EDD-2#PBF LTC4413EDD-2#TRPBF LCPQ 10-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C
LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC4413EDD-1 LTC4413EDD-1#TR LCPP 10-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C
LTC4413EDD-2 LTC4413EDD-2#TR LCPQ 10-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
ORDER INFORMATION
LTC4413-1/LTC4413-2
3
441312fd
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. (Notes 2, 6)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IQROUTB Quiescent Current While in Reverse
Turn-Off. Current Drawn from VOUTA When
OUTB Supplies Chip Power
VINA = VINB = 0V, VOUTA = 3.6V, VOUTB = 5.5V l3.5 6.5 μA
IQOFF Quiescent Current with Both ENBA and
ENBB High
VINA = VINB = 3.6V, VENBA = VENBB = 1V l28 38 μA
VRTO Reverse Turn-Off Voltage (VOUT – VIN)V
IN = 3.6V l–5 10 mV
VFWD Forward Voltage Drop (VIN – VOUT)
at IOUT = –1mA
VIN = 3.6V l18 24 mV
RFWD On-Resistance, RFWD Regulation
(Measured as ΔV/ΔI)
VIN = 3.6V, IOUT = –100mA to –500mA (Note 5) 100 140 mΩ
RON On-Resistance, RON Regulation
(Measured as V/I at IIN = 1A)
VIN = 3.6V, IIN = 1A (Note 5) 140 200 mΩ
tON PowerPath Turn-On Time VIN = 3.6V, from ENB Falling to IOUT Ramp
Starting
11 μs
tOFF PowerPath Turn-Off Time VIN = 3.6V, from ENB Rising with IIN = 100mA
Falling to 0mA
2μs
Short-Circuit Response
IOC Current Limit VINA OR B = 3.6V (Note 5) 1.8 A
IQOC Quiescent Current While in Overcurrent
Operation
VINA OR B = 3.6V, IOUT = 1.8A (Note 5) 100 130 μA
STAT Output
ISOFF STAT Off Current Shut Down l–1 0 1 μA
ISON STAT Sink Current VIN > VOUT
, VCTL < VIL, TJ < 135°C, IOUT < IMAX l71115 μA
tS(ON) STAT Pin Current Turn-On Time VIN = 3.6V, from ENB Falling 1.8 μs
tS(OFF) STAT Pin Current Turn-Off Time VIN = 3.6V, from ENB Rising 0.8 μs
ENB Inputs
VENBIH ENB Inputs Rising Threshold Voltage VENB Rising l540 600 mV
VENBIL ENB Inputs Falling Threshold Voltage VENB Falling l400 460 mV
VENBHYST ENB Input Hysteresis VENBHYST = (VENBIH – VENBIL)90mV
IENB ENB Inputs Pull-Down Current VOUT < VIN = 3.6V, VENB < VIL l234 μA
OVI Input (LTC4413-2 Only)
VOVIH OVI Input Rising Threshold Voltage VOVI Rising 5.9 6.2 V
VOVIL OVI Input Falling Threshold Voltage VOVI Falling 5.4 5.6 V
VOVID OVI-OVP Voltage Drop VOVI = 8V, No Load at OVP 100 mV
IOVI OVI Bias Current VOVI = 8V 80 μA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC4413-1/LTC4413-2 are guaranteed to meet performance
specifi cations from 0°C to 85°C. Specifi cations over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 3: Quiescent current increases with diode current: refer to plot of
IQF vs IOUT
.
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions.
Overtemperature protection will become active at a junction temperature
greater than the maximum operating temperature. Continuous operation
above the specifi ed maximum operating junction temperature may impair
device reliability.
Note 5: Specifi cation is guaranteed by correlation to wafer-level
measurements.
Note 6: Unless otherwise specifi ed, current into a pin is positive and
current out of a pin is negative. All voltages referenced to GND.
LTC4413-1/LTC4413-2
4
441312fd
TYPICAL PERFORMANCE CHARACTERISTICS
IQF vs ILOAD (Log) IQF vs ILOAD (Linear) IQF vs Temperature
IOC vs Temperature UVLO Thresholds vs Temperature
UVLO Hysteresis vs Temperature ENB Thresholds vs Temperature ENB Hysteresis vs Temperature
LOAD (mA)
40
IQF (μA)
80
120
20
60
100
1 100 1000 10000
441312 G01
0
10
120°C
–40°C
80°C
40°C
0°C
LOAD (mA)
0
0
IQF (μA)
20
40
60
80
120
500 1000 1500 2000
441312 G02
2500 3000
100
120°C
80°C
40°C
–40°C
0°C
TEMPERATURE (°C)
–40
0
IQF (μA)
20
40
60
80
1A
500mA
100mA
1mA
100
120
0 40 80 120
441312 G03
VIN (V)
2
IQF (μA)
50
60
70
6
441312 G04
40
30
0345
2.5 3.5 4.5 5.5
20
10
90
80 IQF = 1A
IQF = 100mA
IQF vs VIN
TEMPERATURE (°C)
–40
2000
2500
3500
80
441312 G05
1500
1000
0 40 120
500
0
3000
IOC (mA)
TEMPERATURE (°C)
–40
2.05
2.10
2.20
80
441312 G06
2.00
1.95
0 40 120
1.90
1.85
2.15
RISING
FALLING
UVLO THRESHOLDS (V)
TEMPERATURE (°C)
–40
UVLO HYSTERESIS (mV)
150
200
250
20 60 120
441312 G07
100
50
0
–20 0 40 80 100
TEMPERATURE (°C)
–40
0
ENBIH/ENBIL (mV)
100
200
300
400
500
ENBIH
ENBIL
600
0 40 80 120
441312 G08
TEMPERATURE (°C)
–40
0
ENB HYSETERSIS (mV)
20
40
60
80
04080 120
441312 G09
100
120
–20 20 60 100
LTC4413-1/LTC4413-2
5
441312fd
RFWD vs VIN and ILOAD = 500mA
TYPICAL PERFORMANCE CHARACTERISTICS
VFWD and RFWD vs ILOAD (Linear) RFWD and VFWD vs ILOAD (Log)
VFWD vs ILOAD (Log) RFWD vs Temperature
ILEAK vs Temperature at
VREVERSE = 5.5V
ILEAK vs VREVERSE
Response to 800mA Load Step
in <16μs
ENB Turn-On, 30μs to Turn On
with 180mA Load
CH1 = IN 100mV/DIV
4μs/DIV 441312 G17
CH2 OUT
100mV/DIV
CH4 IOUT
200mV/DIV
CH1 IN 1V/DIV
CH3 ENB
1V/DIV
10μs/DIV 441312 G18
CH2 OUT
1V/DIV
CH4 IOUT
200mV/DIV
VIN (V)
2
60
RFWD 500mA (mΩ)
62
66
68
70
80
74
344.5
441312 G10
64
76
78
72
2.5 3.5 55.5 6
LOAD (mA)
0
0
RFWD (mΩ)
VFWD (mV)
100
200
300
400
500
0
50
100
150
200
250
500 1000 1500 2000
441312 G11
2500 3000
120°C
80°C
40°C
0°C
–40°C VFWD
RFWD
LOAD (mA)
1
0
RFWD (mΩ)
VFWD (mV)
100
200
300
400
500
600
0
50
100
150
200
250
300
10 100 1000 10000
441312 G12
120°C
80°C
40°C
0°C
–40°C
RFWD VFWD
LOAD (mA)
50
VFWD (mV)
100
150
200
250
1 100 1000 10000
441312 G13
0
10
120°C
80°C
40°C
0°C
–40°C
TEMPERATURE (°C)
–40
0
RFWD (mΩ)
20
40
60
80
100
100mA
500mA
1A
120
0 40 80 120
441312 G14
TEMPERATURE (°C)
0.001
ILEAK (μA)
0.01
–40 40 80
441312 G15
0.0001
0–20 60 10020 12
0
0.00001
0.1
1
5.5V
3.6V
VREVERSE (V)
0
0.00001
ILEAK (μA)
1
10
100
241356
441312 G16
0.1
0.01
0.001
0.0001
120°C
80°C
40°C
0°C
–40°C
LTC4413-1/LTC4413-2
6
441312fd
TYPICAL PERFORMANCE CHARACTERISTICS
Effi ciency vs Load Current Power Loss vs Load Current
Overvoltage Thresholds
vs Temperature (LTC4413-2 Only)
Overvoltage Hysteresis
vs Temperature (LTC4413-2 Only)
OVI Current vs Voltage
(LTC4413-2 Only)
OVI-OVP Voltage Drop
vs OVI Voltage (LTC4413-2 Only)
IQ OVI vs Temperature
(LTC4413-2 Only)
OVI-OVP vs Temperature
(LTC4413-2 Only)
ENB Turn-Off, 2μs to Disconnect
IN from 180mA Load
CH1 IN 1V/DIV
CH3 ENB
1V/DIV
4μs/DIV 441312 G19
CH2 OUT
1V/DIV
CH4 IIN
100mV/DIV
LOAD (mA)
93
EFFICIENCY (%)
99
100
92
91
98
95
97
96
94
1 100 1000 10000
441312 G20
90
10
120°C
80°C
40°C
0°C
–40°C
LOAD (mA)
1
0
POWER LOSS (mW)
10
1000
100 10 1000 1000
0
441312 G21
1
100
120°C
80°C
40°C
0°C
–40°C
TEMPERATURE (°C)
–40
5.8
6.0
6.4
80
441312 G22
5.6
5.4
0 40 120
5.2
5.0
6.2
OVPIH/OVPIL (V)
OVP RISING
OVP FALLING
TEMPERATURE (°C)
–40
OVP HYSTERESIS (mV)
200
250
300
120
441312 G23
150
100
0040 80
50
400
350
VOVI (V)
0
80
100
140
610
441312 G24
60
40
24 812
20
0
120
IOVI (μA)
TA = 25°C
OVI (V)
0
3
4
6
610
441312 G25
2
1
24 812
0
5
OVP (V)
TA = 25°C
TEMPERATURE (°C)
–40
IQ OVI (μA)
100
120
140
120
441312 G26
80
60
0040 80
40
20
180
160 IQ OVI = 13V
IQ OVI = 6.5V
TEMPERATURE (°C)
–40
OVI-OVP (mV)
80
120
120
441312 G27
40
0040 80
–20 20 60 100
160
60
100
20
140
VOHOVP = 13V
VOHOVP = 6.5V
LTC4413-1/LTC4413-2
7
441312fd
PIN FUNCTIONS
INA (Pin 1): Primary Ideal Diode Anode and Positive Power
Supply for LTC4413-1/LTC4413-2. Bypass INA with a ce-
ramic capacitor of at least 1μF. (Series 1Ω snub resistors
and higher valued capacitances are recommended when
large inductances are in series with this input.) This pin
can be grounded when not used. Limit slew rate on this
pin to less than 2.5V/μs.
ENBA (Pin 2): Enable Low for Diode A. Pull this pin high
to shut down this power path. Tie to GND to enable.
Refer to Table 1 for mode control functionality. This pin
can be left fl oating, a weak (3.5μA) pull-down internal to
LTC4413-1/LTC4413-2 is included.
GND (Pin 3): Power Ground for the IC.
ENBB (Pin 4): Enable Low for Diode B. Pull this pin high
to shut down this power path. Tie to GND to enable.
Refer to Table 1 for mode control functionality. This pin
can be left fl oating, a weak (3.5μA) pull-down internal to
LTC4413-1/LTC4413-2 is included.
INB (Pin 5): Secondary Ideal Diode Anode and Positive
Power Supply for LTC4413-1/LTC4413-2. Bypass INB with a
ceramic capacitor of at least 1μF. (Series 1Ω snub resistors
and higher valued capacitances are recommended when
large inductances are in series with this input.) This pin
can be grounded when not used. Limit slew rate on this
pin to less than 2.5V/μs.
OUTB (Pin 6): Secondary Ideal Diode Cathode and Output
of the LTC4413-1/LTC4413-2. Bypass OUTB with a high
(1mΩ min) ESR ceramic capacitor of at least 4.7μF. This
pin must be left fl oating when not in use. Limit slew rate
on this pin to less than 2.5V/μs.
OVP (Pin 7, LTC4413-2 Only): Drive Output for an Exter-
nal OVP Switch PMOS Transistor (To Inhibit Overvoltage
Wall Adapter Voltages from Damaging Device.) During
overvoltage conditions, this output will remain high so
long as an overvoltage condition persists. This pin must
be left fl oating when not in use.
OVI (Pin 8, LTC4413-2 Only): Sense Input for Overvoltage
Protection Block. This pin can be left fl oating or grounded
when not used.
STAT (Pin 9): Status Condition Indicator. Weak (11μA)
pull-down current output. When terminated, high indicates
diode conducting. Refer to Table 2 for the operation of this
pin. This pin can also be left fl oating or grounded.
OUTA (Pin 10): Primary Ideal Diode Cathode and Output
of the LTC4413-1/LTC4413-2. Bypass OUTA with a high
(1mΩ min) ESR ceramic capacitor of at least 4.7μF. This
pin must be left fl oating when not in use. Limit slew rate
on this pin to less than 2.5V/μs.
Exposed Pad (Pin 11): Signal Ground. This pin must be
soldered to PCB ground to provide both electrical contact
to ground and good thermal contact to PCB.
LTC4413-1/LTC4413-2
8
441312fd
BLOCK DIAGRAM
+
–
1 10
+
–
+
–
OVER CURRENT
INA
ENBA
+
–
VOFF
AENA
VGATEA
PA
PB
AENA
OVER TEMP
OUTA
9
STAT
+–
A
0.5V ENA
3GND
BENA
11μA
3μA
OVER TEMP
STB
UVLO
ENA
ENB
OUTA (MAX)
OUTB (MAX)
+
–
5 6
+
–
+
–
ENB
OVER CURRENT
INB
4ENBB
+
–
VOFF
BENA
6V
VGATEB
OUTB
8
OVI
441312 BD
LTC4413-2 ONLY
OVERVOLTAGE PROTECTION
7
OVP
+–
B
0.5V
+
–
3μA
2
LTC4413-1/LTC4413-2
9
441312fd
OPERATION
The LTC4413-1/LTC4413-2 are described with the aid of the
Block Diagram. Operation begins when the power source at
VINA or VINB rises above the undervoltage lockout (UVLO)
voltage of 2.4V and the corresponding control pin ENBA or
ENBB is low. If only the voltage at the VINA pin is present,
the internal power source (VDD) is supplied from the VINA
pin. The amplifi er (A) pulls a current proportional to the
difference between VINA and VOUTA from the gate (VGATEA)
of the internal PFET (PA), driving this gate voltage below
VINA. This turns on PA. As VOUTA pulls up to a forward
voltage drop (VFWD) of 15mV below VINA, the LTC4413
regulates VGATEA to maintain the small forward voltage
drop. The system is now in forward regulation and the
load at VOUTA is powered from the supply at VINA. As the
load current varies, VGATEA is controlled to maintain VFWD
until the load current exceeds the transistor’s (PA) ability
to deliver the current as VGATEA approaches GND. At this
point, the PFET behaves as a fi xed resistor, RON, whereby
the forward voltage increases slightly with increased load
current. As the magnitude of IOUT increases further, (such
that ILOAD > IOC) the LTC4413-1/LTC4413-2 fi xes the load
current to the constant value IOC to protect the device.
The characteristics for parameters RFWD, RON, VFWD and
IOC are specifi ed with the aid of Figure 1, illustrating the
LTC4413-1/LTC4413-2 forward voltage drop versus that
of a Schottky.
If another supply is provided at VINB, the LTC4413-1/
LTC4413-2 likewise regulate the gate voltage on PB to
maintain the output voltage, VOUTB, just below the input
voltage VINB. If this alternate supply, VINB, exceeds the
voltage at VINA, the LTC4413-1/LTC4413-2 selects this
input voltage as the internal supply (VDD). This second
ideal diode operates independently of the fi rst ideal diode
function.
When an alternate power source is connected to the load
at VOUTA (or VOUTB), the LTC4413-1/LTC4413-2 sense the
increased voltage at VOUTA, and amplifi er A increases the
voltage VGATEA, reducing the current through PA. When
VOUTA is higher than VINA + VRTO, VGATEA will be pulled up
to VDD, turning off PA. The internal power source for the
LTC4413-1/LTC4413-2 (VDD) then diverts to draw current
from the VOUTA pin, only if VOUTA is larger than VINB (or
VOUTB). The system is now in the reverse turn-off mode.
Power to the load is being delivered from an alternate
supply, and only a small current (ILEAK) is drawn from or
sourced to VINA to sense the potential at VINA.
When the selected channel of the LTC4413-1/LTC4413-2
is in reverse turn-off mode or both channels are disabled,
the STAT pin sinks 11μA of current (ISON) if connected.
Channel selection is accomplished using the two ENB
pins, ENBA and ENBB. When the ENBA input is asserted
(high), PA has its gate voltage pulled to VDD, turning off
PA. A 3.5μA pull-down current on the ENB pins ensures
a low level at these inputs if left fl oating.
FORWARD VOLTAGE (V)
0
0
CURRENT (A)
IOC
IFWD
LTC4413-1
LTC4413-2
SLOPE: 1/RON
VFWD
441312 F01
SLOPE: 1/RFWD
1N5817
Figure 1. The LTC4413 vs the 1N5817
LTC4413-1/LTC4413-2
10
441312fd
OPERATION
Overcurrent and Short-Circuit Protection
During an overcurrent condition, the output voltage droops
as the load current exceeds the amount of current that
the LTC4413-1/LTC4413-2 can supply. At the time when
an overcurrent condition is fi rst detected, the LTC4413-1/
LTC4413-2 take some time to detect this condition before
reducing the current to IOC. For short durations after the
output is shorted, until TOC, the current may exceed IOC.
The magnitude of this peak short-circuit current can be
large depending on the load current immediately before
the short-circuit occurs. During overcurrent operation, the
power consumption of the LTC4413-1/LTC4413-2 is large,
and is likely to cause an overtemperature condition as the
internal die temperature exceeds the thermal shutdown
temperature.
Overtemperature Protection
The overtemperature condition is detected when the
internal die temperature increases beyond 150°C. An
overtemperature condition will cause the gate amplifi ers
(A and B) as well as the two P-channel MOSFETs (PA
and PB) to shut off. When the internal die temperature
cools to below 140°C, the amplifi ers turn on and the
LTC4413-1/LTC4413-2 reverts to normal operation. Note
that prolonged operation under overtemperature condi-
tions degrades reliability.
Overvoltage Protection (LTC4413-2 Only)
An overvoltage condition is detected whenever the
overvoltage input (OVI) pin is pulled above 6V. The con-
dition persists until the OVI voltage falls below 5.6V. The
overvoltage protection (OVP) output is low unless an
overvoltage condition is detected. If an overvoltage condi-
tion is present, the OVP output is pulled up to the voltage
applied to the OVI input. This output signal can be used to
enable or disable an external PFET that is placed between
the input that is the source of the excessive voltage and
the input to the LTC4413-2, thus eliminating the potential
damage that may occur to the LTC4413-2 if its input volt-
age exceeds the absolute maximum voltage of 6V. See
the Applications Information section
Dual Battery Load
Sharing with Automatic Switchover to a Wall Adapter with
Overvoltage Protection
for more information on using the
overvoltage protection function within the LTC4413-2.
Channel Selection and Status Output
Two active-high control pins independently turn off the two
ideal diodes contained within the LTC4413-1/LTC4413-2,
controlling the operation mode as described by Table 1.
When the selected channel is reverse biased, or the
LTC4413-1/LTC4413-2 is put into low power standby, the
status signal indicates this condition with a low voltage.
Table 1. Mode Control
ENB1 ENB2 STATE
Low Low Diode’OR NB: The Two Outputs are not Connected
Internal to the Device
Low High Diode A = ENABLED, Diode B = DISABLED
High Low Diode A = DISABLED, Diode B = ENABLED
High High All Off (Low Power Standby)
The function of the STAT pin depends on the mode that
has been selected. Table 2 describes the STAT pin output
current, as a function of the mode selected as well as the
conduction state of the two diodes.
Table 2. STAT Output Pin Function
ENB1 ENB2 CONDITIONS STAT
Low Low Diode A Forward Bias,
Diode B Forward Bias
ISNK = 0μA
Diode A Forward Bias,
Diode B Reverse Bias
ISNK = 0μA
Diode A Reverse Bias,
Diode B Forward Bias
ISNK = 11μA
Diode A Reverse Bias,
Diode B Reverse Bias
ISNK = 11μA
Low High Diode A Forward Bias,
Diode B Disabled
ISNK = 0μA
Diode A Reverse Bias,
Diode B Disabled
ISNK = 11μA
High Low Diode A Disabled,
Diode B Forward Bias
ISNK = 0μA
Diode A Disabled,
Diode B Reverse Bias
ISNK = 11μA
High High Diode A Disabled,
Diode B Disabled
ISNK = 11μA
LTC4413-1/LTC4413-2
11
441312fd
APPLICATIONS INFORMATION
Introduction
The LTC4413-1/LTC4413-2 are intended for power control
applications that include low loss diode OR’ing, fully auto-
matic switchover from a primary to an auxiliary source of
power, microcontroller controlled switchover from a pri-
mary to an auxiliary source of power, load sharing between
two or more batteries, charging of multiple batteries from
a single charger and high side power switching.
Dual Battery Load Sharing with Automatic Switchover
to a Wall Adapter with Overvoltage Protection
(LTC4413-2 Only)
An application circuit for dual battery load sharing with
automatic switchover of load from batteries to a wall
adapter is shown in Figure 2. When the wall adapter is not
present, whichever battery has the higher voltage provides
the load current until it has discharged to the voltage of the
other battery. The load is shared between the two batter-
ies according to the capacity of each battery. The higher
capacity battery provides proportionally higher current to
the load. When a wall adapter input is applied, the output
voltage rises as the body diode in MP2 conducts. When
the output voltage is larger than the battery voltages, the
LTC4413 turns off and very little load current is drawn
from the batteries. At this time, the STAT pin pulls down
the gate voltage of MP2, causing it to conduct. This status
signal can be used to provide information as to whether
the wall adapter (or BATB) is supplying the load current.
If the wall adapter voltage exceeds the OVI trip threshold
(VOVIH) then the wall adapter is disconnected via the
external PFET, MP1. The OVI voltage can be monitored
(through a voltage divider if necessary) to determine if
an overvoltage condition is present.
Capacitor C2 is required to dynamically pull up on the
gate of PFET MP1 if a fast edge occurs at the wall adapter
input during a hot plug. In the event that capacitor C2 (or
the gate-to-source of MP1) is precharged below the OVI
rising threshold. When a high voltage spike occurs, the
OVP output cannot guarantee turning off MP1 before the
load voltage exceeds the absolute maximum voltage for
the LTC4413-2. This may occur in the event that the wall
adapter suddenly steps from 5.5V to a much higher value.
In this case, a Zener diode is recommended to keep the
output voltage to a safe level.
Automatic PowerPath Control
Figure 3 illustrates an application circuit for microcon-
troller monitoring and control of two power sources. The
microcontroller’s analog inputs (perhaps with the aid of
a resistor voltage divider) monitor each supply input and
the LTC4413-1 status, and then commands the LTC4413-1
through the two ENBA/ENBB control inputs.
INA
IDEAL
MP1
IRLML6402
MP2
IRLML6402
LTC4413-2
INB
IDEAL
BATB
ENBA
C1: C1206C106K8PAC
C2: C0403C103K8PAC
COUT: C1206C475K8PAC
GND
ENBB
OUTA
1
3
4
5
2
10
8
7
6
9
OUTB
STAT
COUT
4.7μF
C2
10nF OPTIONAL
6.2V
DFLZ6V2-7
441312 F02
STAT
RSTAT
470k
OVP
TO LOAD
OVI
OVP
+
BATA
10nF
C1
0.10μF
WALL
ADAPTER
INPUT
JACK R1
1Ω
+
INA
IDEAL
LTC4413-1
INB
IDEAL
ENBA
GND
ENBB
OUTA
OUTB
STAT STAT
441312 F03
LOAD
1
2
3
4
5
10
9
6
CA
10μF
PRIMARY
POWER
SOURCE
AUXILIARY
POWER
SOURCE
RA
1Ω
RSTAT
470k
CB
10μF
C1
4.7μF
RB
1Ω
MICROCONTROLLER
Figure 2 Figure 3
LTC4413-1/LTC4413-2
12
441312fd
Automatic Switchover from a Battery to an Auxiliary
Supply, or a Wall Adapter with Overvoltage Protection
Figure 4 illustrates an application circuit where the
LTC4413-2 is used to automatically switch over between
a battery, an auxiliary power supply and a wall adapter.
When the battery is supplying load current, OVP is at GND
and STAT is high. If a higher supply is applied to AUX, the
BAT will be disconnected from the load and the load is
powered from AUX. When a wall adapter is applied, the
body diode of MP2 forward biases. When the load voltage
exceeds the AUX (or BAT) voltage, the LTC4413-2 senses
this higher voltage and disconnects AUX (or BAT) from
the load. At the same time it pulls the STAT voltage to
GND, thereby turning on MP2. The load current is now
supplied from the wall adapter. If the wall adapter voltage
exceeds the OVI rising threshold, the OVP voltage rises
and turns off MP1, disconnecting the wall adapter from
the load. The output voltage collapses down to the AUX
(or BAT) voltage and the LTC4413-2 reconnects the load
to AUX (or BAT).
APPLICATIONS INFORMATION
Capacitor C2 is required to dynamically pull up on the
gate of MP1 if a fast edge occurs at the wall adapter input
during a hot plug. If the wall adapter voltage is precharged
when an overvoltage spike occurs, the OVP voltage may
not discharge capacitor C2 in time to protect the output.
In this event, a Zener diode is recommended to protect
the output node until MP1 is turned off.
Multiple Battery Charging
Figure 5 illustrates an application circuit for automatic dual
battery charging from a single charger. Whichever battery
has the lower voltage will receive the larger charging cur-
rent until both battery voltages are equal, then both are
charged. While both batteries are charging simultaneously,
the higher capacity battery gets proportionally higher cur-
rent from the charger. For Li-Ion batteries, both batteries
achieve the fl oat voltage minus the forward regulation
voltage of 15mV. This concept can apply to more than
two batteries. The STAT pin provides information as to
when the battery at OUTA is being charged. For intelligent
control, the ENBA/ENBB input pins can be used with a
microcontroller as shown in Figure 3.
INA
IDEAL
MP1
IRLML6402
MP2
IRLML6402
LTC4413-2
INB
IDEAL
ENBA C1: C1206C106K8PAC
C2: C0403C103K8PAC
COUT: C1206C475K8PAC
GND
ENBB
OUTA
1
4
5
2
AUX
470k
470k
3
10
7
9
6
8
OUTB
STAT
COUT
4.7μF
C2
10nF
441312 F04
STAT
RSTAT
560k
OVP
TO LOAD
OVI
OVP
BAT
C1
0.10μF
WALL
ADAPTER
INPUT
JACK R1
1Ω
+
OPTIONAL
6.2V
DFLZ6V2-7
10nF
INA
IDEAL
LTC4413-1
INB
IDEAL
ENBA
GND
ENBB
OUTA
1
3
4
5
2
10
STAT IS HIGH
WHEN BAT1 IS
CHARGING
VCC
9470k
BAT2
6
OUTB
STAT
BATTERY
CHARGER
INPUT
441312 F05
LOAD
LOAD
+
BAT1
+
Figure 4 Figure 5
LTC4413-1/LTC4413-2
13
441312fd
APPLICATIONS INFORMATION
Automatic Switchover from a Battery to a Wall
Adapter and Charger with Overvoltage Protection
Figure 6 illustrates the LTC4413-2 performing the function
of automatically switching a load over from a battery to a
wall adapter while controlling an LTC4059 battery charger.
When no wall adapter is present, the LTC4413-2 connects
the load at OUTA from the Li-Ion battery at INA. In this
condition, the STAT voltage is high, thereby disabling
the battery charger. If a wall adapter of a higher voltage
than the battery is connected to MP1 (but below the OVI
threshold), the load voltage rises as the second ideal di-
ode conducts. As soon as the OUTA voltage exceeds the
INA voltage, the BAT is disconnected from the load and
the STAT voltage falls, turning on the LTC4059 battery
charger and beginning a charge cycle. If a high voltage
wall adapter is inadvertently attached above the OVI rising
threshold, the OVP pin voltage rises, disconnecting both
the LTC4413-2 and the LTC4059 from potentially hazard-
ous voltages. When this occurs, the load voltage collapses
until it is below the BAT voltage causing the STAT voltage
to rise, disabling the battery charger. At the same time,
the LTC4413-2 automatically reconnects the battery to the
load. One major benefi t of this circuit is that when a wall
adapter is present, the user may remove the battery and
replace it without disrupting the load.
Capacitor C2 is required to dynamically pull up on the
gate of MP1 if a fast edge occurs at the wall adapter input
during a hot plug. If the wall adapter voltage is precharged
when an overvoltage spike occurs, the OVP voltage may
not discharge capacitor C2 in time to protect the output.
In this event, a Zener diode is recommended to protect
the output node until MP1 is turned off.
INA
IDEAL
LTC4413-2
INB
OVP
OVI
IDEAL
ENBA
ENBB
GND
100k
D1
OPTIONAL
DFLZ6V2-7
OUTA
Li-Ion
1
4
3
5
2
10
9
RSTAT
560k
6
OUTB
STAT
441312 F06
TO
LOAD
STAT
COUT
4.7μF
C1
10μF
1μF
C2
10nF
+
BAT
PROG
GND
ENB
VCC
LTC4059
Li/CC
MP1
IRLML6402
WALL
ADAPTER
INPUT
JACK
Figure 6
LTC4413-1/LTC4413-2
14
441312fd
Soft-Start Overvoltage Protection
In the event that a low power external PFET is used for
the external overvoltage protection device, care must be
taken to limit the power dissipation in the external PFET.
The operation of this circuit is identical to the “Automatic
Switchover from a Battery to a Wall Adapter” application
shown on the fi rst page of this data sheet. Here, however,
the ideal diode from INA to INB is disabled by pulling up
on ENBA whenever an overvoltage condition is detected.
This channel is turned-off using a resistor connected to
OVP along with a 5.6V Zener diode, ensuring the abso-
lute maximum voltage at ENBA is not exceeded during
an overvoltage event. When the overvoltage condition
ends, the OVP voltage drops slowly, depending on the
gate charge of the external PFET. This causes the external
PFET to linger in a high RDS(ON) region where it can dis-
sipate a signifi cant amount of heat depending on the load
current. To avoid dissipating heat in the external PFET, this
application delays turning on the ideal diode from INA to
OUTA, until the gate voltage of the external PFET drops
below VENBIL, where the external PFET should safely be
out of the high RDS(ON) region. This soft-start scheme can
be used on either channel of the LTC4413-2.
APPLICATIONS INFORMATION
INA
IDEAL
FDR8508
LTC4413-2
INB
IDEAL
BAT
D2
5.6V
ENBA
GND
ENBB
OUTA
OUTB
STAT
RSTAT
470k
COUT
4.7μF
441312 F07
STAT
STAT IS HIGH WHEN WALL ADAPTER IS
SUPPLYING LOAD CURRENT
OVP IS HIGH WHEN WALL ADAPTER
VOLTAGE > 6V
C1: C0805C106K8PAC
C2: C0403C103K8PAC
COUT: C1206C475K8PAC
OVP
TO LOAD
VCC
OVI
OVP
+
C1
10μF
C2
10nF
D1
OPTIONAL
WALL
ADAPTER
INPUT
1Ω
0.1μF
RENBA
560k
Figure 7
LTC4413-1/LTC4413-2
15
441312fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev B)
3.00 p0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.40 p 0.10
BOTTOM VIEW—EXPOSED PAD
1.65 p 0.10
(2 SIDES)
0.75 p0.05
R = 0.125
TYP
2.38 p0.10
(2 SIDES)
15
106
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DD) DFN REV B 0309
0.25 p 0.05
2.38 p0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.65 p0.05
(2 SIDES)2.15 p0.05
0.50
BSC
0.70 p0.05
3.55 p0.05
PACKAGE
OUTLINE
0.25 p 0.05
0.50 BSC
LTC4413-1/LTC4413-2
16
441312fd
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2006
LT 0909 REV D • PRINTED IN USA
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TYPICAL APPLICATION
INA
IDEAL
FDR8508
LTC4413-2
INB
IDEAL
BAT
D2
5.6V
ENBA
GND
ENBB
OUTA
OUTB
STAT
RSTAT
470k
COUT
4.7μF
441312 F07
STAT
STAT IS HIGH WHEN WALL ADAPTER IS
SUPPLYING LOAD CURRENT
OVP IS HIGH WHEN WALL ADAPTER
VOLTAGE > 6V
C1: C0805C106K8PAC
C2: C0403C103K8PAC
COUT: C1206C475K8PAC
OVP
TO LOAD
VCC
OVI
OVP
+
C1
10μF
C2
10nF
D1
OPTIONAL
WALL
ADAPTER
INPUT
1Ω
0.1μF
RENBA
560k
Automatic Switchover from a Battery to a Wall Adapter with Soft-Start Overvoltage Protection
