MCR08MT1G - ON SEMICONDUCTOR - Datasheet.Directory

October, 2013 − Rev. 7

1Publication Order Number:

MCR08BT1/D

MCR08B, MCR08M

Sensitive Gate

Silicon Controlled Rectifiers

Reverse Blocking Thyristors

PNPN devices designed for line powered consumer applications

such as relay and lamp drivers, small motor controls, gate drivers for

larger thyristors, and sensing and detection circuits. Supplied in

surface mount package for use in automated manufacturing.

Features

•Sensitive Gate Trigger Current

•Blocking Voltage to 600 V

•Glass Passivated Surface for Reliability and Uniformity

•Surface Mount Package

•These Devices are Pb−Free and are RoHS Compliant

MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)

Rating Symbol Value Unit

Peak Repetitive Off−State Voltage (Note 1)

(Sine Wave, RGK = 1 kW

TJ = 25 to 110°C)

MCR08B

MCR08M

VDRM,

VRRM

200

600

On-State Current RMS

(All Conduction Angles; TC = 80°C)

IT(RMS) 0.8 A

Peak Non-repetitive Surge Current

(1/2 Cycle Sine Wave, 60 Hz, TC = 25°C)

ITSM 8.0 A

Circuit Fusing Considerations (t = 8.3 ms) I2t 0.4 A2s

Forward Peak Gate Power

(TC = 80°C, t = 1.0 ms)

PGM 0.1 W

Average Gate Power

(TC = 80°C, t = 8.3 ms)

PG(AV) 0.01 W

Operating Junction Temperature Range TJ−40 to +110 °C

Storage Temperature Range Tstg −40 to +150 °C

THERMAL CHARACTERISTICS

Rating Symbol Value Unit

Thermal Resistance, Junction−to−Ambient

PCB Mounted per Figure 1

RqJA 156 °C/W

Thermal Resistance, Junction−to−Tab

Measured on Anode Tab Adjacent to Epoxy

RqJT 25 °C/W

Maximum Device Temperature for Solder-

ing Purposes (for 10 Seconds Maximum)

TL260 °C

Stresses exceeding Maximum Ratings may damage the device. Maximum

Ratings are stress ratings only. Functional operation above the Recommended

Operating Conditions is not implied. Extended exposure to stresses above the

Recommended Operating Conditions may affect device reliability.

1. VDRM and VRRM for all types can be applied on a continuous basis. Ratings

apply for zero or negative gate voltage; however, positive gate voltage shall

not be applied concurrent with negative potential on the anode. Blocking

voltages shall not be tested with a constant source such that the voltage

ratings of the devices are exceeded.

SCRs

0.8 AMPERES RMS

200 thru 600 VOLTS

Device Package Shipping†

ORDERING INFORMATION

SOT−223

CASE 318E

STYLE 10

PIN ASSIGNMENT

Anode

Gate

Cathode

4Anode

http://onsemi.com

MCR08MT1G SOT−223

(Pb−Free)

1000/Tape & Reel

MCR08BT1G SOT−223

(Pb−Free)

1000/Tape &Reel

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.

AYW

CR08x G

CR08x = Device Code

x = B or M

A = Assembly Location

Y = Year

W = Work Week

G=Pb−Free Package

(Note: Microdot may be in either location)

MARKING

DIAGRAM

MCR08B, MCR08M

http://onsemi.com

ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)

Characteristic Symbol Min Typ Max Unit

OFF CHARACTERISTICS

Peak Repetitive Forward or Reverse Blocking Current (Note 3)

(VAK = Rated VDRM or VRRM, RGK = 1 kW

TJ = 25°C

TJ = 110°C

IDRM, IRRM

−

200

ON CHARACTERISTICS

Peak Forward On-State Voltage (Note 2) (IT = 1.0 A Peak) VTM − − 1.7 V

Gate Trigger Current (Continuous dc) (Note 4) (VAK = 12 Vdc, RL = 100 W)IGT − − 200 mA

Holding Current (Note 3) (VAK = 12 Vdc, Initiating Current = 20 mA) IH− − 5.0 mA

Gate Trigger Voltage (Continuous dc) (Note 4) (VAK = 12 Vdc, RL = 100 W)VGT − − 0.8 V

Turn−On Time (VAK = 12 Vdc, ITM = 5 Adc, IGT = 5 mA) tgt −1.25 −ms

DYNAMIC CHARACTERISTICS

Critical Rate-of-Rise of Off State Voltage

(Vpk = Rated VDRM, TC = 110°C, RGK = 1 kW, Exponential Method)

dv/dt

10 − −

V/ms

2. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.

3. RGK = 1000 W is included in measurement.

4. RGK is not included in measurement.

+ Current

+ Voltage

VTM

IDRM at VDRM

Symbol Parameter

VDRM Peak Repetitive Off State Forward Voltage

IDRM Peak Forward Blocking Current

VRRM Peak Repetitive Off State Reverse Voltage

IRRM Peak Reverse Blocking Current

VTM Peak On State Voltage

IHHolding Current

Voltage Current Characteristic of SCR

Anode +

on state

Reverse Blocking Region

(off state)

Reverse Avalanche Region

Anode −

Forward Blocking Region

IRRM at VRRM

(off state)

Figure 1. PCB for Thermal Impedance and Power Testing of SOT-223

0.079

2.0

0.079

2.0

0.059

1.5

0.091

2.3

0.091

2.3

0.472

12.0

0.096

2.44

BOARD MOUNTED VERTICALLY IN CINCH 8840 EDGE CONNECTOR.

BOARD THICKNESS = 65 MIL., FOIL THICKNESS = 2.5 MIL.

MATERIAL: G10 FIBERGLASS BASE EPOXY

0.984

25.0

0.244

6.2

0.059

1.5

0.059

1.5

0.096

2.44

0.096

2.44

0.059

1.5

0.059

1.5

0.15

3.8

ǒinches

mm Ǔ

MCR08B, MCR08M

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PAD AREA = 4.0 cm2, 50

OR 60 Hz HALFWAVE

°THERMAL RESISTANCE, ( C/W)

2.00 4.0 6.0 8.0 10

TYPICAL

MAXIMUM

123

MINIMUM

FOOTPRINT = 0.076 cm2

DEVICE MOUNTED ON

FIGURE 1 AREA = L2

PCB WITH TAB AREA

AS SHOWN

180°

110

IT(AV), AVERAGE ON‐STATE CURRENT (AMPS)

0.50.40.30.20.10

50 OR 60 Hz HALFWAVE

TA, MAXIMUM ALLOWABLE

AMBIENT TEMPERATURE ( C)°

110

100

IT(AV), AVERAGE ON‐STATE CURRENT (AMPS)

110

100

Figure 2. On-State Characteristics Figure 3. Junction to Ambient Thermal

Resistance versus Copper Tab Area

Figure 4. Current Derating, Minimum Pad Size

Reference: Ambient Temperature

Figure 5. Current Derating, 1.0 cm Square Pad

Reference: Ambient Temperature

FOIL AREA (cm2)vT, INSTANTANEOUS ON‐STATE VOLTAGE (VOLTS)

IT, INSTANTANEOUS ON‐STATE CURRENT (AMPS)

IT(AV), AVERAGE ON‐STATE CURRENT (AMPS)

Figure 6. Current Derating, 2.0 cm Square Pad

Reference: Ambient Temperature

1.0

0.1

0.01 4.01.0

110

0.5

0.30.20.10

IT(AV), AVERAGE ON‐STATE CURRENT (AMPS)

0.5

0.40.30.20.10

0.5

0.40.30.20.10

100

20 0.4

TA, MAXIMUM ALLOWABLE

AMBIENT TEMPERATURE ( C)°

T(tab), MAXIMUM ALLOWABLE

TAB TEMPERATURE ( C)°

Figure 7. Current Derating

Reference: Anode Tab

180°

α = 30°

60°90°

60°

120°

60°

180°

120°

1.0 cm2 FOIL, 50 OR

60 Hz HALFWAVE

2.0 3.0

TYPICAL AT TJ = 110°C

MAX AT TJ = 110°C

MAX AT TJ = 25°C

160

140

120

100

120°

90°

60°

90°

1.0 3.0 5.0 7.0 9.0

150

130

110

α = CONDUCTION

ANGLE

50 OR 60 Hz HALFWAVE

α = CONDUCTION

ANGLE

90°

α = 30°

α = CONDUCTION

ANGLE

180°

120°

α = CONDUCTION

ANGLE

α = 30°

θJA

R , JUNCTION TO AMBIENT

TA, MAXIMUM ALLOWABLE

AMBIENT TEMPERATURE ( C)°

MCR08B, MCR08M

http://onsemi.com

rT, TRANSIENT THERMAL RESISTANCE

NORMALIZED

8020-40 -20 0 40 60 110

1000

100

1.0

0.7

1000100.1

IGT, GATE TRIGGER CURRENT (mA)

1.0 100

TJ, JUNCTION TEMPERATURE (°C)

VGT, GATE TRIGGER VOLTAGE (VOLTS)

0.65

0.6

0.55

0.5

0.45

0.4

0.35

0.3

VAK = 12 V

RL = 100 W

TJ = 25°C

2.0

1.0

TJ, JUNCTION TEMPERATURE, (°C)

VGT , GATE TRIGGER VOLTAGE (VOLTS)

TJ, JUNCTION TEMPERATURE, (°C)

IH, HOLDING CURRENT

(NORMALIZED)

0.7

0.6

0.5

0.4

8020-40 -20 0 40 60 110

0.3

1.0

0.1

0.01 1000.10.0001

MAXIMUM AVERAGE POWER

IT(AV), AVERAGE ON‐STATE CURRENT (AMPS)

1.0

0.5

0.30.20.10

0.9

0.8

0.7

0.5

0.4

0.3

0.2

0.1

0.4

0.6

Figure 8. Power Dissipation Figure 9. Thermal Response Device

Mounted on Figure 1 Printed Circuit Board

t, TIME (SECONDS)

180°

α = 30°

60°

(AV),DISSIPATION (WATTS)

00.001 0.01 1.0 10

GT , GATE TRIGGER CURRENT ( μ

RGK = 1000 W, RESISTOR

CURRENT INCLUDED

WITHOUT GATE RESISTOR

VAK = 12 V

RL = 100 W

α = CONDUCTION

ANGLE

VAK = 12 V

RL = 3.0 kW

90°

120°

Figure 10. Typical Gate Trigger Voltage

versus Junction Temperature

Figure 11. Typical Normalized Holding Current

versus Junction Temperature

Figure 12. Typical Range of VGT

versus Measured IGT

Figure 13. Typical Gate Trigger Current

versus Junction Temperature

VAK = 12 V

RL = 100 W

MCR08B, MCR08M

http://onsemi.com

STATIC dv/dt (V/ S)μ

HOLDING CURRENT (mA)I ,

10000

100

STATIC dv/dt (V/ S)μ

10,00010 100 1000

1.0

10000

1000

100

1.0

0.1

10 100 1000 10,000 100,000

CGK, GATE‐CATHODE CAPACITANCE (nF)

0.1 1.0 10 100

RGK, GATE‐CATHODE RESISTANCE (OHMS)

100

1.0

0.1 10001.0

RGK, GATE‐CATHODE RESISTANCE (OHMS)

10 100 10,000 100,000

Figure 14. Holding Current Range versus

Gate-Cathode Resistance

Figure 15. Exponential Static dv/dt versus Junction

Temperature and Gate-Cathode Termination Resistance

RGK, GATE‐CATHODE RESISTANCE (OHMS)

0.01

IGT = 48 mA

TJ = 25°C

IGT = 7 mA

STATIC dv/dt (V/ S)μ

50°

75°

125°

500 V

100 V

STATIC dv/dt (V/ S)μ

GATE‐CATHODE RESISTANCE (OHMS)

100 1000 10,000 100,00010

5000

500

5.0

0.5

1000

500 400 V

TJ = 110°C

50 V

5.0

10000

100

1.0

1000

500

5.0

TJ = 110°C

400 V (PEAK)

RGK = 10 k

RGK = 100

RGK = 1.0 k

10000

100

1.0

1000

500

5.0

IGT = 5 mA

IGT = 70 mA

IGT = 35 mA

IGT = 15 mA

110°

TJ = 25°

Vpk = 400 V

200 V

300 V

Figure 16. Exponential Static dv/dt versus Peak

Voltage and Gate-Cathode Termination Resistance

Figure 17. Exponential Static dv/dt versus

Gate-Cathode Capacitance and Resistance

Figure 18. Exponential Static dv/dt versus

Gate-Cathode Termination Resistance and

Product Trigger Current Sensitivity

MCR08B, MCR08M

http://onsemi.com

PACKAGE DIMENSIONS

SOT−223 (TO−261)

CASE 318E−04

ISSUE L

STYLE 10:

PIN 1. CATHODE

2. ANODE

3. GATE

4. ANODE

123

0.08 (0003)

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

1.5

0.059 ǒmm

inchesǓ

SCALE 6:1

3.8

0.15

2.0

0.079

6.3

0.248

2.3

0.091

2.3

0.091

2.0

0.079

SOLDERING FOOTPRINT*

DIM

MIN NOM MAX MIN

MILLIMETERS

1.50 1.63 1.75 0.060

INCHES

A1 0.02 0.06 0.10 0.001

b0.60 0.75 0.89 0.024

b1 2.90 3.06 3.20 0.115

c0.24 0.29 0.35 0.009

D6.30 6.50 6.70 0.249

E3.30 3.50 3.70 0.130

e2.20 2.30 2.40 0.087

0.85 0.94 1.05 0.033

0.064 0.068

0.002 0.004

0.030 0.035

0.121 0.126

0.012 0.014

0.256 0.263

0.138 0.145

0.091 0.094

0.037 0.041

NOM MAX

L1 1.50 1.75 2.00 0.060

6.70 7.00 7.30 0.264

0.069 0.078

0.276 0.287

− −

0°10°0°10°

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

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copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC

reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any

particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without

limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications

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Phone: 81−3−5817−1050

MCR08BT1/D

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