DISPLAY UNIT USER'S MANUAL Dot-Matrix LCD Units (with built-in controllers) Specifications are subject to change without notice. Suggested applications (if any) are for standard use; See Important Restrictions for limitations on special applications. See Limited Warranty for SHARP's product warranty. The Limited Warranty is in lieu, and exclusive of, all other warranties, express or implied. ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR USE AND FITNESS FOR A PARTICULAR PURPOSE, ARE SPECIFICALLY EXCLUDED. In no event will SHARP be liable, or in any way responsible, for any incidental or consequential economic or property damage. (c) 1999 Copyright SHARP Microelectronics of the Americas. Printed in the USA. Reference No. SMT99007 Dot-Matrix LCD Units Contents PREFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . 3 OVERVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . 3 HARDWARE . . . . . . . . . Interface Signals . . . . Functional Blocks . . . . Microprocessor Interface Reset Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 . 4 . 4 11 12 INSTRUCTIONS . . . . . . . . . . . . . . . . . . . . . . . 15 General Information . . . . . . . . . . . . . . . . . . . 15 Description of Instruction . . . . . . . . . . . . . . . . 15 ELECTRICAL CHARACTERISTICS . . . Absolute Maximum Ratings . . . . . Electrical Characteristics . . . . . . Timing Characteristics . . . . . . . . Power Conditions for Internal Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 19 19 19 20 LCD UNIT USAGE INSTRUCTIONS . . . Interface with External Microprocessor Contrast Control Voltage . . . . . . . Sample Instruction Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 21 24 24 HANDLING INSTRUCTIONS . . . . . . . . . . . . . . . . 28 OPERATING RESTRICTIONS Display Unit User's Manual . . . . . . . . . . . . . . . 29 1 Dot-Matrix LCD Units PREFACE The LCD unit provides the user with a dot-matrix display panel featuring simple interface circuitry. The Sharp dot-matrix LCD units, with built-in controllers, operate under the control of a 4-bit or 8-bit microcomputer to display alphanumeric characters, symbols, etc. Table 1. Dot-Matrix LCD Unit with Built-In Controllers 180%(5 2) ',63/$< &+$5$&7(56 )250$7 02'(/ 12 2 /0;;; x x GRWV /0;;; x x GRWV /0;;; x x GRWV /0;;; x x GRWV Display Unit User's Manual Dot-Matrix LCD Units FEATURES OVERVIEW * Interface with either 4-bit or 8-bit microprocessor. The LCD unit receives character codes (8 bits per character) from a microprocessor or microcomputer, latches the codes to its display data RAM (80-byte DD RAM for storing 80 characters), transforms each character code into a 5 x 7 dot-matrix character pattern, and displays the characters on its LCD screen. * Display data RAM * 80 x 8 bits (80 characters). * Character generator ROM * 160 different 5 x 7 dot-matrix character patterns. * Character generator RAM * 8 different user programmed 5 x 7 dot-matrix patterns. * Display data RAM and character generator RAM may be accessed by the microprocessor. * Numerous instructions * Clear Display, Cursor Home, Display ON/OFF, Cursor ON/OFF, Blink Character, Cursor Shift, Display Shift. * Built-in reset circuit is triggered at power ON. * Built-in oscillator. Display Unit User's Manual The LCD unit incorporates a character generator ROM which produces 160 different 5 x 7 dot-matrix character patterns. The unit also provides a character generator RAM (64 bytes) through which the user may define up to eight additional 5 x 7 dot-matrix character patterns, as required by the application. To display a character, positional data is sent via the data bus from the microprocessor to the LCD unit, where it is written into the instruction register. A character code is then sent and written into the data register. The LCD unit displays the corresponding character pattern in the specified position. The LCD unit can either increment or decrement the display position automatically after each character entry, so that only successive characters codes need to be entered to display a continuous character string. The display/cursor shift instruction allows the entry of characters in either the left-to-right or rightto-left direction. Since the display data RAM (DD RAM) and the character generator RAM (CG RAM) many be accessed by the microprocessor, unused portions of each RAM may be used as general purpose data areas. The LCD unit may be operated with either dual 4-bit or single 8-bit data transers, to accommodate interfaces with both 4-bit and 8-bit microprocessors. The low power feature of the LCD unit will be further appreciated when combined with a CMOS microprocessor. 3 Dot-Matrix LCD Units HARDWARE Interface Signals Table 2. Interface Signals 6,*1$/ 1$0( ,1387287387 56 ,QSXW (;7(51$/ )81&7,21 &211(&7,21 038 5HJLVWHU VHOHFW VLJQDO ,QVWUXFWLRQ UHJLVWHU ZKHQ ZULWLQJ %XV\ IODJ DQG DGGUHVV FRXQWHU ZKHQ UHDGLQJ 'DWD UHJLVWHU ZKHQ ZULWLQJ DQG UHDGLQJ 5: ,QSXW 038 5HDGZULWH VHOHFW VLJQDO :ULWLQJ 5HDGLQJ ( ,QSXW 038 2SHUDWLRQ GDWD UHDGZULWH HQDEOH VLJQDO '% '% ,QSXW2XWSXW 038 +LJKRUGHU OLQHV RI GDWD EXV ZLWK WKUHHVWDWH ELGLUFWLRQDO IXQFWLRQ IRU XVH LQ GDWD WUDQVDFWLRQV ZLWK WKH 038 '% PD\ DOVR EH XVHG WR FKHFN WKH EXV\ IODJ '% '% ,QSXW2XWSXW 038 /RZRUGHU OLQHV RI GDWD EXV ZLWK WKUHHVWDWH ELGLUHFWLRQDO IXQFWLRQ IRU XVH LQ GDWD WUDQVDFWLRQV ZLWK WKH 038 7KHVH OLQHV DUH QRW XVHG ZKHQ LQWHUIDFLQJ ZLWK D ELW PLFURSURFHVVRU 9'' 966 3RZHU 6XSSO\ 9'' 9 966 *1' 9 3RZHU 6XSSO\ &RQWUDVW DGMXVWPHQW YROWDJH Functional Blocks Registers The LCD unit has two 8-bit registers - an instruction register (IR) and a data register (DR). The instruction register stores instruction codes such as "clear display" or "shift cursor", and also stores address information for the display data RAM and character generator RAM. The IR can be accessed by the microprocessor only for writing. The data register is used for temporarily storing data during data transactions with the microprocessor. When writing data to the LCD unit, the data is initially stored in the data register, and is then automatically written into either the display data RAM or character generator RAM, as determined by the current operation. The data register is also used as a temporary storage area when reading data from the display data RAM or character generator RAM. When address information is written into the instruction register, the corresponding data from the display data RAM or character generator RAM is moved to the data register. Data transfer is completed when the microprocessor reads the contents of the data register by the next instruction. After the transfer is completed, data from the next address position of the appropriate RAM is moved to the data register, in preparation for subsequent reading operations by the microprocessor. One of the two registers is selected by the register select (RS) signal. Table 3. Register Selection 4 56 5: 23(5$7,21 :ULWH WR LQVWUXFWLRQ UHJLVWHU DQG H[HFXWH LQWHUQDO RSHUDWLRQ FOHDU GLVSOD\ HWF 5HDG EXV\ IODJ '% DQG DGGUHVV FRXQWHU '% '% :ULWH WR GDWD UHJLVWHU DQG H[HFXWH LQWHUQDO RSHUDWLRQ '5 5HDG GDWD UHJLVWHU DQG H[HFXWH LQWHUQDO RSHUDWLRQ '' 5$0 '' 5$0 RU '5 &* 5$0 '5 RU &* 5$0 '5 Display Unit User's Manual Dot-Matrix LCD Units a. Address type a . . . .For dual-line display Busy Flag (BF) When the busy flag is set at a logical "1", the LCD unit is executing an internal operation, and no instruction will be accepted. The state of the busy flag is output on data line DB7 in response to the register selection signals RS = 0, R/W = 1 as shown in Table 3. The next instruction may be entered after the busy flag is reset to logical "0". Digit 1 2 3 4 5 6 7 8 9 Display Position 39 40 Line 1 00H 01H 02H 03H 04H 05H 06H 07H 08H Line 2 40H 41H 42H 43H 44H 45H 46H 47H 48H After data has been written to or read from the display data RAM or character generator RAM, the address counter is automatically incremented or decremented by one. The contents of the address counter are output on data lines DB0 - DB6 in response to the register selection signals RS = 0, R/W = 1 as shown in Table 3. Display Data RAM (DD RAM) This 80 x 8 bit RAM stores up to 80 8-bit character codes as display data. The unused area of the RAM may be used by the microprocessor as a general purpose RAM area. The display data RAM address, set in the address counter, is expressed in hexadecimal (HEX) numbers as follows: High-order Bits Lower-order Bits AC AC6 AC5 AC4 AC3 AC2 AC1 AC0 HEX Digit HEX Digit Example: DD RAM address '4E' 1 0 0 1 4 1 1 0 E The address of the display data RAM corresponds to the display position on the LCD panel as follows: Display Unit User's Manual 26H 27H 66H 67H DD RAM Address (HEX) When a display shift takes place, the addresses shift is as follows: Address Counter (AC) The address counter generates the address for the display data RAM and character generator RAM. When the address set instruction is written into the instruction register, the address information is sent to the address counter. The same instruciton also determines which of the two RAM's is to be selected. ... ... Left 01H 02H 03H 04H 05H 06H 07H 08H 09H Shift 41 42 43 44 45 46 47 48 49 H H H H H H H H H ... ... Right 27H 00H 01H 02H 03H 04H 05H 06H 07H Shift 67 40 41 42 43 44 45 46 47 H H H H H H H H H ... ... 27H 00H 67H 40H 25H 26H 65H 66H The addresses for the second line are not continuous to the addresses for the first line. A 40-character RAM area is assigned to each of the two line as follows: line 1: 00H - 27H line 2: 40H - 67H For an LCD unit with a display capacity of less than 40 characters per line, characters equal in number to the display capacity, as counted from display position 1, are displayed. b. Address type b . . . .For single-line display with logically dual-line addressing Digit Display Position 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Line 00 01 02 03 04 05 06 07 40 41 42 43 44 45 46 H H H H H H H H H H H H H H H 47H 1 DD RAM Address (HEX) When a display shift takes place, the addresses shift as follows: Left 01 02 03 04 05 06 07 08 41 42 43 44 45 46 47 48 Shift H H H H H H H H H H H H H H H H Right 27 00 01 02 03 04 05 06 67 40 41 42 43 44 45 46 H H H H H H H H H H H H H H H H Shift The right-hand eight characters, for the purposes of addressing and shifting, may be considered to constitute a second display line. For the address type of each model, see Table 12. 5 Dot-Matrix LCD Units AC6 AC5AC4 AC3 AC2 AC1 AC0 Character Generator ROM (CG ROM) This ROM generates a 5 x 7 dot-matrix character pattern for each of 160 different 8-bit character codes. The correspondence between character codes and character patterns is shown in Tables 4 and 5. Inquiries are invited for units with custom character patterns. AC 0 For the relationship among the CG RAM address, the display data, and the displayed pattern, see Table 6. As shown in Table 6., the unused portion of the CG RAM may be used as a general purpose RAM area. Timing Generator The timing generator produces timing signals used for the internal operation of the display data RAM, character generator ROM,and character generator RAM. Timing in controlled so that read-out of the RAM for display and access to the RAM by the external microprocessor do not interfere. Display flicker when data is written to the display data RAM is eliminated. Cursor/Blink Controller This circuit can be used to generate a cursor or blink a character in the display position indicated by the DD RAM address, which is set in the address counter (AC). The following example shows the cursor position when the address counter contains "08" (HEX). 0 1 0 0 0 Display Position Digit 1 2 3 4 5 6 7 8 9 10 11 Single-Line 00 01 02 03 04 05 06 07 08 09 0A Display DD RAM Address (HEX) Cursor Position Digit Character Generator RAM (CG RAM) This RAM stores eight arbitrary 5 x 7 dot-matrix character patterns, as programmed by the user. For displaying a character pattern stored in the CG RAM, a character code corresponding to the leftmost column in Tables 4 and 5 is written into the display data RAM. 0 Dual-Line Display 1 2 3 4 5 6 7 Display Position 8 9 10 11 Line 1 00 01 02 03 04 05 06 07 08 09 0A Line 2 40 41 42 43 44 45 46 47 48 49 4A DD RAM Address (HEX) Cursor Position NOTE: The address counter has the dual function of containing either a DD RAM address or a CG RAM address. The cursor/blink controller does not distinguish between these two functions, and thus, when activated, it always considers the address counter to contain a DD RAM address. To avoid spurious cursor/blink effects, the cursor/blink function should be turned off while the microprocessor writes to or reads from the CG RAM. Parallel-to-Serial Converter This circuit converts parallel data read from the CG ROM or CG RAM to serial data for use by the display driver. Bias Voltage Generator This circuit provides the bias voltage level required for driving the liquid crystal display. Some models incorporate a temperature compensation circuit which generates a temperature dependent bias voltage in order to provide constant display contrast at all ambient temperature levels. LCD Driver This circuit receives display data, timing signals, and bias voltage, and produces the common and segment display signals. LCD Panel This is a dot-matix liquid crystal display panel arranged in either 1 row of 16 characters, 2 rows of 16 characters, 2 rows of 20 characters, or 2 rows of 40 characters. 6 Display Unit User's Manual Dot-Matrix LCD Units EL backlight LED backlight EL Inverter (See note 2) Display Data Signals LCD Panel Scanning Signals VLED VLSS Segment Electrode Drive Circuit 4 3 Common Electrode Drive Circuit 4 3 3 7 7 Timing Generator Cursor/Blink Controller 7 7 Character Generator ROM (CG ROM) 7,200 bits 8 Display Data RAM (DD RAM) 80 x 8 bits 7 Address Counter (AC) 5V 8 5 8 5 7 7 8 Instruction Decoder Parallel-to-Serial Converter 6 Character Generator ROM (CG ROM) 512 bits 7 8 Data Register (DR) Instruction Register (/R) 8 Busy Flag (BF) 8 Bias Voltage Generator (See Note 1) I/O Buffer 4 RS R/W E 4 VDD VO VSS DB4 - DB7 DB0 - DB3 NOTES: 1. LM16152 incorporates a temperature compensation circuit within the bias voltage generator. See table 12. 2. For the inverters of EL backlights, please contact your representative. LCD27-6 Figure 1. Functional Block Diagram Display Unit User's Manual 7 Dot-Matrix LCD Units Table 4. Character Codes HIGH-ORDER 4 BIT LOWORDER 4 BIT xxxx0000 xxxx0001 xxxx0010 xxxx0011 xxxx0100 xxx0101 xxx0110 xxxx0111 xxxx1000 xxxx1001 xxxx1010 xxxx1011 xxxx1100 0000 0010 0011 0100 0101 0110 0111 1010 1011 1100 1101 1110 1111 CG RAM (1) (2) (3) (4) (5) (6) (7) (8) (1) (2) (3) (4) (5) xxxx1101 (6) xxxx1110 (7) xxxx1111 (8) NOTES: 1. The CG RAM generates character patterns in accordance with the user's program. 2. Shaded areas indicate 5 x 10 dot character patterns. 8 Display Unit User's Manual Dot-Matrix LCD Units Table 5. Character Codes High-Order 4 bit 0000 0010 0011 0100 0101 0110 0111 1010 1011 1100 1101 1110 1111 LowOrder 4 bit x x x x0 0 0 0 CG RAM (1) x x x x0 0 0 1 (2) x x x x0 0 1 0 0 @ P \ p p ! 1 A Q a q a q (3) " 2 B R b r x x x x0 0 1 1 (4) # 3 C S c s x x x x0 1 0 0 (5) $ 4 D T d t x x x x0 1 0 1 (6) % 5 E U e u u x x x x0 1 1 0 (7) & 6 F V f v x x x x0 1 1 1 (8) ' 7 G W g w x x x x1 0 0 0 (1) ( 8 H X h x x x x x x1 0 0 1 (2) ) 9 I Y i y _1 y x x x x1 0 1 0 (3) * : J Z j z j x x x x1 0 1 1 (4) + ; K [ k { x x x x x1 1 0 0 (5) < L 1 | x x x x1 1 0 1 (6) - = M ] m } x x x x1 1 1 0 (7) . > N ^ n n x x x x1 1 1 1 (8) / ? O _ o o Display Unit User's Manual ' / 9 Dot-Matrix LCD Units Table 6. Relationship Among Character Code (DD RAM), CG RAM Address, and Character Pattern (CG RAM) Character Code (DD RAM Data) 7 6 5 4 3 2 1 0 High-order bit Low-order bit 5 4 3 2 1 0 0 0 0 0 * 0 0 1 7 6 5 4 3 2 1 0 High-order Low-order bit bit 0 0 0 0 0 0 0 * 0 0 0 Character Pattern (CG RAM Data) CG RAM Address High-order Low-order bit bit * * * 1 1 1 1 0 0 0 1 1 0 0 0 1 0 1 0 1 0 0 0 1 0 0 0 0 1 1 1 1 1 1 0 1 0 0 1 0 1 0 0 1 0 1 1 0 0 1 0 1 1 0 1 0 0 0 1 1 1 1 * * * 0 0 0 * * * 0 0 0 0 0 0 1 0 1 0 0 1 0 1 1 1 1 1 0 0 1 0 1 1 0 0 1 0 0 1 0 0 1 1 1 1 1 1 0 1 0 0 1 0 0 1 1 0 0 0 1 0 0 * * * 0 0 0 * * * * * * Cursor Position 1 0 0 0 1 0 0 1 1 1 1 Sample Character Pattern (1) Sample Character Pattern (2) 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 * 1 1 1 1 0 0 1 0 1 1 1 0 1 1 1 NOTES: 1. Character code bits 0 - 2 correspond to CG RAM address bits 3 - 5. Each of the 8 unique bit strings designates one of the 8 character patterns. 2. CG RAM address bits 0 - 2 designate the row position of each character pattern. The 8th row is the cursor position. CG RAM data in the 8th row is OR'ed with the display cursor. Any '1' bits in the 8th row will result in a displayed dot regardless of the cursor status (ON/OFF). Accordingly, if the cursor is to be used, CG RAM data for the 8th row should be set to '0'. 3. CG RAM data bits 0 - 4 correspond to the column position of each character pattern bit 4 corresponding to the left most column of the character pattern. CG RAM data bits 5 - 7 are not used for displaying character patterns, but may be used as a general purpose RAM area. 4. As shown in tables 4 and 5, character patterns in the CG RAM are accessed by character codes with bits 4 - 7 equal to '0'. For example, the character pattern 'R', shown in the first sample character pattern of the table, is selected by the character code '00' (HEX) or '08' (HEX), since bit 3 of the character code is a don't care" bit (i.e., can take either value, '00' or '1'). 5. CG RAM data '1' produces a dark dot, and data '0' produces a light dot in the corresponding position on the display panel. 6. * = Signifies a "don't care" bit LCD27-8 10 Display Unit User's Manual Dot-Matrix LCD Units Microprocessor Interface The LCD unit performs either dual 4-bit or single 8-bit data transers, allowing the user to interface with either a 4-bit or 8-bit microprocessor 4-Bit Microprocessor Interface. Data lines DB4 - DB7 are used for data transfers. Data transactions with the external microprocessor take place in two 4-bit data transfer operations. The high-order 4 bits (corresponding to DB4 - DB7 in an 8-bit transfer) are transferred first, followed by the low-order 4 bits (corresponding to DB0 - DB3 in an 8-bit transfer). The busy flag is to be checked on completion of the second 4-bit data transfer. Busy flag and address counter are output in two operations. 8-bit Microprocessor Interface Each 8-bit piece of data is transferred in a single operation using the entire data bus DB0 - DB7. RS R/W E DB7 IR7 IR3 BF AC3 DR7 DR3 DB6 IR6 IR2 AC6 AC2 DR6 DR2 DB5 IR5 IR1 AC5 AC1 DR5 DR1 DB4 IR4 IR0 AC4 AC0 DR4 DR0 Write to Instruction Register (IR) Read Busy Flag (BF) and Address Counter (AC) Read Data Register (DR) LCD27-9 Figure 2. 4-Bit Data Transfer Display Unit User's Manual 11 Dot-Matrix LCD Units Reset Function Initialization by Internal Reset Circuit The LCD unit has an internal reset circuit for implementing an automatic reset operation at power-on. During the initalization operation, the busy flag is set. The busy state lasts for 10 msec after VDD reaches 4.5 V. The following instructions are executed in initializing the LCD unit. 1. Clear Display 2. Function Set DL = 1 . . . . 8-bit data length for interface N = 0 . . . . Single-line display F = 0 . . . . 5 x 7 dot-matrix character font 12 3. Display ON/OFF Control D = 0 . . . .Display OFF C = 0 . . . .Cursor OFF B = 0 . . . .Blink function OFF 4. Entry Mode Set I/D = 1 . . . .Increment Mode S = 0 . . . .Display shift OFF CAUTION If the power conditions stated in Table 11, "Power conditions applicable when internal reset circuit is used," are not satisfied, then internal reset circuit will not operate properly and the LCD unit will not be initalized. In this case, the initialization procedure must be executed by the external microprocessor. Display Unit User's Manual Dot-Matrix LCD Units Initialization by Instructions If the power conditions for the normal operation of the internal reset circuit are not satisfied (see Table 11), then LCD unit must be initialized by executing a series of instructions. The procedure for this initialization process is as follows: Power ON Wait 15 ms or more after VDD reaches 4.5 V RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 1 1 * * * * Busy flag can't be checked before execution of this instruction Function Set (8-Bit Interface) Wait 4.1 ms or more RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 1 1 * * * * Busy flag can't be checked before execution of this instruction Function Set (8-Bit Interface) Wait 100 s or more RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 1 1 * * * * RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Busy flag can't be checked before execution of this instruction Function Set (8-Bit Interface) (a) Busy flag can be checked after the following instructions are completed. If the busy flag is not going to be checked, then a wait time longer than the total execution time of these instructions is required (See Table 7.) 0 0 0 0 1 1 N F * * Function Set 0 0 0 0 0 0 1 0 0 0 Display Off 0 0 0 0 0 0 0 0 0 1 Display Clear 0 0 0 0 0 0 0 1 I/D S Entry Mode Set 8-Bit Interface, Single/Dual Line Display, Display Font Caution: At this point, the display format an't be changed. End of Initialization LCD21-10 Figure 3. 8-Bit Interface Display Unit User's Manual 13 Dot-Matrix LCD Units 4-Bit Interface Power ON Wait 15 ms or more after VDD reaches 4.5 V RS R/W DB7 DB6 DB5 DB4 0 0 0 0 1 Busy flag can't be checked before execution of this instruction 1 Function Set (8-Bit Interface) Wait 4.1 ms or more Busy flag can't be checked before execution of this instruction RS R/W DB7 DB6 DB5 DB4 0 0 0 0 1 1 Function Set (8-Bit Interface) Wait 100 s or more Busy flag can't be checked before execution of this instruction RS R/W DB7 DB6 DB5 DB4 0 0 0 0 1 1 RS R/W DB7 DB6 DB5 DB4 0 0 0 0 1 0 0 0 0 0 1 0 Function Set (8-Bit Interface) (a) Busy flag can be checked after the following instructions are completed. If the busy flag is not going to be checked, then a wait time longer than the total execution time of these instructions is required (See Table 7.) I II 0 0 N F * * 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 O 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 I/D S III IV I Function Set (4-Bit Interface) This instruction signals the LCD unit to begin accepting and sending data in dual 4-bit transfers for all subsequent transfers for all subsequent transactions. This is the only 4-bit instruction recognized by the LCD unit. II Function Set III Display Off 4-Bit Interface, Single/Dual Line Display, Display Font Caution: At this point, the display format can't be changed. IV Display Clear V V Entry Mode Set End of Initialization LCD21-11 Figure 4. 4-Bit Interface 14 Display Unit User's Manual Dot-Matrix LCD Units INSTRUCTIONS General Information Description of Instruction When the LCD unit is controlled by an external microprocessor, the only registers which can be directly accessed by the microprocessor are the instruction register (IR) and data register (DR). Control information is buffered to allow the LCD unit to interface with various microprocessors and peripheral control devices with different operating speeds. The internal operation of the LCD unit is determined by the signals sent from the external microprocessor. These signals include the register select (RS) signal, the read/write (R/W) signal, and the data bus (DB0 - DB7) signals. Display Clear Table 7 lists the instructions available to the LCD unit, with their execution times. The instructions fall into the following four categories. 1. Instructions for setting LCD unit functions, such as display format and data length RS R/W DB7 CODE 0 0 0 DB0 0 0 0 0 0 0 1 The display data RAM is filled with the "space" code, 20H. The address counter is reset to zero. If the display has been shifted, the original position is restored. By execution of this instruction, the display goes off, and the cursor and character blink functions, if activated, are moved to the upper, leftmost display position. Display/Cursor Home RS R/W DB7 CODE 0 0 0 DB0 0 0 0 0 0 1 * NOTE: * = Don't Care 3. Instructions for transferring data to or from the internal RAM's The address counter is reset to zero. If the display has been shifted, the original position is restored. The content of the DD RAM is not affected. The cursor and character blink functions, if activated, are moved to the upper, leftmost display position. 4. Other instructions Entry Mode Set 2. Instructions for addressing the internal RAM's In normal operation, instructions from category (3) are used most frequently. The internal RAM address may be incremented or decremented automatically after each data transaction, to reduce the programming requirements of the microprocessor. The display may also be shifted automatically after each display data write (see Sample Instruction Procedures section for examples). These features facilitate the construction of efficient systems. During the internal execution of an instruction, no instruction other than the "busy flag/address counter read" instruction will be accepted. During internal operation the busy flag is set to "1". It is necessary for the microprocessor to check that the busy flag is reset to "0" before sending the next instruction. NOTE Either the microprocessor must check that the busy flag is not set to "1" before sending each instruction, or the interval waited before sending each instruction must be made sufficiently longer than the execution time of the previous instruction. For the execution time of each instruction, see Table 7. Display Unit User's Manual RS R/W DB7 CODE 0 0 0 DB0 0 0 0 0 0 I/D S I/D: The address counter is incremented (I/D = 1) or decremented (I/D = 0) by one, following the reading or writing of each display data RAM character code. The cursor and character blink functions move one display position to the right (I/D = 1) or left (I/D = 0). The same operation takes place when data is written to or read from the character generator RAM. S: When S = 1, the entire display is shifted one position to the left (I/D = 1) or right (I/D = 0) following the writing of a display data RAM character code. The cursor and character blink functions do not move relative to the display position. When S = 0, the display is not shifted. The display is not shifted when writing data to the character generator RAM. 15 Dot-Matrix LCD Units Display ON/OFF RS R/W DB7 CODE 0 0 DB0 0 0 0 0 1 D C B D: When D = 1, the display is turned on. When D = 0, the display is turned off with the display data retained in the display data RAM. C: When C = 1, the cursor is displayed in the position specified by the address counter. When C = 0, the cursor is not displayed. The cursor is made up of five dots displayed across the 8th display row, below the 5 x 7 dot-matrix character block. For 5 x 10 dot-matrix character blocks, 5 dots are displayed across the 11th row. B: When B = 1, the character at the cursor position blinks on and off. When this function is activated, at fcp or fosc = 250 kHz, alternating between all dots black, and the display character, the character is alternately displayed for 409.6 ms and blanked for 409.6 ms. The cursor may be used simultaneously with the character blink function. (Blink frequency varies in proportion to the reciprocal of fCP or fOSC. 409.6 x 250/270 = 379.2 ms; fCP = 270 kHz.) The display and/or cursor are shifted to the right or left. For two-line displays, the cursor moves from the 40th position of the top line to the first position of the second line. From the 40th position of the second line, the cursor does not move back to the home position, but rather to the first position of the second line. 6& 5/ $& 6KLIW WKH FXUVRU WR WKH ULJKW $& $& 6KLIW WKH HQWLUH GLVSOD\ ZLWK WKH FXUVRU WR WKH OHIW 6KLIW WKH HQWLUH GLVSOD\ ZLWK WKH FXUVRU WR WKH ULJKW 6KLIW WKH FXUVRU WR WKH OHIW $& NOTE: When the display is shifted, the address counter is not affected. Function Set RS R/W DB7 CODE 0 0 0 DB0 0 1 DL N 0 * * NOTE: * = Don't Care DL: Selects the interface data length. When DL = 1, 8-bit data transfers are used. When DL = 0, 4-bit data transfers are used. NOTE When using a 4-bit data length, two transfer operations are needed to transfer a complete data word to or from the external micoprocessor. N: Selects display format (single or dual line). See Table 12 for the correct input value for each model. CAUTION Cursor Character Font Character Font 5 x 7 dot 5 x 10 dot (A) Cursor Function (B) Character Blink Function LCD27-16 The function set instruction must be executed at the beginning of the microprocessor program, before all other instructions except the busy flag/address counter read instruction. The function set instruction cannot be executed again except to change the interface data length. Once set, the display format cannot be changed. Display/Cursor Shift RS R/W DB7 CODE 0 0 0 DB0 0 0 1 S/C R/L * * NOTE: * = Don't Care 16 Display Unit User's Manual Dot-Matrix LCD Units CG RAM Address Set CG RAM/DD RAM Data Write RS R/W DB7 CODE 0 0 0 DB0 1 A A A A A A The address counter is loaded with a character generator RAM address, expressed as a 6-digit binary number. Following the execution of this instruction, subsequent data transactions will be between the external microprocessor and the character generator RAM. DD RAM Address Set RS R/W DB7 CODE 0 0 1 DB0 A A A A A A A The address counter is loaded with a display data RAM address, expressed as a 7-digit binary number. Following the execution of this instruction, subsequent data transactions will be between the external microprocessor and the display data RAM. For N = 0 (single line display), the binary number, ADD may have a value ranging from 00H to 4FH. For N = 1 (dual line display), the binary number, ADD, may have a value ranging from 00H to 27H for the first line, or 40H to 67H for the second line. Busy Flag/Address Counter Read RS R/W DB7 CODE 0 1 BF A DB0 A A A A A A1 The busy flag (BF) is read out, and indicates whether or not the LCD unit is still executing the previous instruction. BF = 1 indicates the busy state (internal operation), and the next instruction will not be accepted until BF = 0. This instruction also reads out the contents of the address counter, expressed as a 7-digit binary number. The address counter is used for accessing both the character generator RAM and the display data RAM. On read-out, the address counter will contain either a character generator RAM address or a display data RAM address, as determined by the most recently executed address set instruction. RS R/W DB7 CODE 1 0 D DB0 D D D D D D D An 8-bit data word is written into either the character generator RAM or display data RAM, as determined by the most recently executed address set instruciton. The data is written into the RAM location specified by the address counter. After the data is written into the RAM, the address counter is either incremented or decremented by one, as determined by the current entry mode. A display shift may also take place after the data is written. CG RAM/DD RAM Data Read RS R/W DB7 CODE 1 1 D DB0 D D D D D D D An 8-bit data word is read from either the character generator RAM or display data RAM, as determined by a previously executed address set instruction. The data is read from the RAM location specified by the address counter. This instruction must be immediately preceded by the CG RAM address set instruction, the DD RAM address set instruction, the cursor shift instruction, or a previous CG RAM/DD RAM data read instruction. Any other preceding instruction will cause invalid data to be read. The address set instructions cause the address counter to be loaded with a valid data read address. The cursor shift command allows selected DD RAM data to be read without the necessity of resetting the DD RAM address. Following the cursor shift instruction, the CG RAM/DD RAM data read instruction will read data from the DD RAM. After the execution of each data read instruction, the address counter is either incremented or decremented by one, as determined by the current entry mode. It is not necessary to reset the RAM address before the execution of subsequent data read instructions if the same RAM is to be read. The display is not shifted by the data read instruction. NOTE After the execution of the CG RAM/DD RAM data write instruction, the address counter is incremented or decremented automatically. However, the contents of the RAM location specified by the address counter cannot be read by a subsequent CG RAM/DD RAM data read instruction. The correct procedure for reading data from the CG RAM or DD RAM is to execute an address set or cursor shift instruction. Once a data read instruction has been executed, successive data read instructions may be executed, with no requirement for intervening instructions. Display Unit User's Manual 17 Dot-Matrix LCD Units Table 7. Instruction Set &2'( ,16758&7,21 (;(&87,21 7,0( PD[ )81&7,21 56 5: '% '% '% '% '% '% '% '% 'LVSOD\ &OHDU I &OHDU HQWHU GLVSOD\ DUHD UHVWRUH GLVSOD\ IURP &3 RU I26& N+] PV VKLIW DQG ORDG DGGUHVV FRXQWHU ZLWK '' 5$0 DGGUHVV + 'LVSOD\&XUVRU +RPH 5HVWRUH GLVSOD\ IURP VKLIW DQG ORDG DGGUHVV PV FRXQWHU ZLWK '' 5$0 DGGUHVV + (QWU\ 0RGH ,' 6 6HW 6SHFLI\ FXUVRU DGYDQFH GLUHFWLRQ DQG GLVSOD\ V V VKLIW PRGH 7KLV RSHUDWLRQ WDNHV SODFH DIWHU HDFK GDWD WUDQVIHU 'LVSOD\ 212)) ' & % 6SHFLI\ DFWLYDWLRQ RI GLVSOD\ ' FXUVRU & DQG EOLQNLQJ RI FKDUDFWHU DW FXUVRU SRVLWLRQ % 'LVSOD\&XUVRU 6& 5/ 6KLIW GLVSOD\ RU PRYH FXUVRU V '/ 1 6HW LQWHUIDFH GDWD OHQJWK '/ DQG QXPEHU RI V V V 6KLIW )XQFWLRQ 6HW GLVSOD\ OLQHV 1 &* 5$0 $&* $GGUHVV 6HW /RDG WKH DGGUHVV FRXQWHU ZLWK D &* 5$0 DGGUHVV 6XEVHTXHQW GDWD LV &* 5$0 GDWD '' 5$0 $'' /RDG WKH DGGUHVV FRXQWHU ZLWK D '' 5$0 DGGUHVV 6XEVHTXHQW GDWD LV '' 5$0 GDWD $GGUHVV 6HW %XV\ %) $& 5HDG EXV\ IODJ %) DQG FRQWHQWV RI DGGUHVV V FRXQWHU $& )ODJ$GGUHVV &RXQWHU 5HDG &* 5$0'' :ULWH GDWD :ULWH GDWD WR &* 5$0 RU '' 5$0 V 5HDG GDWD 5HDG GDWD IURP &* 5$0 RU '' 5$0 V 5$0 'DWD :ULWH &* 5$0'' 5$0 'DWD 5HDG ,' 6 ,QFUHPHQW ,' 'HFUHPHQW 6& 6KLIW 'LVSOD\ 6& 5/ 6KLIW 5LJKW 5/ '/ 1 %) %LW '/ 0RYH &XUVRU 6KLIW /HIW %LW 'XDO /LQH 1 '' 5$0 'LVSOD\ 'DWD 5$0 &* 5$0 &KDUDFWHU *HQHUDWRU 5$0 'LVSOD\ 6KLIW 2Q $&* &KDUDFWHU *HQHUDWRU 5$0 $GGUHVV $'' 'LVSOD\ 'DWD 5$0 $GGUHVV $& $GGUHVV &RXQWHU 6LQJOH /LQH ,QWHUQDO 2SHUDWLRQ %) 5HDG\ IRU ,QVWUXFWLRQ NOTES: 1. Symbol "*" signifies a "don't care" bit. 2. Correct input value for "N" is predetermined for each model (see Table 12). 18 Display Unit User's Manual Dot-Matrix LCD Units Table 8. ELECTRICAL CHARACTERISTICS Absolue Maximum Ratings 3$5$0(7(5 See the device specifications for each LCD unit model. 2XWSXW 9ROWDJH 6<0%2/ + 92+ / 92/ 7(67 &21',7,216 ,2+ ,2/ P$ P$ 0,1 0$; 81,7 9 9 Electrical Characteristics See the device specificiations for each LCD unit model. Some of the currently available specifications do not describe the test conditions for the high-level and low-level output voltages. These conditions are as follows: Timing Characteristics RS VIH VIL tAS tAH R/W VIL PWEH tAH tEf VIH E V IL tEr tDSW VIH DB0 - DB7 V IL tH VALID DATA tcycE LCD27-24 Figure 5. Write Operation Timing Diagram (For data sent from the external microprocessor to the LCD unit) Table 9. Write Operation Timing Characteristics (VDD = 5.0 5%, VSS = 0 V, TA = 0 ~ 50C) 9$/8( 3$5$0(7(5 6<0%2/ 81,7 0,1 (QDEOH &\FOH 7LPH (QDEOH 3XOVH :LGWK +LJK /HYHO (QDEOH 5LVH)DOO 7LPH 6HWXS 7LPH $GGUHVV +ROG 7LPH 'DWD 6HWXS 7LPH 'DWD +ROG 7LPH Display Unit User's Manual 56 5:( 0$; W&<&( 3:(+ W(U W(I W$6 W$+ W'6: W+ QV QV QV QV QV QV QV 19 Dot-Matrix LCD Units RS VIH VIL tAS tAH R/W VIH PWEH E tAH VIH VIL tEr tEf tDDR DB0 - DB7 tDHR VOH VOL VALID DATA tcycE LCD27-25 Figure 6. Read Operation Timing Diagram (For data sent from the LCD unit to the external microprocessor) Table 11. Power Conditions for Internal Reset Table 10. Read Operation Timing Characteristics (VDD = 5.0 5%, VSS = 0 V, Ta = 0 ~ 50C) 9$/8( 3$5$0(7(5 9$/8( 3$5$0(7(5 6<0%2/ (QDEOH 3XOVH :LGWK +LJK /HYHO (QDEOH 5LVH)DOO 7LPH WF\F( 3: (+ W(U W(I W$6 0$; 9ROWDJH %XLOG8S 7LPH QV QV W$+ 'DWD 'HOD\ 7LPH W''5 QV 'DWD +ROG 7LPH W2+5 QV $GGUHVV +ROG 7LPH 56 5:( 3RZHU2II 3HULRG WUFF W2)) 7<3 0$; PV PV QV 6HWXS 7LPH 81,7 0,1 81,7 0,1 (QDEOH &\FOH 7LPH 6<0%2/ QV QV If the above conditions are not satisfied, the internal reset circuit will not operate normally. In such a case, the LCD unit must be initialized by executing a series of instructions (see the Execution by Instructions section). 4.5 V 0.2 V 0.2 V 0.2 V VDD tOFF 1 ms 0.1 ms trCC 10 ms NOTE: * tOFF indicates Power-off Period. LCD27-26 Figure 7. 20 Display Unit User's Manual Dot-Matrix LCD Units LCD UNIT USAGE INSTRUCTIONS Interface with External Microprocessor 1. 8-bit Microprocessor RS R/W E OPERATING STATUS DB7 INTERNAL OPERATION READY FOR DATA DATA BUSY BUSY Write Instruction Check Busy Flag Check Busy Flag NOT BUSY DATA Check Busy Flag Write Instruction LCD27-27 Figure 8. 8-Bit Interface Timing (Example) a. Interface to 8-Bit Microprocessor via Peripheral Interface Adaptor (PIA). The following exemplifies the connection of the LCD unit to an 8-bit microprocessor chip through a PIA or I/0 port. The interface is TTL compatible. PB0 - PB7 of the interface device are connected to DB0 - DB7 of the LCD unit, and PA0 - PA2 are connected to E, R/W, and RS respectively. When the PIA is used, care must be taken to insure the proper relationship between the E signal and other signals when reading and writing data. MC6800 A15 CS2 A14 CS1 A13 CS0 A1 RS1 A0 RS0 R/W R/W VMA E 2 DB0 - DB7 MC6821 8 PA2 RS PA1 R/W PA0 E PB0 - PB7 8 LCD UNIT DB0 - DB7 D0 - D7 LCD27-28 Display Unit User's Manual 21 Dot-Matrix LCD Units b. Direct Connection to 8-Bit Microprocessor VMA 2 A15 MC6800 A0 E LCD UNIT RS R/W DB0 - DB7 R/W 8 D0 - D7 LCD27-29 c. Interface with MC6805 Microprocessor A0 - A7 8 DB0 - DB7 LCD UNIT MC6805 C0 E C1 RS C2 R/W LCD27-30 d. Interface with Z-80 Microprocessor D0 - D7 DB0 - DB7 A0 Z80 RS A4 A A5 B A6 C A7 G2 A Y1 LS138 1 K E 200PF LCD UNIT G2 B MI G IORQ RD R/W LCD27-31 22 Display Unit User's Manual Dot-Matrix LCD Units 2. 4-Bit Data Transfer with a Single-Line, 16-Character Display (Using Internal Reset). Table 14 shows a sample operating procedure for an LCD unit in this mode. After power has been turned on, the 8-bit data transfer mode is in effect, and the first write operation is assumed to be an 8-bit data transfer. Since the data lines DB0 - DB3 are not connected, this data is not accepted and must be written again (i.e. the function set instruction must be written twice). Subsequent data transfers are completed in two 4-bit transfer operations (see Table 14). RS R/W E OPERATING STATUS DB7 INTERNAL OPERATION IR7 IR3 Write Instruction BUSY READY FOR DATA NOT BUSY AC3 Check Busy Flag AC3 Check Busy Flag NOTE: IR7, IR3: Instruction bits 7 and 3. AC3: Address counter bit 3. D7 D3 Write Instruction LCD27-32 Figure 9. 4-Bit Interface Timing (Example) SM200 O1 RS O2 R/W O3 E P10 - P13 4 LCD UNIT DB4 - DB7 LCD27-33 Figure 10. Connection to SM200 Display Unit User's Manual 23 Dot-Matrix LCD Units 2. 4-Bit Microprocessor Contrast Control Voltage The LCD unit has three power terminals, VDD, VSS, and V0. A contrast control voltage is supplied to the terminal V0. The panel is driven by the voltage difference between VDD and VO (i.e., VDD - VO). Figure 11 shows an example of the contrast control voltage supply circuit, in which VR is adjusted to obtain the best display quality. +5 V VDD The LCD unit can be connected to the I/O port of a 4-bit microprocessor. If the I/O port is not limited, 8-bit data may be transferred between the devices. Otherwise, 4-bit split data may be transferred in two operations, after selecting the 4-bit data length function. For the timing waveform, see Figure 9. Figure 10 shows a sample connection to an SM-200 microprocessor. It should be noted that the busy flag check requires a two-step operation. 3. 8-Bit Data Transfer with a Dual-Line, 16-Character Display (Using Internal Reset). LCD UNIT VSS VR VO 5 K NOTE: Ground (S type: -5 V) (Depends on particular LCD unit model-refer to device specifications) LCD27-34 Figure 11. Contrast Adjustment Circuit Sample Instruction Procedures 1. 8-Bit Data Transfer with a Single-Line, 16-Character Display (Using Internal Reset). Table 13 shows a sample operating procedure for an LCD unit in this mode. Initially, the function of the LCD unit must be selected by executing the function set instruction. Up to 80 characters may be stored in the display data RAM, and may be displayed by using the display shift operation. The contents of the display data RAM are not affected by the display shift operation, and the display/cursor home instruction enables the restoration of the initial display position. 24 Table 15 shows a sample operating procedure for an LCD unit in this mode. The cursor is automatically moved from the first line to the second line after column 40 of the first line has been written. In the example (Table 15), where only 16 characters are displayed on each line, the display data RAM address must be reset after the 16th character has been written. When a display shift is executed, both lines are shifted simultaneously. When the diplay shift operation is repeated, characters on one line are not moved to the other line, but rather are looped back onto the same line. NOTE To use the internal reset function, the power conditions must be satisfied. Otherwise, the LCD unit must be initialized by the execution of a series of instructions, as shown in the Initialization by Instructions section. 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Operate the LCD unit within the allowable ranges of temperature and power supply voltage. Avoid operating the LCD unit in high humidity. Avoid operating the LCD unit for extended periods under direct sunlight. 2. Mechanical shock and pressure on the glass LCD panel should be avoided. Care must be taken to insure that no torsional or compressive forces are applied to the LCD unit when it is mounted. If leakage of the liquid crystal material should occur, all contact with the material, particularly accidental ingestion, must be avoided. If the body or clothing become contaminated by the liquid crystal material, wash thoroughly with water and soap. b. An acrylic sheet, or the like, may be used to protect the LCD panel. A spacing of 0.5 mm to 1.0 mm should be used between the protective plate and the LCD panel. (See Figure 13.) To prevent stress on the LCD panel, the unit should be mounted with a nominal height accuracy of 0.1 mm. c. An anti-glare (anti-reflection) sheet may be used in place of the protective acrylic sheet. The mounting considerations will be the same. (A) Inside Mount LCD UNIT 3. The reflector and polarizers attached to the LCD unit are made of soft materials. Care must be taken not to scratch these materials. To clean the display, use a soft, dry cloth. Do not use organic solvents or water. If dirt can not be removed by this method, a small amount of petroleum benzine may be used. 4. The LCD unit uses CMOS LSI's. Precautions must be taken to protect the unit from electrostatic charges. 5. Do not apply the power supply voltages to the LCD unit while the input signal terminals are open. Also, it is better if the input signal and LCD unit power supply voltages are switched on and off simultaneously. 6. The LCD unit should be stored in its original packing case at a temperature of 0 to 35C and at a relative humidity of 60% or less. The LCD unit should be stored in a dark place, not exposed to direct sunlight or fluorescent lamps. (B) Outside Mount LCD UNIT LCD27-35 Figure 12. Mounting Diagrams Transparent Protective Sheet 0.5 - 1.0 mm Spacing LCD UNIT Mounting Frame LCD27-36 Figure 13. Sample Design 7. The following precautions should be taken when mounting the LCD unit. a. The LCD unit may be mounted on either the inside or outside of a cabinet, as shown in Figure 12. To determine the optimum mounting angle, refer to the viewing angle range in the device specification for each model. 28 Display Unit User's Manual Dot-Matrix LCD Units OPERATING RESTRICTIONS To counteract these defects. The following restrictions should be followed (Table 16). The LSI (HD44780AXX) used in the LCD units is reported to have the following defects: In the production facility, the LSI device in question is now being replaced with a modified version, HD44780RAXX. The above mentioned restrictions do not apply to products using the "RA" version of the LSI. The "RA" version devices have an "R" HD44780AXX Defective Functions 1. When the display clear or display/cursor home instruction is executed when the display has been shifted from its original position, original display position may not be restored. printed in the upper, right corner, as shown. 2. When the display/cursor home instruction is executed, the data in the following display data RAM locations may be lost. R HD44780A A. Address type a. Address HEX 00 01 02 03 04 05 06 07 ... ... 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F Total: 80 Characters The contents of addresses (43), (47), (4B), and (4F) may be destroyed. B. Address type b and c. Address HEX 00 01 02 03 04 05 06 07 ... . . . 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 Address HEX 40 41 42 43 44 45 46 47 ... . . . 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 Total: 40 Characters x 2 Lines NOTE: Although address type C is for a single-line display its address structure is logically the same as for address type b. The contents of address locations 23, 27, 63, and 67 may be lost during the execution of the display/cursor home instruction. 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Phone: (1) 360-834-2500 Fax: (1) 360-834-8903 Fast Info: (1) 800-833-9437 www.sharpsma.com SHARP Microelectronics Europe Division of Sharp Electronics (Europe) GmbH Sonninstrasse 3 20097 Hamburg, Germany Phone: (49) 40-2376-2286 Fax: (49) 40-2376-2232 www.sharpsme.com SHARP Corporation Electronic Components & Devices 22-22 Nagaike-cho, Abeno-Ku Osaka 545-8522, Japan Phone: (81) 6-6621-1221 Fax: (81) 6117-725300/6117-725301 www.sharp-world.com TAIWAN SINGAPORE KOREA SHARP Electronic Components (Taiwan) Corporation 8F-A, No. 16, Sec. 4, Nanking E. Rd. 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