Sample & Buy Product Folder Support & Community Tools & Software Technical Documents LP2983 SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 LP2983 Micropower 150-mA Voltage Regulator in SOT-23 Package for Output Voltages 1.2 VDesigned for Use With Very Low-ESR Output Capacitors 1 Features 3 Description * * * * * * * * * * * The LP2983 is a 150-mA, fixed-output voltage regulator designed to provide tight voltage regulation in applications with output voltages 1.2 V. 1 Operating Input Supply Voltage: 2.2 V to 16 V Output Current: 150 mA Low ZOUT: 0.3 Typical (10 Hz to 1 MHz) Stable with Low-ESR Output Capacitor Low Ground Pin Current at All Loads Output Voltage Accuracy 1% (A Grade) High Peak Current Capability Wide Supply Voltage Range (16 V Maximum) Overtemperature and Overcurrent Protection -40C to +125C Junction Temperature Range Requires Minimum External Components 2 Applications * * * * Cellular Phones Palmtop/Laptop Computers Personal Digital Assistants (PDA) Camcorders, Personal Stereos, Cameras Using an optimized vertically integrated PNP (VIP) process, the LP2983 delivers unequaled performance in all critical specifications: * Ground pin current: Typically 825 A at a 150-mA load, and 75 A at a 1-mA load. * Enhanced stability: The LP2983 is stable with output capacitor ESR down to zero, which allows the use of ceramic capacitors on the output. * Precision output: 1% tolerance output voltages available (A grade). * Smallest possible size: SOT-23 package uses absolute minimum board space. Device Information(1) PART NUMBER LP2983 PACKAGE SOT-23 (5) BODY SIZE (NOM) 2.90 mm x 1.60 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. space space space Typical Application VIN IN OUT VOUT GND ON/OFF ON/OFF ESR Copyright (c) 2016, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LP2983 SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 4 4 4 4 5 6 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description ............................................ 10 7.1 Overview ................................................................. 10 7.2 Functional Block Diagram ....................................... 10 7.3 Feature Description................................................. 10 7.4 Device Functional Modes........................................ 12 8 Application and Implementation ........................ 13 8.1 Application Information............................................ 13 8.2 Typical Application ................................................. 13 9 Power Supply Recommendations...................... 16 10 Layout................................................................... 17 10.1 Layout Guidelines ................................................. 17 10.2 Layout Example .................................................... 17 11 Device and Documentation Support ................. 18 11.1 11.2 11.3 11.4 11.5 Documentation Support ........................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 18 18 18 18 18 12 Mechanical, Packaging, and Orderable Information ........................................................... 18 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (April 2013) to Revision D Page * Added Pin Configuration and Functions section, ESD Ratings table and Thermal Information table with update thermal values, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section; change pin names VOUT and VIN to OUT and IN ................... 1 * Changed footnote 3 to Abs Max to replace out-of-date thetaJA temperature with general information ................................ 4 * Added Thermal Information table .......................................................................................................................................... 4 Changes from Revision B (April 2013) to Revision C * 2 Page Changed layout of National Data Sheet to TI format ........................................................................................................... 11 Submit Documentation Feedback Copyright (c) 2001-2016, Texas Instruments Incorporated Product Folder Links: LP2983 LP2983 www.ti.com SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 5 Pin Configuration and Functions DBV Package 5-Pin SOT-23 Top View Pin Functions PIN NUMBER 1 NAME IN TYPE Input 2 GND -- 3 ON/OFF Input 4 ESR -- 5 OUT Output DESCRIPTION Input voltage Common ground (device substrate) Logic high enable input Low side connection for low-ESR output capacitors Regulated output voltage Submit Documentation Feedback Copyright (c) 2001-2016, Texas Instruments Incorporated Product Folder Links: LP2983 3 LP2983 SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT -0.3 16 V Input supply voltage (operating) 2.3 16 V Shutdown input voltage (survival) -0.3 16 V Output voltage (survival) (2) -0.3 9 V Input supply voltage (survival) IOUT (survival) Short-circuit protected Input-output voltage (survival) (3) -0.3 16 V Operating junction temperature -40 125 C Power dissipation (4) Internally limited Storage temperature (1) (2) (3) (4) -65 150 C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. If used in a dual-supply system where the regulator load is returned to a negative supply, the LP2983 output must be diode-clamped to ground. The output PNP structure contains a diode between the IN and OUT pins that is normally reverse-biased. Reversing the polarity from VIN to VOUT turn on this diode (See Reverse Input-Output Voltage). The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, RJA, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated using P(MAX) = (TJ(MAX) - TA) / RJA. The value of RJA for the SOT-23 package varies depending on the application board -- the value given inThermal Information can be considered as the worstcase scenario. Exceeding the maximum allowable power dissipation causes excessive die temperature, and the regulator will go into thermal shutdown. 6.2 ESD Ratings VALUE Electrostatic discharge V(ESD) (1) Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (all pins except pin 3) (1) 2000 Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (pin 3) (1) 1000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT Operating junction temperature -40 125 C Input supply voltage (operating) 2.2 16 V 6.4 Thermal Information LP2983 THERMAL METRIC (1) DBV (SOT-23) UNIT 5 PINS RJA Junction-to-ambient thermal resistance, High-K (2) 169.0 C/W RJC(top) Junction-to-case (top) thermal resistance 121.8 C/W RJB Junction-to-board thermal resistance 29.5 C/W JT Junction-to-top characterization parameter 16.1 C/W JB Junction-to-board characterization parameter 29.0 C/W (1) (2) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. Thermal resistance value RJA is based on the EIA/JEDEC High-K printed circuit board defined by: JESD51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages. Submit Documentation Feedback Copyright (c) 2001-2016, Texas Instruments Incorporated Product Folder Links: LP2983 LP2983 www.ti.com SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 6.5 Electrical Characteristics Unless otherwise specified: TJ = 25C, VIN = VO(NOM) + 1 V, IL = 1 mA, COUT = 1 F, VON/OFF = 2 V. PARAMETER TEST CONDITIONS VO/VIN Output voltage tolerance Output voltage line regulation MIN MIN -1% 1% -1.5% 1.5% -2% 2% -2.5% 2.5 1 mA < IL < 50 mA -40C TJ 125C -2.5% 2.5% -3.5% 3.5% 1 mA < IL < 150 mA -2.5% 2.5% -3% 3% 1 mA < IL < 150 mA -40C TJ 125C -3.5% 3.5% -4% 4% VO(NOM) + 1 V VIN 16 V TYP 0.01 VO(NOM) + 1 V VIN 16 V -40C TJ 125C 65 IL = 0 mA, -40C TJ 125C 75 IL = 1 mA, -40C TJ 125C 120 IL = 10 mA, -40C TJ 125C 825 1200 IL = 150 mA, -40C TJ 125C VON/OFF < 0.05 V -40C TJ 125C Minimum VIN required to maintain output -40C TJ 125C regulation 220 400 500 825 1500 A 900 2000 12 6 12 0.2 2 0.2 2 2.2 1.4 Low = O/P OFF 1.6 0.1 V 0.1 0.05 0.01 VON/OFF = 0 V -40C TJ 125C VON/OFF = 5 V V 1.4 1.6 0.05 0.01 -2 5 VON/OFF = 5 V -40C TJ 125C (2) 110 300 2.2 VON/OFF = 0 V (1) 95 6 Low = O/P OFF -40C TJ 125C ON/OFF input current %/V 2.05 High = O/P ON High = O/P ON -40C TJ 125C 0.016 170 120 2000 VON/OFF < 0.15 V ION/OFF 75 220 500 UNIT 125 900 IL = 150 mA VON/OFF 65 110 300 IL = 50 mA, -40C TJ 125C ON/OFF input voltage (2) 95 400 IL = 50 mA MAX 0.032 170 IL = 10 mA VIN (min) 0.01 125 IL = 1 mA Ground pin current 0.016 TYP 0.032 IL = 0 mA IGND LP2981I-XX (1) MAX 1 mA < IL < 50 mA VO LP2981AI-XX (1) -2 A 5 15 15 Limits are 100% production tested at 25C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods. The limits are used to calculate Average Outgoing Quality Level (AOQL). The ON/OFF inputs must be properly driven to prevent misoperation. For details, see Operation With ON/OFF Control. Submit Documentation Feedback Copyright (c) 2001-2016, Texas Instruments Incorporated Product Folder Links: LP2983 5 LP2983 SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 www.ti.com Electrical Characteristics (continued) Unless otherwise specified: TJ = 25C, VIN = VO(NOM) + 1 V, IL = 1 mA, COUT = 1 F, VON/OFF = 2 V. PARAMETER Output noise voltage (RMS) en VO/VIN Ripple rejection TEST CONDITIONS MIN TYP LP2981I-XX (1) MAX MIN TYP MAX UNIT BW = 300 Hz to 50 kHz VOUT = 1.2 V, COUT = 10 F 60 60 V = 1 kHz, COUT = 2.2 F 65 65 dB (3) 400 400 mA 250 250 mA IO(MAX) Short-circuit current RL = 0 (steady state) IO(PK) Peak output current VOUT VO(NOM) - 5% (3) LP2981AI-XX (1) The LP2983 has foldback current limiting which allows a high peak current when VOUT > 0.5 V, and then reduces the maximum output current as VOUT is forced down to ground. See related curve(s) in Typical Characteristics section. 6.6 Typical Characteristics Unless otherwise specified: CIN = 1 F, COUT = 2.2 F, VIN = VOUT(NOM) + 1, TA = 25C, ON/OFF pin is tied to VIN. Figure 1. LP2983 Tempco Load = 0 mA Figure 2. Minimum Input Voltage vs Temperature Load = 1 mA Figure 3. Input Current vs VIN 6 Figure 4. Input Current vs VIN Submit Documentation Feedback Copyright (c) 2001-2016, Texas Instruments Incorporated Product Folder Links: LP2983 LP2983 www.ti.com SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 Typical Characteristics (continued) Unless otherwise specified: CIN = 1 F, COUT = 2.2 F, VIN = VOUT(NOM) + 1, TA = 25C, ON/OFF pin is tied to VIN. Load = 50 mA and 150 mA Figure 6. GND Pin vs Load Current Figure 5. Input Current vs VIN Load = 1 mA Figure 7. GND Pin vs Temperature and Load Load = 150 mA VIN = 1 V VIN = 1 V Figure 8. Line Transient Response Load = 1 mA Figure 9. Line Transient Response VIN = 13.8 V Figure 10. Line Transient Response Submit Documentation Feedback Copyright (c) 2001-2016, Texas Instruments Incorporated Product Folder Links: LP2983 7 LP2983 SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 www.ti.com Typical Characteristics (continued) Unless otherwise specified: CIN = 1 F, COUT = 2.2 F, VIN = VOUT(NOM) + 1, TA = 25C, ON/OFF pin is tied to VIN. Load = 150 mA VIN = 13.8 V Figure 11. Line Transient Response Figure 12. Noise Density COUT = 2.2 F Figure 14. Turnon Time Figure 13. Ripple Rejection VIN = 16 V Figure 15. Short-Circuit Current vs Temperature 8 Submit Documentation Feedback Figure 16. Short-Circuit Current Copyright (c) 2001-2016, Texas Instruments Incorporated Product Folder Links: LP2983 LP2983 www.ti.com SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 Typical Characteristics (continued) Unless otherwise specified: CIN = 1 F, COUT = 2.2 F, VIN = VOUT(NOM) + 1, TA = 25C, ON/OFF pin is tied to VIN. VIN = 2.8 V VIN = 6 V Figure 17. Short-Circuit Current Figure 18. Short-Circuit Current COUT = 4.7 F COUT = 2.2 F Figure 19. Load Transient Response Figure 20. Load Transient Response Submit Documentation Feedback Copyright (c) 2001-2016, Texas Instruments Incorporated Product Folder Links: LP2983 9 LP2983 SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 www.ti.com 7 Detailed Description 7.1 Overview The LP2983 is a voltage regulator with optimized vertically integrated PNP designed for use with very low ESR output capacitors, excellent for low noise applications that require a clean voltage supply. The LP2983 has a wide input voltage range (16 V maximum), high accuracy (A grade 1%), and a fixed output voltage supply capable of delivering 150 mA. In addition the LP2983 device provides the following features: * High accuracy output voltage * Low ground current, typically 825 A at 150-mA load and 75 A at 1-mA load * A sleep mode feature is available, allowing the regulator to consume only 1 A (typical) when the ON/OFF pin is pulled low. * Overtemperature protection and overcurrent protection circuitry designed to safeguard the device during unexpected conditions. * Thermal protection 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 High-Accuracy Output Voltage With special careful design to minimize all contributions to the output voltage error, the LP2983 distinguishes itself as a very high-accuracy output voltage micropower LDO. This includes a tight initial tolerance (typically 1.5% at 50 mA, 25C junction temperature; also available in A grade with an accuracy of 1% under the same conditions), extremely good line regulation (0.01%/V typical), and a very low output-voltage temperature coefficient, making the part an ideal low-power voltage reference. 7.3.2 Low Ground Current The LP2983 device uses a vertical PNP process which allows for quiescent currents that are considerably lower than those associated with traditional lateral PNP regulators, typically 825 A at 150-mA load and 75 A at 1-mA load. 10 Submit Documentation Feedback Copyright (c) 2001-2016, Texas Instruments Incorporated Product Folder Links: LP2983 LP2983 www.ti.com SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 Feature Description (continued) 7.3.3 Reverse Input-Output Voltage The internal PNP power transistor used as the pass element in the LP2983 has an inherent diode connected between the regulator output and input. During normal operation (where the input voltage is higher than the output) this diode is reverse biased (See Figure 21). LP2983 VIN VOUT PNP GND Copyright (c) 2016, Texas Instruments Incorporated Figure 21. LP2983 Reverse Current Path However, if the input voltage is more than a VBE below the output voltage, this diode turns ON and current flows into the regulator output. In such cases, a parasitic SCR can latch which allows a high current to flow into the VIN pin and out the ground pin, which can damage the part. The internal diode can also be turned on if the input voltage is abruptly stepped down to a voltage which is a VBE below the output voltage. In any application where the output voltage may be higher than the input voltage, an external Schottky diode must be connected from VIN to VOUT (cathode on VIN, anode on VOUT -- see Figure 22), to limit the reverse voltage across the LP2983 to 0.3 V (see Absolute Maximum Ratings). SCHOTTKY DIODE LP2983 VIN VOUT PNP GND Copyright (c) 2016, Texas Instruments Incorporated Figure 22. Adding External Schottky Diode Protection Submit Documentation Feedback Copyright (c) 2001-2016, Texas Instruments Incorporated Product Folder Links: LP2983 11 LP2983 SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 www.ti.com Feature Description (continued) 7.3.4 ON/OFF Input Operation The LP2983 is shut off by driving the ON/OFF input low, and turned on by pulling it high. If this feature is not to be used, the ON/OFF input must be tied to VIN to keep the regulator output on at all times. To assure proper operation, the signal source used to drive the ON/OFF input must be able to swing above and below the specified turnon or turnoff voltage thresholds listed in Typical Characteristics under VON/OFF. To prevent mis-operation, the turnon (and turnoff) voltage signals applied to the ON/OFF input must have a slew rate which is 40 mV/s. CAUTION The regulator output voltage can not be ensured if a slow-moving AC (or DC) signal is applied that is in the range between the specified turn-on and turn-off voltages listed under the electrical specification VON/OFF (see Electrical Characteristics). 7.3.5 Thermal Protection The LP2983 contains a thermal shutdown protection circuit to turn off the output current when excessive heat is dissipated in the LDO. The thermal time-constant of the semiconductor die is fairly short, and thus the output cycles on and off at a high rate when thermal shutdown is reached until the power dissipation is reduced. The internal protection circuitry of the LM2983 is designed to protect against thermal overload conditions. The circuitry is not intended to replace proper heat sinking. Continuously running the device into thermal shutdown degrades its reliability. 7.4 Device Functional Modes 7.4.1 Operation With VO(NOM) + 1 V VIN < 16 V The device operates if the input voltage is equal to, or exceeds, VOUT(TARGET) + 1 V. If the previous condition is not met, the device will not operate correctly, and the output voltage may not reach target value. 7.4.2 Operation With ON/OFF Control If the voltage on the ON/OFF pin is less than 0.1 V at room temperature and less than 0.05 V over the full operating temperature range, the device output is disabled, and the shutdown current (IGND) will not exceed 12 A. Raising ON/OFF above 1.4 V at room temperature and above 1.6 V over the full operating temperature range initiates the start-up sequence of the device. 12 Submit Documentation Feedback Copyright (c) 2001-2016, Texas Instruments Incorporated Product Folder Links: LP2983 LP2983 www.ti.com SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The LP2983 is a linear voltage regulator operating from 2.2 V to 16 V on the input and regulates voltages between 1.2 V with high accuracy and a 150-mA maximum output current. To achieve high efficiency, the dropout voltage (VIN - VOUT) must be as small as possible. Successfully implementing an LDO in an application depends on the application requirements. If the requirements are simply input voltage and output voltage, compliance specifications (such as internal power dissipation or stability) must be verified to ensure performance. 8.2 Typical Application VIN IN VOUT OUT 1 F GND 2.2 F ON/OFF* ON/OFF ESR Copyright (c) 2016, Texas Instruments Incorporated *ON/OFF input must be actively terminated. Tie to VIN if this function is not to be used. **Minimum capacitance is shown to ensure stability (may be increased without limit). A ceramic capacitor is required for output (see External Capacitors). Figure 23. LP2983 Typical Application 8.2.1 Design Requirements For typical voltage regulator applications, use the parameters listed in Table 1: Table 1. Design Parameters PARAMETER DESIGN REQUIREMENT Input voltage 2.2 V to 16 V Output voltage 1V or 1.2 V Output current 0 mA to 150 mA Output tolerance (1 mA IL 50 mA at 25C) 1.5% (1% with A-grade version) Submit Documentation Feedback Copyright (c) 2001-2016, Texas Instruments Incorporated Product Folder Links: LP2983 13 LP2983 SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 www.ti.com 8.2.2 Detailed Design Procedure 8.2.2.1 External Capacitors Like any low-dropout regulator, the LP2983 requires external capacitors for regulator stability. These capacitors must be correctly selected for good performance. 8.2.2.1.1 Input Capacitor An input capacitor whose capacitance is 1 F is required between the LP2983 input and ground (the amount of capacitance may be increased without limit). This capacitor must be located a distance of not more than 1 cm from the input pin and returned to a clean analog ground. Any good-quality ceramic, tantalum, or film capacitor may be used at the input. NOTE Tantalum capacitors can suffer catastrophic failure due to surge current when connected to a low-impedance source of power (like a battery or very large capacitor). If a tantalum capacitor is used at the input, it must be ensured by the manufacturer to have a surge current rating sufficient for the application. There are no requirements for ESR on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance is 1 F over the entire operating temperature range. 8.2.2.1.2 Output Capacitors The LP2983 is designed specifically to work with ceramic output capacitors, utilizing circuitry which allows the regulator to be stable across the entire range of output current with an output capacitor whose ESR is as low as 0 . The ceramic output capacitor must be connected between the OUT pin (device pin 5) and the ESR pin (device pin 4) (see Figure 24). Figure 24. Ceramic to ESR Pin (COUT = 2.2 F) The LP2983 requires a minimum of 2.2 F on the output (output capacitor size can be increased without limit). It is important to remember that capacitor tolerance and variation with temperature must be taken into consideration when selecting an output capacitor so that the minimum required amount of output capacitance is provided over the full operating temperature range. Note that ceramic capacitors can exhibit large changes in capacitance with temperature (see Capacitor Characteristics). The output capacitor must be located not more than 1 cm from the output pin and returned to a clean analog ground via the ESR pin. 14 Submit Documentation Feedback Copyright (c) 2001-2016, Texas Instruments Incorporated Product Folder Links: LP2983 LP2983 www.ti.com SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 8.2.2.2 Capacitor Characteristics The LP2983 was designed to work with ceramic capacitors on the output to take advantage of the benefits they offer: for capacitance values in the 2.2-F to 4.7-F range, ceramics are the least expensive and also have the lowest ESR values (which makes them best for eliminating high-frequency noise). One disadvantage of ceramic capacitors is that their capacitance can vary with temperature. Most large value ceramic capacitors ( 2.2 F) are manufactured with the Z5U or Y5V temperature characteristic, which results in the capacitance dropping by more than 50% as the temperature goes from 25C to 85C. This could cause problems if a 2.2-F capacitor were used on the output since it will drop down to approximately 1 F at high ambient temperatures (which could cause the LP2983 to oscillate). If Z5U or Y5V capacitors are used on the output, a minimum capacitance value of 4.7 F must be observed. A better choice for temperature coefficient in ceramic capacitors is X7R, which holds the capacitance within 15%. Unfortunately, the larger values of capacitance are not offered by all manufacturers in the X7R dielectric. 8.2.2.3 Power Dissipation Knowing the device power dissipation and proper sizing of the thermal plane connected to the tab or pad is critical to ensuring reliable operation. Device power dissipation depends on input voltage, output voltage, and load conditions and can be calculated with Equation 1. PD(MAX) = (VIN(MAX) - VOUT) x IOUT (1) Power dissipation can be minimized, and greater efficiency can be achieved, by using the lowest available voltage drop option that would still be greater than the dropout voltage (VDO). However, keep in mind that higher voltage drops result in better dynamic (that is, PSRR and transient) performance. On the SOT-23 (DBV) package, the primary conduction path for heat is through the pins to the PCB. The maximum allowable junction temperature (TJ(MAX))determines maximum power dissipation allowed (PD(MAX)) for the device package. Power dissipation and junction temperature are most often related by the junction-to-ambient thermal resistance (RJA) of the combined PCB and device package and the temperature of the ambient air (TA), according to Equation 2 or Equation 3: TJ(MAX) = TA(MAX) + (RJA x PD(MAX)) PD = TJ(MAX) - TA(MAX) / RJA (2) (3) Unfortunately, this RJA is highly dependent on the heat-spreading capability of the particular PCB design, and therefore varies according to the total copper area, copper weight, and location of the planes. The RJA recorded in Thermal Information is determined by the specific EIA/JEDEC JESD51-7 standard for PCB and copperspreading area, and is to be used only as a relative measure of package thermal performance. For a welldesigned thermal layout, RJA is actually the sum of the package junction-to-case (bottom) thermal resistance (RJCbot) plus the thermal resistance contribution by the PCB copper area acting as a heat sink. Submit Documentation Feedback Copyright (c) 2001-2016, Texas Instruments Incorporated Product Folder Links: LP2983 15 LP2983 SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 www.ti.com 8.2.2.4 Estimating Junction Temperature The EIA/JEDEC standard recommends the use of psi () thermal characteristics to estimate the junction temperatures of surface mount devices on a typical PCB board application. These characteristics are not true thermal resistance values, but rather package specific thermal characteristics that offer practical and relative means of estimating junction temperatures. These psi metrics are determined to be significantly independent of copper-spreading area. The key thermal characteristics (JT and JB) are given in Thermal Information and are used in accordance with Equation 4 or Equation 5. TJ(MAX) = TTOP + (JT x PD(MAX)) where * * PD(MAX) is explained in Equation 3 TTOP is the temperature measured at the center-top of the device package. TJ(MAX) = TBOARD + (JB x PD(MAX)) (4) where * * PD(MAX) is explained in Equation 3. TBOARD is the PCB surface temperature measured 1-mm from the device package and centered on the package edge. (5) For more information about the thermal characteristics JT and JB, see Semiconductor and IC Package Thermal Metrics (SPRA953); for more information about measuring TTOP and TBOARD, see Using New Thermal Metrics (SBVA025); and for more information about the EIA/JEDEC JESD51 PCB used for validating RJA, see Thermal Characteristics of Linear and Logic Packages Using JEDEC PCB Designs (SZZA017). These application notes are available at www.ti.com. 8.2.3 Application Curves Unless otherwise specified, CIN = 1 F, COUT = 2.2 F, VIN = VOUT(NOM) + 1, TA = 25C, ON/OFF pin is tied to VIN.. Figure 25. Line Transient Response Figure 26. Load Transient Response 9 Power Supply Recommendations The LP2983 is designed to operate from an input voltage supply range between 2.2 V and 16 V. The input voltage range provides adequate headroom for the device to have a regulated output. This input supply must be well regulated. If the input supply is noisy, additional input capacitors with low ESR can help improve the output noise and transient performance. 16 Submit Documentation Feedback Copyright (c) 2001-2016, Texas Instruments Incorporated Product Folder Links: LP2983 LP2983 www.ti.com SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 10 Layout 10.1 Layout Guidelines For best overall performance, place all circuit components on the same side of the circuit board and as near as practical to the respective LDO pin connections. Place ground return connections to the input and output capacitors, and to the LDO ground pin as close to each other as possible, connected by a wide, component-side, copper surface. The use of vias and long traces to create LDO circuit connections is strongly discouraged and negatively affects system performance. This grounding and layout scheme minimizes inductive parasitics, and thereby reduces load-current transients, minimizes noise, and increases circuit stability. TI also recommends a ground reference plane, either embedded in the PCB itself or located on the bottom side of the PCB opposite the components. This reference plane serves to assure accuracy of the output voltage, shield noise, and behaves similar to a thermal plane to spread (or sink) heat from the LDO device. In most applications, this ground plane is necessary to meet thermal requirements. 10.2 Layout Example VIN Input Capacitor VOUT IN GND OUT Output Capacitor Ground ON/OFF ON/OFF ESR Figure 27. LP2983 Layout Example Submit Documentation Feedback Copyright (c) 2001-2016, Texas Instruments Incorporated Product Folder Links: LP2983 17 LP2983 SNVS170D - OCTOBER 2001 - REVISED APRIL 2016 www.ti.com 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation For additional information, see the following: * Semiconductor and IC Package Thermal Metrics (SPRA953) * Using New Thermal Metrics (SBVA025) * Thermal Characteristics of Linear and Logic Packages Using JEDEC PCB Designs (SZZA017) 11.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2ETM Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.3 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 11.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.5 Glossary SLYZ022 -- TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 18 Submit Documentation Feedback Copyright (c) 2001-2016, Texas Instruments Incorporated Product Folder Links: LP2983 PACKAGE OPTION ADDENDUM www.ti.com 17-Mar-2017 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LP2983AIM5-1.0/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LENA LP2983AIM5-1.2/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LELA LP2983AIM5X-1.0/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LENA LP2983AIM5X-1.2/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LELA LP2983IM5-1.0/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LENB LP2983IM5-1.2/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LELB LP2983IM5X-1.0/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LENB LP2983IM5X-1.2/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LELB (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com (4) 17-Mar-2017 There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) LP2983AIM5-1.0/NOPB SOT-23 DBV 5 1000 178.0 8.4 LP2983AIM5-1.2/NOPB B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3.2 3.2 1.4 4.0 8.0 Q3 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP2983AIM5X-1.0/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP2983AIM5X-1.2/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP2983IM5-1.0/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP2983IM5-1.2/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP2983IM5X-1.0/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP2983IM5X-1.2/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2016 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP2983AIM5-1.0/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP2983AIM5-1.2/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP2983AIM5X-1.0/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP2983AIM5X-1.2/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP2983IM5-1.0/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP2983IM5-1.2/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP2983IM5X-1.0/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP2983IM5X-1.2/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 1.75 1.45 PIN 1 INDEX AREA 1 0.1 C B A 5 2X 0.95 1.9 1.45 MAX 3.05 2.75 1.9 2 4 0.5 5X 0.3 0.2 3 (1.1) C A B 0.15 TYP 0.00 0.25 GAGE PLANE 8 TYP 0 0.22 TYP 0.08 0.6 TYP 0.3 SEATING PLANE 4214839/C 04/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. www.ti.com EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MIN ARROUND 0.07 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS 4214839/C 04/2017 NOTES: (continued) 4. Publication IPC-7351 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X(0.95) 4 3 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/C 04/2017 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. www.ti.com PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 1.75 1.45 PIN 1 INDEX AREA 1 0.1 C B A 5 2X 0.95 1.9 1.45 MAX 3.05 2.75 1.9 2 4 0.5 5X 0.3 0.2 3 (1.1) C A B 0.15 TYP 0.00 0.25 GAGE PLANE 8 TYP 0 0.22 TYP 0.08 0.6 TYP 0.3 SEATING PLANE 4214839/C 04/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. www.ti.com EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MIN ARROUND 0.07 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS 4214839/C 04/2017 NOTES: (continued) 4. Publication IPC-7351 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X(0.95) 4 3 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/C 04/2017 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright (c) 2018, Texas Instruments Incorporated Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Texas Instruments: LP2983AIM5-1.0 LP2983AIM5-1.0/NOPB LP2983AIM5-1.2 LP2983AIM5-1.2/NOPB LP2983AIM5X-1.0 LP2983AIM5X-1.0/NOPB LP2983AIM5X-1.2 LP2983AIM5X-1.2/NOPB LP2983IM5-1.0 LP2983IM5-1.0/NOPB LP2983IM5-1.2 LP2983IM5-1.2/NOPB LP2983IM5X-1.0 LP2983IM5X-1.0/NOPB LP2983IM5X-1.2 LP2983IM5X1.2/NOPB