DS04-27405-1E
FUJITSU SEMICONDUCTOR
DATA SHEET
ASSP For Power Supply Applications
BIPOLAR
Power Voltage Monitoring IC
with Watchdog Timer
MB3793-45
■
■■
■DESCRIPTION
The MB3793 is an integrated circuit to monitor power voltage; it incorporates a watchdog timer.
A reset signal is output when the pow er is cut or f alls abruptly. When the po wer reco v ers normally after resetting,
a pow er-on reset signal is output to microprocessor units (MPUs). An internal watchdog timer with two inputs for
system operation diagnosis can provide a fall-safe function for various application systems.
There is also a mask option that can detect voltages of 4.9 to 2.4 V in 0.1-V steps.
The model number is MB3793-45 corresponding to the detected voltage. The model number and package code
are as shown below.
■
■■
■FEATURES
• Precise detection of power voltage fall: ±2.5%
• Detection voltage with hysteresis
• Low power dispersion: ICC = 31 µA (reference)
• Internal dual-input watchdog timer
• Watchdog-timer halt function (by inhibition pin)
• Independently-set wacthdog and reset times
■
■■
■PACKAGE
Model No. Package code Detection voltage
MB3793-45 3793-7 4.5 V
8-pin plastic SOP
(FPT-8P-M01)
8-pin plastic SOL
(FPT-8P-M02)
MB3793-45
2
■
■■
■PIN ASSIGNMENT
■
■■
■PIN DESCRIPTION
Pin no. Symbol Descriptions Pin no. Symbol Descriptions
1 RESET Outputs reset pin 5 VCC Power supply pin
2CTW
Watchdog timer monitor time
setting pin 6 INH Inhibit pin
3CTP
Power-on reset hold time
setting pin 7 CK2 Inputs clock 2 pin
4 GND Ground pin 8 CK1 Inputs clock 1 pin
RESET
CTW
CTP
GND
CK1
CK2
INH
VCC
(FPT-8P-M01)
(FPT-8P-M02)
(Top view)
1
2
3
4
8
7
6
5
MB3793-45
3
■
■■
■BLOCK DIAGRAM
I1 = 3 µA
..I2 = 30 µA
..
R1 =
650 kΩ
..
3
1
6
2
8
7
5
4
CTP
To VCC of all blocks
Pulse generator 1
Watchdog
timer
Reference
voltage
generator
To GND of
all blocks
Pulse generator 2
Output circuit Logic circuit
RESET
INH
CTW
CK1
CK2
VCC
GND
Comp.S
−
+
VS
VREF = 1.24 V
..
R2 =
240 kΩ
..
MB3793-45
4
■
■■
■BLOCK DESCRIPTION
1. Comp. S
Comp. S is a comparator with hysteresis to compare the reference voltage with a voltage (VS) that is the result
of dividing the power voltage (VCC) by resistors 1 and 2. When VS falls below 1.24 V, a reset signal is output.
This function enables the MB3793 to detect an abnormality within 1 µs when the power is cut or falls abruptly.
2. Output circuit
The output circuit contains a RESET output control comparator that compares the v oltage at the CTP pin to the
threshold voltage to release the RESET output if the CTP pin voltage exceeds the threshold value.
Since the reset (RESET) output buffer has CMOS organization, no pull-up resistor is needed.
3. Pulse generator
The pulse generator generates pulses when the voltage at the CK1 and CK2 clock pins changes to High from
Low level (positive-edge trigger) and exceeds the threshold voltage; it sends the clock signal to the wa tchdog
timer.
4. Watchdog timer
The watchdog timer can monitor two clock pulses. Short-circuit the CK1 and CK2 clock pins to monitor a single
clock pulse.
5. Inhibition pin
The inhibition (INH) pin forces the watchdog timer on/off. When this pin is High level, the watchdog timer is
stopped.
6. Logic circuit
The logic circuit contains flip-flops.
Flip-flop RSFF1 controls the charging and discharging of the power-on reset time setting capacitor (CTP).
Flip-flop RSFF2 turns on/off the circuit that accelerates charging of the power-on reset time setting capacitor
(CTP) at a reset. The RSFF2 operates only at a reset; it does not operate at a power-on reset when the power
is turned on.
MB3793-45
5
■
■■
■ABSOLUTE MAXIMUM RATINGS (Ta = +25°C)
*: The power supply voltage is based on the ground voltage (0 V).
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■
■■
■RECOMMENDED OPERATING CONDITIONS
*: The watchdog timer monitor time range depends on the rating of the setting capacitor.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
Parameter Symbol Conditions Rating Unit
Min. Max.
Power supply voltage* VCC — –0.3 +7 V
Input voltage
CK1 VCK1 —
–0.3 +7 VCK2 VCK2 —
INH IINH —
Reset output current RESET IOL
IOH —–10+10mA
Allowable loss PDTa ≤ +85°C — 200 mW
Storage temperature Tstg — –55 +125 °C
Parameter Symbol Conditions Value Unit
Min. Typ. Max.
Power supply voltage VCC — 1.2 — 6.0 V
Reset (RESET) output current IOL
IOH —–5—+5mA
Power-on reset hold time setting
capacity CTP —0.001—10µF
Watchdog-timer monitoring time
setting capacity CTW —0.001— 1µF
Operating temperature Ta — –40 — +85 °C
MB3793-45
6
■
■■
■ELECTRICAL CHARACTERISTICS
1. DC Characteristics (VCC = +5 V, Ta = +25°C)
*: The values enclosed in parentheses () are setting assurance values.
2. AC Characteristics (VCC = +5 V, Ta = +25°C)
*: The voltage range is 10% to 90% at testing the reset output transition time.
Parameter Symbol Conditions Value Unit
Min. Typ. Max.
Power supply current ICC1 After exit from reset — 31 45 µA
Detection voltage
VSL VCC falling Ta = +25°C 4.40 4.50 4.60 V
Ta = –40°C to +85°C (4.35)* 4.50 (4.65)*
VSH VCC rising Ta = +25°C 4.50 4.60 4.70 V
Ta = –40°C to +85°C (4.45)* 4.60 (4.75)*
Detection voltage hysteresis
difference VSHYS VSH – VSL 50 100 150 mV
Clock-input threshold voltage VCIH CK rising (1.4)* 1.9 2.5 V
VCIL CK falling 0.8 1.3 (1.8)* V
Clock-input hysteresis VCHTS — (0.4)* 0.6 (0.8)* V
Inhibition-input voltage VIIH —3.5——
V
VIIL ——00.8
Input current
(CK1, CK2, INH) IIH VCK = 5 V — 0 1.0 µA
IIL VCK = 0 V –1.0 0 — µA
Reset output voltage VOH IRESET = –5 mA 4.5 4.75 — V
VOL IRESET = +5 mA — 0.12 0.4 V
Reset-output minimum power
voltage VCCL IRESET = +50 µA—0.81.2V
Parameter Symbol Conditions Value Unit
Min. Typ. Max.
Power-on reset hold time tPR CTP = 0.1 µF 80 130 180 ms
Watchdog timer reset time tWD CTW = 0.01 µF,
CTP = 0.1 µF7.5 15 22.5 ms
Watchdog timer reset time tWR CTP = 0.1 µF51015ms
Clock input pulse width tCKW — 500 — — ns
Clock input pulse cycle tCKT —20——µs
Reset (RESET) output transition
time* Rising tr*CL = 50 pF — — 500 ns
Falling tf*CL = 50 pF — — 500 ns
MB3793-45
7
■
■■
■DIAGRAM
1. Basic operation (Positive clock pulse)
CTP
RESET
INH
CTW
CK1
CK2
VSH
VCC
VSL
Vth
VH
VL
(1) (2) (3) (4)(5) (5) (6) (7) (8) (9) (10) (11) (12) (13)
tPR tWD tPR
tWR
tCKW
tCKT
MB3793-45
8
2. Basic operation (Negative clock pulse)
CTP
RESET
INH
CTW
CK1
CK2
VSH
VCC
VSL
Vth
VH
VL
tPR tWD tPR
tWR
tCKW
tCKT
(1) (2) (3) (4)(5) (5) (6) (7) (8) (9) (10) (11) (12) (13)
MB3793-45
9
3. Single-clock input monitoring (Positive clock pulse)
CTP
RESET
CTW
CK1
Vth
VH
VL
CK2
tWR
tWD
tCKT
tCKW
Note: The MB3793 can monitor only one clock.
The MB3793 checks the cloc k signal at ev ery other input pulse. Theref ore, set
watchdog timer monitor time tWD to the time that allows the MB3793 to monitor
the period twice as long as the input clock pulse.
MB3793-45
10
4. Inhibition operation (Positive clock pulse)
CTP
RESET
INH
CTW
CK1
CK2
VSH
VCC
VSL
Vth
VH
VL
tPR tWD tPR
tWR
tCKW
(1) (2) (3) (4)(5) (5) (6) (7) (11) (8) (9) (10) (12) (13)
MB3793-45
11
5. Clock pulse input supplementation (Positive clock pulse)
■
■■
■OPERATION SEQUENCE
1. Positive clock pulse input
See “1. Basic operation (positive clock pulse)” under “■ DIAGRAM”.
2. Negative clock pulse input
See “2. Basic operation (negative clock pulse)” under “■ DIAGRAM”.
The MB3793 operates in the same way whether it inputs positive or negative pulses.
3. Clock monitoring
To use the MB3793 while monitoring only one clock, connect clock pins CK1 and CK2.
Although the MB3793 operates basically in the same way as when monitoring two cloc ks, it monitors the clock
signal at every other input pulse.
See “3. Single-clock input monitoring (positive clock pulse)” under “■ DIAGRAM”.
4. Description of Operations
The numbers given to the following items correspond to numbers (1) to (13) used in “■ DIAGRAM”.
(1) The MB3793 outputs a reset signal when the supply voltage (VCC) reaches about 0.8 V (VCCL)
(2) If VCC reaches or exceeds the rise-time detected voltage VSH, the MB3793 starts charging the power-on re-
set hold time setting capacitor CTP. At this time, the output remains in a reset state. The VSH value is about
4.60 V.
(3) When CTP has been charged for a certain period of time TPR (until the CTP pin voltage exceeds the thresh-
old voltage (Vth) after the start of charging), the MB3793 cancels the reset (setting the RESET pin to “H”
level from “L” level).
CTW
CK1 *1
*2
CK2
VH
VL
Note: The MB3793 watchdog timer monitors Clock1 (CK1) and Clock2 (CK2) pulses alternately.
When a CK2 pulse is detected after detecting a CK1 pulse, the monitoring time setting capacity
(CTW) switches to charging from discharging.
When two consecutive pulses occur on one side of this alternation before switching, the second
pulse is ignored.
In the above figure, pulse *1 and *2 are ignored.
MB3793-45
12
The Vth value is about 3.6 V with VCC = 5.0 V
The power-on reset hold timer monitor time tPR is set with the following equation:
tPR (ms) A ×
××
× CTP (µF)
The value of A is about 1300 with VCC = 5.0 V. The MB3793 also starts charging the watchdog timer monitor
time setting capacitor (CTW).
(4) When the voltage at the watchdog timer monitor time setting pin CTW reaches the “H” level threshold voltage
VH, the CTW switches from the charge state to the discharge state.
The value of VH is always about 1.24 V regardless of the detected voltage.
(5) If the CK2 pin inputs a clock pulse (positive edge trigger) when the CTW is being discharged in the CK1-CK2
order or simultaneously, the CTW switches from the discharge state to the charge state.
The MB3793 repeats operations (4) and (5) as long as the CK1/CK2 pin inputs clock pulses with the system
logic circuit operating normally.
(6) If no clock pulse is fed to the CK1 or CK2 pin within the watchdog timer monitor time tWD due to some prob-
lem with the system logic circuit, the CTW pin is set to the “L” level threshold voltage VL or less and the
MB3793 outputs a reset signal (setting the RESET pin to “L” level from “H” level).
The value of VL is always about 0.24 V regardless of the detected voltage.
The watchdog timer monitor time tWD is set with the following equation:
tWD (ms) B × CTW (µF)
The value of B is hardly affected by the supply voltage; it is about 1500 with VCC = 5.0 V.
(7) When a certain period of time tWR has passed (until the CTP pin voltage reaches or exceeds Vth again after
recharging the CTP), the MB3793 cancels the reset signal and starts operating the watchdog timer.
The watchdog timer monitor reset time tWR is set with the following equation:
tWR (ms) D x CTP (µF)
The value of D is about 100 with VCC = 5.0 V.
The MB3793 repeats operations (4) and (5) as long as the CK1/CK2 pin inputs clock pulses. If no clock
pulse is input, the MB3793 repeats operations (6) and (7).
(8) If VCC is lowered to the fall-time detected voltage (VSL) or less, the CTP pin voltage decreases and the
MB3793 outputs a reset signal (setting the RESET pin to “L” level from “H” level).
The value of VSL is 4.5 V
(9) When VCC reaches or exceeds VSH again, the MB3793 starts charging the CTP.
(10)When the CTP pin voltage reaches or exceeds Vth, the MB3793 cancels the reset and restarts operating
the watchdog timer. It repeats operations (4) and (5) as long as the CK1/CK2 pin inputs clock pulses.
(11)Making the inhibit pin active (setting the INH pin to “H” from “L”) forces the watchdog timer to stop operation.
This stops only the watchdog timer, leaving the MB3793 monitoring VCC (operations (8) to (10)).
The watchdog timer remains inactive unless the inhibit input is canceled.
(12)Canceling the inhibit input (setting the INH pin to “L” from “H”) restarts the watchdog timer.
(13)The reset signal is output when the power supply is turned off to set VCC to VSL or less.
..
=
..
=
..
=
MB3793-45
13
■
■■
■APPLICATION EXAMPLE
1. Supply voltage monitor and watchdog timer (1-clock monitor)
2. Supply voltage monitor and watchdog timer stop
5
2
3
647
8
1
RESET
Microprocessor
VCC
RESET
CK
GND
GND
GND
CTW*CTP*
VCC
VCC
CTW
CTP CK1
CK2INH
MB3793
*: Use a capacitor with less leakage current.
The MB3793 monitors the clock (CK1/2) at every other input pulse.
GND
C
TW
*C
TP
*
V
CC
RESET V
CC
CK
GND
RESET
Microprocessor 1 Microprocessor 2
V
CC
CK
GND
HALT
HALT
5
6
2
347
8
1
RESET
GND
V
CC
INH
CTW CK1
CK2CTP
MB3793
*: Use a capacitor with less leakage current.
MB3793-45
14
■
■■
■TYPICAL APPLICATION
2
3
6
1
8
7
4
5
VCC
CTW*CTP*
GND
INH GND
VCC
CTP
CTW RESET
CK1
CK2
RESET
Microprocessor 1 Microprocessor 2
CK
GND
VCC RESET
CK
GND
VCC
MB3793
1. Equation of time-setting capacitances (CTP and CTW) and set time
tPR [ms] A × CTP [µF]
tWD [ms] B × CTW [µF] + C × CTP [µF]
However, when tWD [ms] B × CTW [µF]
tWR [ms] D × CTP [µF]
Values of A, B, C, and D
2. (Example) when CTP = 0.1 µF and CTW = 0.01 µF
ABCDRemark
1300 1500 3 100 VCC = 5.0 V
time
(ms)
tPR 130
tWD 15
tWR 10
=
..
=
..
≤ about 10,
CTP
CTW =
..
=
..
=
..
=
..
=
..
*: Use a capacitor with less leakage current.
MB3793-45
15
■
■■
■ORDERING INFORMATION
Part number Package Remarks
MB3793-45PF 8-pin Plastic SOP
(FPT-8P-M01)
MB3793-45PNF 8-pin Plastic SOL
(FPT-8P-M02)
MB3793-45
16
■
■■
■PACKAGE DIMENSIONS
(Continued)
8-pin plastic SOP
(FPT-8P-M01)
C
2000 FUJITSU LIMITED F08002S-4C-5
Ø0.13(.005) M
"A"
0.68(.027)MAX
0.18(.007)MAX
0.20(.008)
0.50(.020)
Details of "A" part
0.45±0.10
0.05(.002)MIN
7.80±0.405.30±0.30
0.50±0.20
(.020±.008)
(STAND OFF)
(.018±.004)
(.209±.012) (.307±.016)
.250 –.008
+.010
–0.20
+0.25
6.35
.006 –.001
+.002
–0.02
+0.05
0.15
.268 –.008
+.016
–0.20
+0.40
6.80
INDEX
TYP
1.27(.050)
3.81(.150)REF
2.25(.089)MAX
(Mounting height)
0.10(.004)
Dimensions in mm (inches)
MB3793-45
17
(Continued)
8-pin plastic SOL
(FPT-8P-M02)
C
2000 FUJITSU LIMITED F08004S-2C-5
1.27(.050)TYP 0.42±0.10 0.20±0.05
0.15±0.10
3.90±0.30 6.00±0.40
0.50±.020
5.00±0.30
0.40(.016)
3.81(.150)REF
.199 –.008
+.010
–0.20
+0.25
5.05
Ø0.13(.005) M
(.017±.004) (.008±.002)
(.154±.012) (.236±.016) (.197±.012)
(.006±.004)
"A"
0.65(.026)MAX
0.18(.007)MAX
0.40(.016)
0.20(.008)
Details of "A" part
(.020±.008)
(STAND OFF)
45°
1.55±0.20(.061±.008)
(Mounting height)
0.10(.004)
Dimensions in mm (inches)
MB3793-45
FUJITSU LIMITED
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information and circuit diagrams in this document are
presented as examples of semiconductor device applications, and
are not intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the use
of this information or circuit diagrams.
The products described in this document are designed, developed
and manufactured as contemplated for general use, including
without limitation, ordinary industrial use, general office use,
personal use, and household use, but are not designed, developed
and manufactured as contemplated (1) for use accompanying fatal
risks or dangers that, unless extremely high safety is secured, could
have a serious effect to the public, and could lead directly to death,
personal injury, severe physical damage or other loss (i.e., nuclear
reaction control in nuclear facility, aircraft flight control, air traffic
control, mass transport control, medical life support system, missile
launch control in weapon system), or (2) for use requiring
extremely high reliability (i.e., submersible repeater and artificial
satellite).
Please note that Fujitsu will not be liable against you and/or any
third party for any claims or damages arising in connection with
above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You
must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Law of Japan, the prior
authorization by Japanese government will be required for export
of those products from Japan.
F0007
FUJITSU LIMITED Printed in Japan
