LTC3557/LTC3557-1
1
35571fc
TYPICAL APPLICATION
FEATURES
APPLICATIONS
DESCRIPTION
USB Power Manager with
Li-Ion Charger and Three
Step-Down Regulators
The LTC
®
3557/LTC3557-1 is a highly integrated power
management and battery charger IC for single cell Li-Ion/
Polymer battery applications. It includes a PowerPath
TM
manager with automatic load prioritization, a battery
charger, an ideal diode and numerous internal protection
features. Designed specifi cally for USB applications, the
LTC3557/LTC3557-1 power manager automatically limits
input current to a maximum of either 100mA or 500mA
for USB applications or 1A for wall adapter powered
applications. Battery charge current is automatically
reduced such that the sum of the load current and the
charge current does not exceed the programmed input
current limit. The LTC3557/LTC3557-1 also includes three
adjustable synchronous step-down switching regulators
and a high voltage buck regulator output controller with
Bat-Track that allows effi cient charging from supplies as
high as 38V. The LTC3557/LTC3557-1 is available in a low
profi le 4mm × 4mm × 0.75mm 28-pin QFN package.
■ Seamless Transition Between Input Power Sources:
Li-Ion Battery, USB, 5V Wall Adapter or High
Voltage Buck Regulator with Bat-Track
TM
■ 200mΩ Internal Ideal Diode Plus Optional External
Ideal Diode Controller Provides Low Loss Power
Path When Input Current is Limited or Unavailable
■ Triple Adjustable High Effi ciency Step-Down
Switching Regulators (600mA, 400mA, 400mA IOUT)
■ Pin Selectable Burst Mode
®
Operation
■ Full Featured Li-Ion/Polymer Battery Charger
■ 1.5A Maximum Charge Current with Thermal Limiting
■ Battery Float Voltage:
4.2V (LTC3557)
4.1V (LTC3557-1)
■ Low Profi le 4mm × 4mm 28-Pin QFN Package
■ HDD-Based MP3 Players
■ PDA, PMP, PND/GPS
■ USB-Based Handheld Products
+
100mA/500mA
1000mA
HV SUPPLY
8V TO 38V
(TRANSIENTS
TO 60V)
USB OR
5V ADAPTER
CHARGE
RST
CC/CV
CHARGER
ALWAYS ON LDO
LTC3557/LTC3557-1
TRIPLE HIGH EFFICIENCY
STEP-DOWN
SWITCHING REGULATORS
HIGH VOLTAGE
BUCK DC/DC
0V
3.3V/25mA
SINGLE CELL
Li-Ion
VOUT
0.8V to 3.6V/600mA
0.8V to 3.6V/400mA
0.8V to 3.6V/400mA
NTC
35571 TA01a
, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology
Corporation. Bat-Track and PowerPath are trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected b
y
U.S. Patents
,
includin
g
6522118
,
6700364. Other
p
atents
p
endin
g
.
ILOAD (mA)
0
600
500
400
300
200
100
0
–100 300 500
35571 TA01b
100 200 400 600
CURRENT (mA)
ILOAD
IIN
IBAT
(CHARGING)
IBAT
(DISCHARGING)
WALL = 0V
RPROG = 2k
RCLPROG = 2k
Input and Battery Current vs Load Current
LTC3557/LTC3557-1
2
35571fc
POWER MANAGER ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
VBUS, VOUT
, VIN1, VIN2
t < 1ms and Duty Cycle < 1% .................. −0.3V to 7V
Steady State ............................................. −0.3V to 6V
BAT, NTC, CHRG, WALL, VC,
MODE, FB1, FB2, FB3, RST2 ........................ −0.3V to 6V
EN1, EN2, EN3 .............................. −0.3V to VOUT + 0.3V
ILIM0, ILIM1, PROG ....................... −0.3V to VCC + 0.3V
IVBUS, IVOUT
, IBAT .........................................................2A
ISW1 .....................................................................850mA
ISW2, ISW3 ............................................................600mA
IRST2, ICHRG, IACPR .................................................75mA
ICLPROG, IPROG .......................................................... 2mA
Maximum Operating Junction Temperature .......... 110°C
Operating Ambient Temperature Range ...−40°C to 85°C
Storage Temperature Range ...................−65°C to 125°C
(Notes 1-4)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Input Power Supply
VBUS Input Supply Voltage 4.35 5.5 V
IBUS(LIM) Total Input Current (Note 5) ILIM0 = 0V, ILIM1 = 0V (1x Mode)
ILIM0 = 5V, ILIM1 = 5V (5x Mode)
ILIM0 = 5V, ILIM1 = 0V (10x Mode)
●
●
80
450
900
90
475
950
100
500
1000
mA
mA
mA
IBUSQ Input Quiescent Current 1x, 5x, 10x Modes
ILIM0 = 0V, ILIM1 = 5V (Suspend Mode)
0.35
0.05 0.1
mA
mA
hCLPROG Ratio of Measured VBUS Current to CLPROG
Program Current
1x, 5x, 10x Modes 1000 mA/mA
VCLPROG CLPROG Servo Voltage in Current Limit 1x Mode
5x Mode
10x Mode
0.2
1.0
2.0
V
V
V
VUVLO VBUS Undervoltage Lockout Rising Threshold
Falling Threshold 3.5
3.8
3.7
3.9 V
V
28 27 26 25 24 23
8 9
TOP VIEW
29
UF PACKAGE
28-LEAD (4mm s 4mm) PLASTIC QFN
10 11 12 13 14
ILIM0
ILIM1
WALL
LDO3V3
SW1
VIN1
FB1
GATE
PROG
NTC
VNTC
SW3
VIN2
SW2
CHRG
CLPROG
VC
ACPR
VBUS
VOUT
BAT
MODE
EN1
EN2
EN3
FB3
FB2
RST2
16
15
17
18
19
20
21
6
7
5
4
3
2
1
22
TJMAX = 110°C, θJA = 37°C/W
EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB
The ● denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C.
VBUS = 5V, VBAT = 3.8V, ILIM0 = ILIM1 = 5V, WALL = EN1 = EN2 = EN3 = 0V, RPROG = 2k, RCLPROG = 2.1k.
PIN CONFIGURATION
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3557EUF#PBF LTC3557EUF#TRPBF 3557 28-Lead (4mm × 4mm) Plastic QFN −40°C to 85°C
LTC3557EUF-1#PBF LTC3557EUF-1#TRPBF 35571 28-Lead (4mm × 4mm) Plastic QFN −40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based fi nish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
LTC3557/LTC3557-1
3
35571fc
POWER MANAGER ELECTRICAL CHARACTERISTICS
The ● denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C.
VBUS = 5V, VBAT = 3.8V, ILIM0 = ILIM1 = 5V, WALL = EN1 = EN2 = EN3 = 0V, RPROG = 2k, RCLPROG = 2.1k.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDUVLO VBUS to VOUT Differential Undervoltage
Lockout
Rising Threshold
Falling Threshold
50
−50
100 mV
mV
RON_LIM Input Current Limit Power FET
On-Resistance (Between VBUS and VOUT)
0.2
Battery Charger
VFLOAT VBAT Regulated Output Voltage LTC3557
LTC3557, 0°C ≤ TA ≤ 85°C
LTC3557-1
LTC3557-1, 0°C ≤ TA ≤ 85°C
4.179
4.165
4.079
4.065
4.200
4.200
4.100
4.100
4.221
4.235
4.121
4.135
V
V
V
V
ICHG Constant Current Mode Charge Current RPROG = 1k, Input Current Limit = 2A
RPROG = 2k, Input Current Limit = 1A
RPROG = 5k, Input Current Limit = 400mA
●
●
●
950
465
180
1000
500
200
1050
535
220
mA
mA
mA
IBAT Battery Drain Current VBUS > VUVLO, Charger Off, IOUT = 0µA
VBUS = 0V, IOUT = 0µA (Ideal Diode Mode)
6
55
27
100
µA
µA
VPROG
VPROG(TRKL)
PROG Pin Servo Voltage
PROG Pin Servo Voltage in Trickle Charge BAT < VTRKL
1.000
0.100
V
V
hPROG Ratio of IBAT to PROG Pin Current 1000 mA/mA
ITRKL Trickle Charge Current BAT < VTRKL 40 50 60 mA
VTRKL Trickle Charge Rising Threshold
Trickle Charge Falling Threshold
BAT Rising
BAT Falling 2.5
2.85
2.75
3.0 V
V
ΔVRECHRG Recharge Battery Threshold Voltage Threshold Voltage Relative to VFLOAT −75 −100 −115 mV
tTERM Safety Timer Termination Period Timer Starts when BAT = VFLOAT – 50mV 3.2 4 4.8 Hour
tBADBAT Bad Battery Termination Time BAT < VTRKL 0.4 0.5 0.6 Hour
hC/10 End-of-Charge Indication Current Ratio (Note 6) 0.085 0.1 0.115 mA/mA
RON(CHG) Battery Charger Power FET On-Resistance
(Between VOUT and BAT)
200 m
TLIM Junction Temperature in Constant
Temperature Mode
110 °C
NTC
VCOLD Cold Temperature Fault Threshold Voltage Rising NTC Voltage
Hysteresis
75 76
1.3
77 %VVNTC
%VVNTC
VHOT Hot Temperature Fault Threshold Voltage Falling NTC Voltage
Hysteresis
34 35
1.3
36 %VVNTC
%VVNTC
VDIS NTC Disable Threshold Voltage Falling NTC Voltage
Hysteresis
●1.2 1.7
50
2.2 %VVNTC
mV
INTC NTC Leakage Current NTC = VBUS = 5V −50 50 nA
Ideal Diode
VFWD Forward Voltage Detection IOUT = 10mA 5 15 25 mV
RDROPOUT Diode On-Resistance, Dropout IOUT = 1A 200 m
IMAX Diode Current Limit (Note 7) 3.6 A
Always On 3.3V Supply
VLDO3V3 Regulated Output Voltage 0mA < ILDO3V3 < 25mA 3.1 3.3 3.5 V
ROL(LDO3V3) Open-Loop Output Resistance BAT = 3.0V, VBUS = 0V 24
RCL(LDO3V3) Closed-Loop Output Resistance 3.2
LTC3557/LTC3557-1
4
35571fc
POWER MANAGER ELECTRICAL CHARACTERISTICS
The ● denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C.
VBUS = 5V, VBAT = 3.8V, ILIM0 = ILIM1 = 5V, WALL = EN1 = EN2 = EN3 = 0V, RPROG = 2k, RCLPROG = 2.1k.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Wall Adapter
VACPR ACPR Pin Output High Voltage
ACPR Pin Output Low Voltage
IACPR = 1mA
IACPR = 1mA
VOUT − 0.3 VOUT
0 0.3
V
V
VWAbsolute Wall Input Threshold Voltage WALL Rising
WALL Falling 3.1
4.3
3.2
4.45 V
V
ΔVWDifferential Wall Input Threshold Voltage WALL − BAT Falling
WALL − BAT Rising
025
75 150
mV
mV
IQWALL Wall Operating Quiescent Current IWALL + IVOUT
, IBAT = 0mA,
WALL = VOUT = 5V
440 µA
Logic (ILIM0, ILIM1 and CHRG)
VIL Input Low Voltage ILIM0, ILIM1 0.4 V
VIH Input High Voltage ILIM0, ILIM1 1.2 V
IPD Static Pull-Down Current ILIM0, ILIM1; VPIN = 1V 2 µA
VCHRG CHRG Pin Output Low Voltage ICHRG = 10mA 0.15 0.4 V
ICHRG CHRG Pin Input Current BAT = 4.5V, CHRG = 5V 0 1 µA
SWITCHING REGULATOR ELECTRICAL CHARACTERISTICS
The ● denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C.
VOUT = VIN1 = VIN2 = 3.8V, MODE = EN1 = EN2 = EN3 = 0V.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Step-Down Switching Regulators 1, 2 and 3
VIN1, VIN2 Input Supply Voltage (Note 9) ●2.7 5.5 V
VOUT UVL0 VOUT Falling
VOUT Rising
VIN1 and VIN2 Connected to VOUT Through Low
Impedance. Switching Regulators are Disabled
Below VOUT UVLO
2.5 2.7
2.8 2.9
V
V
fOSC Oscillator Frequency 1.91 2.25 2.59 MHz
VIL Input Low Voltage MODE, EN1, EN2, EN3 0.4 V
VIH Input High Voltage MODE, EN1, EN2, EN3 1.2 V
IPD Static Pull-Down Current MODE, EN1, EN2, EN3 (VPIN = 1V) 1 µA
Step-Down Switching Regulator 1
IVIN1 Pulse-Skip Mode Input Current (Note 10) IOUT = 0, EN1 = 3.8V, MODE = 0V 220 µA
Burst Mode Input Current (Note 10) IOUT = 0, EN1 = MODE = 3.8V 35 50 µA
Shutdown Input Current IOUT = 0, EN1 = 0V, FB1 = 0V 0.01 1 µA
ILIM1 Peak PMOS Current Limit EN1 = 3.8V, MODE = 0V or 3.8V (Note 7) 900 1200 1500 mA
VFB1 Feedback Voltage EN1 = 3.8V, MODE = 0V
EN1 = MODE = 3.8V
●
●
0.78
0.78
0.8
0.8
0.82
0.824
V
V
IFB1 FB1 Input Current (Note 10) EN1 = 3.8V −0.05 0.05 µA
D1 Maximum Duty Cycle FB1 = 0V, EN1 = 3.8V 100 %
RP1 RDS(ON) of PMOS EN1 = 3.8V 0.3
RN1 RDS(ON) of NMOS EN1 = 3.8V 0.4
RSW1(PD) SW1 Pull-Down in Shutdown EN1 = 0V 10 k
LTC3557/LTC3557-1
5
35571fc
SWITCHING REGULATOR ELECTRICAL CHARACTERISTICS
The ● denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C.
VOUT = VIN1 = VIN2 = 3.8V, MODE = EN1 = EN2 = EN3 = 0V.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Step-Down Switching Regulator 2
IVIN2 Pulse-Skip Mode Input Current (Note 10) IOUT = 0, EN2 = 3.8V, MODE = 0V 220 µA
Burst Mode Input Current (Note 10) IOUT = 0, EN2 = MODE = 3.8V 35 50 µA
Shutdown Input Current IOUT = 0, EN2 = 0V, FB2 = 0V 0.01 1 µA
ILIM2 Peak PMOS Current Limit EN2 = 3.8V, MODE = 0V or 3.8V (Note 7) 600 800 1000 mA
VFB2 Feedback Voltage EN2 = 3.8V, MODE = 0V
EN2 = MODE = 3.8V
●
●
0.78
0.78
0.8
0.8
0.82
0.824
V
V
IFB2 FB2 Input Current (Note 10) EN2 = 3.8V −0.05 0.05 µA
D2 Maximum Duty Cycle FB2 = 0V, EN2 = 3.8V 100 %
RP2 RDS(ON) of PMOS EN2 = 3.8V 0.6 Ω
RN2 RDS(0N) of NMOS EN2 = 3.8V 0.6 Ω
RSW2(PD) SW2 Pull-Down in Shutdown EN2 = 0V 10 kΩ
VRST2 Power-On RST2 Pin Output Low Voltage IRST2 = 1mA, FB2 = 0V, EN2 = 3.8V 0.1 0.35 V
IRST2 Power-On RST2 Pin Input Current (Note 10) VRST2 = 5.5V, EN2 = 3.8V 1 µA
VTH(RST2)Power-On RST2 Pin Threshold (Note 8) −8%
tRST2 Power-On RST2 Pin Delay From RST2 Threshold to RST2 Hi-Z 230 ms
Step-Down Switching Regulator 3
IVIN2 Pulse-Skip Mode Input Current (Note 10) IOUT = 0, EN3 = 3.8V, MODE = 0V 220 µA
Burst Mode Input Current (Note 10) IOUT = 0, EN3 = MODE = 3.8V 35 50 µA
Shutdown Input current IOUT = 0, EN3 = 0V, FB3 = 0V 0.01 1 µA
ILIM3 Peak PMOS Current Limt EN3 = 3.8V, MODE = 0V or 3.8V (Note 7) 600 800 1000 mA
VFB3 Feedback Voltage EN3 = 3.8V, MODE = 0V
EN3 = MODE = 3.8V
●
●
0.78
0.78
0.8
0.8
0.82
0.824
V
V
IFB3 FB3 Input Current (Note 10) EN3 = 3.8V −0.05 0.05 µA
D3 Maximum Duty Cycle FB3 = 0V, EN3 = 3.8V 100 %
RP3 RDS(ON) of PMOS EN3 = 3.8V 0.6
RN3 RDS(ON) of NMOS EN3 = 3.8V 0.6
RSW3(PD) SW3 Pull-Down in Shutdown EN3 = 0V 10 k
Note 1. Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2. The LTC3557/LTC3557-1 is guaranteed to meet performance
specifi cations from 0°C to 85°C. Specifi cations over the −40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 3. This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperatures will exceed 110°C when overtemperature protection is
active. Continuous operation above the specifi ed maximum operating
junction temperature may result in device degradation or failure.
Note 4. VCC is the greater of VBUS, VOUT or BAT.
Note 5. Total input current is the sum of quiescent current, IBUSQ, and
measured current given by VCLPROG/RCLPROG • (hCLPROG + 1)
Note 6. hC/10 is expressed as a fraction of measured full charge current
with indicated PROG resistor.
Note 7. The current limit features of this part are intended to protect the
IC from short term or intermittent fault conditions. Continuous operation
above the maximum specifi ed pin current rating may result in device
degradation or failure.
Note 8. RST2 threshold is expressed as a percentage difference from the
FB2 regulation voltage. The threshold is measured for FB2 rising.
Note 9. VOUT not in UVLO.
Note 10. FB high, not switching.
LTC3557/LTC3557-1
6
35571fc
TYPICAL PERFORMANCE CHARACTERISTICS
Input Supply Current
vs Temperature
Input Supply Current
vs Temperature (Suspend Mode)
Battery Drain Current
vs Temperature
Input Current Limit
vs Temperature Input RON vs Temperature
Charge Current vs Temperature
(Thermal Regulation)
Battery Current and Voltage
vs Time (LTC3557) VFLOAT Load Regulation
Battery Regulation (Float)
Voltage vs Temperature
TA = 25°C unless otherwise specifi ed
TEMPERATURE (°C)
–50
IVBUS (mA)
0.7
25
35571 G01
0.4
0.2
–25 0 50
0.1
0
0.8
0.6
0.5
0.3
75 100 125
VBUS = 5V
1x MODE
TEMPERATURE (°C)
–50 –25
0
IVBUS (mA)
0.04
0.10
050 75
35571 G02
0.02
0.08
0.06
25 100 125
VBUS = 5V
TEMPERATURE (°C)
–50
0
IBAT (mA)
0.02
0.06
0.08
0.10
0.20
0.14
050 75
35571 G03
0.04
0.16
0.18
0.12
–25 25 100 125
VBAT = 3.8V
MODE = 3.8V
3 BUCKS ENABLED
N0 BUCKS ENABLED
2 BUCKS ENABLED
1 BUCK ENABLED
TEMPERATURE (°C)
–50
IVBUS (mA)
400
1000
1100
1200
050 75
35571 G04
200
100
800
600
300
900
0
700
500
–25 25 100 125
VBUS = 5V
RCLPROG = 2.1k 10x MODE
5x MODE
1x MODE
TEMPERATURE (°C)
–50
0
RON (m)
100
140
160
180
300
240
050 75
35571 G05
120
260
280
220
–25 25 100 125
IOUT = 400mA
VBUS = 4.5V
VBUS = 5.5V
VBUS = 5V
TEMPERATURE (°C)
–50
IBAT (mA)
400
500
600
25 75
35571 G06
300
200
–25 0 50 100 125
100
0
VBUS = 5V
10x MODE
RPROG = 2k
TIME (HOUR)
0
0
IBAT (mA)
VBAT AND VCHRG (V)
100
200
300
400
600
1234
35571 G07
56
500
0
1
2
3
4
6
VBAT
IBAT
C/10
5
1450mAhr
CELL
VBUS = 5V
RPROG = 2k
RCLPROG = 2k
CHRG
SAFETY
TIMER
TERMINATION
IBAT (mA)
0
VFLOAT (V)
4.12
4.14
4.16
600 1000
35571 G08
4.10
4.08
4.06 200 400 800
4.18
4.20
4.22 VBUS = 5V
10x MODE
LTC3557
LTC3557-1
TEMPERATURE (°C)
–50
VFLOAT (V)
4.06
4.10
4.12
4.14
4.22
4.18
050 75
35571 G09
4.08
4.20
4.16
–25 25 100 125
IBAT = 2mA LTC3557
LTC3557-1
LTC3557/LTC3557-1
7
35571fc
TYPICAL PERFORMANCE CHARACTERISTICS
IBAT vs VBAT
Input Disconnect Waveform
Forward Voltage vs Ideal Diode
Current (No External FET)
Forward Voltage
vs Ideal Diode Current
(with Si2333DS External FET)
TA = 25°C unless otherwise specifi ed
Input Connect Waveform Switching from 1x to 5x Mode
WALL Connect Waveform WALL Disconnect Waveform
Switching from Suspend Mode
to 5x Mode
VBAT (V)
2.0
0
IBAT (mA)
100
200
300
400
600
2.4 2.8 3.2 3.6
35571 G10
4.0 4.4
500
VBUS = 5V
10x MODE
RPROG = 2k
RCLPROG = 2k
IBAT (A)
0
0
VFWD (V)
0.05
0.10
0.15
0.20
0.25
0.2 0.4 0.6 0.8
35571 G11
1.0 1.2
VBAT = 3.2V
VBUS = 0V
TA = 25°C
VBAT = 4.2V
VBAT = 3.6V
IBAT (A)
0
VFWD (mV)
15
20
25
0.6 1.0
35571 G12
10
5
00.2 0.4 0.8
30
35
40 VBAT = 3.8V
VBUS = 0V
TA = 25°C
VBUS
5V/DIV
VOUT
5V/DIV
IBUS
0.5A/DIV
IBAT
0.5A/DIV
VBAT = 3.75V
IOUT = 100mA
RCLPROG = 2k
RPROG = 2k
1ms/DIV 35571 G25
VBUS
5V/DIV
VOUT
5V/DIV
IBUS
0.5A/DIV
IBAT
0.5A/DIV
VBAT = 3.75V
IOUT = 100mA
RCLPROG = 2k
RPROG = 2k
1ms/DIV 35571 G26
ILIM0/ILIM1
5V/DIV
IBUS
0.5A/DIV
IBAT
0.5A/DIV
VBAT = 3.75V
IOUT = 50mA
RCLPROG = 2k
RPROG = 2k
1ms/DIV 35571 G27
ILIM0
5V/DIV
VOUT
5V/DIV
IBUS
0.5A/DIV
IBAT
0.5A/DIV
VBAT = 3.75V
IOUT = 100mA
RCLPROG = 2k
RPROG = 2k
ILIM1 = 5V
100µs/DIV 35571 G28
WALL
5V/DIV
VOUT
5V/DIV
IWALL
0.5A/DIV
IBAT
0.5A/DIV
VBAT = 3.75V
IOUT = 100mA
RPROG = 2k
1ms/DIV 35571 G29
WALL
5V/DIV
VOUT
5V/DIV
IWALL
0.5A/DIV
IBAT
0.5A/DIV
VBAT = 3.75V
IOUT = 100mA
RPROG = 2k
1ms/DIV 35571 G30
LTC3557/LTC3557-1
8
35571fc
Oscillator Frequency
vs Temperature
Step-Down Switching Regulator 1
3.3V Output Effi ciency vs IOUT1
Step-Down Switching Regulator
Output Transient (MODE = 1)
Step-Down Switching Regulator
Output Transient (MODE = 0)
Step-Down Switching Regulator
Switch Impedance vs Temperature
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C unless otherwise specifi ed
Step-Down Switching Regulator
Pulse Skip Supply Current vs VINX
Step-Down Switching
Regulator Short-Circuit Current
vs Temperature
TEMPERATURE (°C)
–50
1.5
fOSC (MHz)
1.6
1.8
1.9
2.0
2.5
2.2
050 75
35571 G13
1.7
2.3
2.4
2.1
–25 25 100 125
VIN = 5V
VIN = 3.8V
VIN = 2.7V
VIN = 2.9V
IOUT1 (mA)
0.01
40
EFFICIENCY (%)
50
60
70
80
0.1 1 10 100 100
0
35571 G14
30
20
10
0
90
100
VIN1 = 3.8V
VIN1 = 5V
Burst Mode
OPERATION
PULSE SKIP
VOUT1 = 3.3V
IOUT2 (mA)
0.01
40
EFFICIENCY (%)
50
60
70
80
0.1 1 10 100 100
0
35571 G15
30
20
10
0
90
100
VIN2 = 3.8V
VIN2 = 5V
Burst Mode
OPERATION
PULSE SKIP
VOUT2 = 1.2V
IOUT3 (mA)
0.01
40
EFFICIENCY (%)
50
60
70
80
0.1 1 10 100 100
0
35571 G16
30
20
10
0
90
100
VIN3 = 3.8V
VIN3 = 5V
Burst Mode
OPERATION
PULSE SKIP
VOUT3 = 1.8V
VINX (V)
2.5
100
IIN (µA)
150
200
250
300
350
110°C
75°C
25°C
–45°C
400
3.0 3.5 4.0 4.5
35571 G17
5.0
VOUTX = 1.2V
IOUTX = 0mA
TEMPERATURE (°C)
–50
SHORT-CIRCUIT CURRENT (mA)
1100
25
35571 G18
800
600
–25 0 50
500
400
1200
1000
900
700
75 100 125
600mA BUCK
400mA BUCK
VOUT2
50mV/DIV
(AC)
VOUT3
50mV/DIV
(AC)
IOUT2
300mA
5mA 35571 G1
50µs/DIVVOUT2 = 1.2V
VOUT3 = 1.8V
IOUT3 = 16mA
VOUT2
50mV/DIV
(AC)
VOUT3
50mV/DIV
(AC)
IOUT2
300mA
5mA 35571 G2
50µs/DIVVOUT2 = 1.2V
VOUT3 = 1.8V
IOUT3 = 100mA
TEMPERATURE (°C)
–50
0
SWITCH IMPEDANCE ()
0.1
0.3
0.4
0.5
50
0.9
35571 G21
0.2
0
–25 75 100
25 12
5
0.6
0.7
0.8
600mA NMOS
600mA PMOS
400mA
PMOS
400mA
NMOS
VINX = 3.2V
Step-Down Switching Regulator 2
1.2V Output Effi ciency vs IOUT2
Step-Down Switching Regulator 3
1.8V Output Effi ciency vs IOUT3
LTC3557/LTC3557-1
9
35571fc
PIN FUNCTIONS
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C unless otherwise specifi ed
400mA Step-Down Switching
Regulator Feedback Voltage
vs Output Current
Step-Down Switching Regulator
Start-Up Waveform
ILIM0, ILIM1 (Pins 1, 2): Input Current Control Pins. ILIM0
and ILIM1 control the input current limit. See Table 1. Both
pins are pulled low by a weak current sink.
WALL (Pin 3): Wall Adapter Present Input. Pulling this pin
above 4.3V will disconnect the power path from VBUS to
VOUT
. The ACPR pin will also be pulled low to indicate that a
wall adapter has been detected.
LDO3V3 (Pin 4): Always On 3.3V LDO Output. The
LDO3V3 pin provides a regulated, always-on 3.3V supply
voltage. This pin gets its power from VOUT
. It may be used
for light loads such as a real-time clock or housekeeping
microprocessor. A 1µF capacitor is required from LDO3V3
to ground if it will be called upon to deliver current. If
the LDO3V3 output is not used it should be disabled by
connecting it to VOUT
.
SW1 (Pin 5): Power Transmission (Switch) Pin for
Step-Down Switching Regulator 1.
VIN1 (Pin 6): Power Input for Step-Down Switching
Regulator 1. This pin will generally be connected to VOUT
.
FB1 (Pin 7): Feedback Input for Step-Down Switching
Regulator 1. This pin servos to a fi xed voltage of 0.8V when
the control loop is complete.
MODE (Pin 8): Low Power Mode Enable. When this pin is
pulled high, the three step-down switching regulators are
set to low power Burst Mode operation.
EN1 (Pin 9): Logic Input Enables Step-Down Switching
Regulator 1.
EN2 (Pin 10): Logic Input Enables Step-Down Switching
Regulator 2.
EN3 (Pin 11): Logic Input Enables Step-Down Switching
Regulator 3.
FB3 (Pin 12): Feedback Input for Step-Down Switching
Regulator 3. This pin servos to a fi xed voltage of 0.8V when
the control loop is complete.
FB2 (Pin 13): Feedback Input for Step-Down Switching
Regulator 2. This pin servos to a fi xed voltage of 0.8V when
the control loop is complete.
RST2 (Pin 14): This is an open-drain output which indicates
that step-down switching regulator 2 has settled to its fi nal
value. It can be used as a power on reset for the primary
microprocessor or to enable the other buck regulators for
supply sequencing.
SW2 (Pin 15): Power Transmission (Switch) Pin for
Step-Down Switching Regulator 2.
600mA Step-Down Switching
Regulator Feedback Voltage
vs Output Current
OUTPUT CURRENT (mA)
0.78
FEEDBACK (V)
0.84
0.85
0.77
0.76
0.83
0.80
0.82
0.81
0.79
0.1 10 100 1000
35571 G22
0.75
1
3.8V
5V
Burst Mode
OPERATION
PULSE SKIP
OUTPUT CURRENT (mA)
0.78
FEEDBACK (V)
0.84
0.85
0.77
0.76
0.83
0.80
0.82
0.81
0.79
0.1 10 100 1000
35571 G23
0.75
1
3.8V
5V
Burst Mode
OPERATION
PULSE SKIP
VOUT2
50mV/DIV(AC)
VOUT1
1V/DIV
IL1
200mA/DIV
0V
EN1
0mA
35571 G2
4
100µs/DIVVOUT2 = 1.2V
IOUT2 = 50mA
MODE = 1
ROUT1 = 8
LTC3557/LTC3557-1
10
35571fc
PIN FUNCTIONS
VIN2 (Pin 16): Power Input for Step-Down Switching Regu-
lators 2 and 3. This pin will generally be connected to VOUT
.
SW3 (Pin 17): Power Transmission (Switch) Pin for
Step-Down Switching Regulator 3.
VNTC (Pin 18): Output Bias Voltage for NTC. A resistor from
this pin to the NTC pin will bias the NTC thermistor.
NTC (Pin 19): The NTC pin connects to a battery’s thermistor
to determine if the battery is too hot or too cold to charge. If
the battery’s temperature is out of range, charging is paused
until it drops back into range. A low drift bias resistor is
required from VNTC to NTC and a thermistor is required from
NTC to ground. If the NTC function is not desired, the NTC
pin should be grounded.
PROG (Pin 20): Charge Current Program and Charge
Current Monitor Pin. Connecting a resistor from PROG to
ground programs the charge current:
ICHG(A)=1000V
RPROG
If suffi cient input power is available in constant current
mode, this pin servos to 1V. The voltage on this pin always
represents the actual charge current.
GATE (Pin 21): Ideal Diode Gate Connection. This pin
controls the gate of an optional external P-channel MOSFET
transistor used to supplement the internal ideal diode. The
source of the P-channel MOSFET should be connected
to VOUT and the drain should be connected to BAT. It is
important to maintain high impedance on this pin and
minimize all leakage paths.
BAT (Pin 22): Single Cell Li-Ion Battery Pin. Depending on
available power and load, a Li-Ion battery on BAT will either
deliver system power to VOUT through the ideal diode or be
charged from the battery charger.
VOUT (Pin 23): Output Voltage of the PowerPath Controller
and Input Voltage of the Battery Charger. The majority of
the portable product should be powered from VOUT
. The
LTC3557/LTC3557-1 will partition the available power
between the external load on VOUT and the internal battery
charger. Priority is given to the external load and any extra
power is used to charge the battery. An ideal diode from
BAT to VOUT ensures that VOUT is powered even if the load
exceeds the allotted input current from VBUS or if the VBUS
power source is removed. VOUT should be bypassed with
a low impedance multilayer ceramic capacitor. The total
capacitance on VOUT should maintain a minimum of 5µF
over operating voltage and temperature.
VBUS (Pin 24): USB Input Voltage. VBUS will usually be
connected to the USB port of a computer or a DC output wall
adapter. VBUS should be bypassed with a low impedance
multilayer ceramic capacitor.
ACPR (Pin 25): Wall Adapter Present Output (Active
Low). A low on this pin indicates that the wall adapter
input comparator has had its input pulled above its input
threshold (typically 4.3V). This pin can be used to drive the
gate of an external P-channel MOSFET to provide power to
VOUT from a power source other than a USB port.
VC (Pin 26): High Voltage Buck Regulator Control Pin. This
pin can be used to drive the VC pin of an approved external
high voltage buck switching regulator. An external P-channel
MOSFET is required to provide power to VOUT with its gate
tied to the ACPR pin. The VC pin is designed to work with the
LT
®
3480, LT3481 and LT3505.
CLPROG (Pin 27): Input Current Program and Input Current
Monitor Pin. A resistor from CLPROG to ground determines
the upper limit of the current drawn from the VBUS pin
(i.e., the input current limit). A precise fraction of the input
current, hCLPROG, is sent to the CLPROG pin. The input
PowerPath delivers current until the CLPROG pin reaches
2.0V (10x Mode), 1.0V (5x Mode) or 0.2V (1x Mode).
Therefore, the current drawn from VBUS will be limited to an
amount given by hCLPROG and RCLPROG. In USB applications
the resistor RCLPROG should be set to no less than 2.1k.
CHRG (Pin 28): Open-Drain Charge Status Output. The
CHRG pin indicates the status of the battery charger.
Four possible states are represented by CHRG: charging,
not charging (i.e., fl oat charge current less than 1/10th
programmed charge current), unresponsive battery (i.e., its
voltage remains below 2.8V after 1/2 hour of charging) and
battery temperature out of range. CHRG requires a pull-up
resistor and/or LED to provide indication.
Exposed Pad (Pin 29): Ground. The exposed package pad
is ground and must be soldered to the PC board for proper
functionality and for maximum heat transfer.
LTC3557/LTC3557-1
11
35571fc
BLOCK DIAGRAM
NTC
19
VNTC
15mV
18
VBUS
WALL
CLPROG
27
6
5
7
OSC
REF
600mA, 2.25MHz
BUCK REGULATOR
VIN1
3.3V
LDO
SW1
FB1
EN
MODE
4
LDO3V3
20
PROG
22
BAT
21
GATE
23
VOUT
16
15
13
OSC
400mA, 2.25MHz
BUCK REGULATOR
VIN2
SW2
FB2
EN
MODE
17
12
OSC
RST2
400mA, 2.25MHz
BUCK REGULATOR
SW3
FB3
35571 BD
EN
MODE
EN
LOGIC
BATTERY
TEMP
MONITOR
CHRG
28
CHARGE
STATUS
ILIM
LOGIC
CC/CV
CHARGER
WALL
DETECT
INPUT
CURRENT
LIMIT
14
GND
29
MODE
8
EN3
11
EN2
10
EN1
9
2
ILIM0
ILIM1
1
24
3
VC
26
ACPR
25
VC
CONTROL
+
–
+
–
IDEAL
DIODE
LTC3557/LTC3557-1
12
35571fc
OPERATION
Introduction
The LTC3557/LTC3557-1 is a highly integrated power
management IC that includes a PowerPath controller,
battery charger, an ideal diode, an always-on LDO, three
synchronous step-down switching regulators as well as
a buck regulator VC controller. Designed specifi cally for
USB applications, the PowerPath controller incorporates
a precision input current limit which communicates with
the battery charger to ensure that input current never
violates the USB specifi cations.
The ideal diode from BAT to VOUT guarantees that ample
power is always available to VOUT even if there is insuffi cient
or absent power at VBUS.
The LTC3557/LTC3557-1 also has the ability to receive
power from a wall adapter or other non-current-limited
power source. Such a power supply can be connected
to the VOUT pin of the LTC3557/LTC3557-1 through an
external device such as a power Schottky or FET as shown
in Figure 1.
The LTC3557/LTC3557-1 has the unique ability to use
the output, which is powered by an external supply, to
charge the battery while providing power to the load. A
comparator on the WALL pin is confi gured to detect the
presence of the wall adapter and shut off the connection
to the USB. This prevents reverse conduction from VOUT
to VBUS when a wall adapter is present.
The LTC3557/LTC3557-1 provides a VC output pin which
can be used to drive the VC pin of an external high voltage
buck switching regulator such as the LT3480, LT3481, or
LT3505 to provide power to the VOUT pin. The VC control
circuitry adjusts the regulation point of the switching
regulator to a small voltage above the BAT pin voltage.
This control method provides a high input voltage, high
effi ciency battery charger and PowerPath function.
An “always on” LDO provides a regulated 3.3V from VOUT
.
This LDO will be on at all times and can be used to supply
up to 25mA.
Figure 1. Simplifi ed PowerPath Block Diagram
+
–
+
–
+
–
+
–
4.3V
(RISING)
3.2V
(FALLING)
75mV (RISING)
25mV (FALLING)
ENABLE
USB CURRENT LIMIT
CONSTANT CURRENT
CONSTANT VOLTAGE
BATTERY CHARGER
WALL
FROM AC ADAPTER (OR HIGH VOLTAGE BUCK OUTPUT)
3
VBUS
FROM
USB 24
21
+
–
15mV
GATE
BAT
35571 F01 Li-Ion
OPTIONAL
EXTERNAL
IDEAL DIODE
PMOS
BAT
IDEAL
DIODE
22
23
VOUT
VOUT
VC
OPTIONAL CONTROL
FOR HIGH VOLTAGE BUCK REGS
LT3480, LT3481 OR LT3505
25
ACPR
26
+
SYSTEM
LOAD
LTC3557/LTC3557-1
13
35571fc
OPERATION
The LTC3557/LTC3557-1 includes three 2.25MHz constant
frequency current mode step-down switching regulators
providing 400mA, 400mA and 600mA each. All step-
down switching regulators can be programmed for a
minimum output voltage of 0.8V and can be used to power
a microcontroller core, microcontroller I/O, memory or
other logic circuitry. All step-down switching regulators
support 100% duty cycle operation and are capable of
operating in Burst Mode operation for highest effi ciencies
at light loads (Burst Mode operation is pin selectable). No
external compensation components are required for the
switching regulators.
USB PowerPath Controller
The input current limit and charge control circuits of the
LTC3557/LTC3557-1 are designed to limit input current
as well as control battery charge current as a function of
IVOUT
. VOUT drives the combination of the external load,
the three step-down switching regulators, always on 3.3V
LDO and the battery charger.
If the combined load does not exceed the programmed
input current limit, VOUT will be connected to VBUS through
an internal 200m P-channel MOSFET.
If the combined load at VOUT exceeds the programmed
input current limit, the battery charger will reduce its charge
current by the amount necessary to enable the external
load to be satisfi ed while maintaining the programmed
input current. Even if the battery charge current is set to
exceed the allowable USB current, the average input current
USB specifi cation will not be violated. Furthermore, load
current at VOUT will always be prioritized and only excess
available current will be used to charge the battery.
The current out of the CLPROG pin is a fraction (1/hCLPROG)
of the VBUS current. When a programming resistor is con-
nected from CLPROG to GND, the voltage on CLPROG
represents the input current:
IVBUS =IBUSQ +VCLPROG
RCLPROG
•h
CLPROG
where IBUSQ and hCLPROG are given in the Electrical
Characteristics.
The input current limit is programmed by the ILIM0 and
ILIM1 pins. The LTC3557/LTC3557-1 can be confi gured to
limit input current to one of several possible settings as well
as be deactivated (USB Suspend). The input current limit
will be set by the appropriate servo voltage and the resistor
on CLPROG according to the following expression:
IVBUS =IBUSQ +0.2V
RCLPROG
•h
CLPROG 1x Mode
()
IVBUS =IBUSQ +1V
RCLPROG
•h
CLPROG 5x Mode
()
IVBUS =IBUSQ +2V
RCLPROG
•h
CLPROG 10x Mode
()
Under worst-case conditions, the USB specifi cation will not
be violated with an RCLPROG resistor of greater than 2.1k.
Table 1 shows the available settings for the ILIM0 and
ILIM1 pins:
Table 1: Controlled Input Current Limit
ILIM1 ILIM0 IBUS(LIM)
0 0 100mA (1x)
0 1 1A (10x)
1 0 Suspend
1 1 500mA (5x)
Notice that when ILIM0 is high and ILIM1 is low, the input
current limit is set to a higher current limit for increased
charging and current availability at VOUT
. This mode is
typically used when there is power available from a wall
adapter.
Ideal Diode from BAT to VOUT
The LTC3557/LTC3557-1 has an internal ideal diode as well
as a controller for an optional external ideal diode. Both
the internal and the external ideal diodes respond quickly
whenever VOUT drops below BAT.
If the load increases beyond the input current limit, ad-
ditional current will be pulled from the battery via the
ideal diodes. Furthermore, if power to VBUS (USB) or
VOUT (external wall power or high voltage regulator) is
removed, then all of the application power will be provided
LTC3557/LTC3557-1
14
35571fc
by the battery via the ideal diodes. The ideal diodes are
fast enough to keep VOUT from dropping with just the
recommended output capacitor. The ideal diode consists
of a precision amplifi er that enables an on-chip P-channel
MOSFET whenever the voltage at VOUT is approximately
15mV (VFWD) below the voltage at BAT. The resistance of
the internal ideal diode is approximately 200m. If this is
suffi cient for the application, then no external components
are necessary. However, if more conductance is needed,
an external P-channel MOSFET can be added from BAT
to VOUT
.
The GATE pin of the LTC3557/LTC3557-1 drives the gate of
the external P-channel MOSFET for automatic ideal diode
control. The source of the MOSFET should be connected
to VOUT and the drain should be connected to BAT. Capable
of driving a 1nF load, the GATE pin can control an external
P-channel MOSFET having extremely low on-resistance.
Using the WALL Pin to Detect the Presence of an
External Power Source
The WALL input pin can be used to identify the presence
of an external power source (particularly one that is not
subject to a fi xed current limit like the USB VBUS input).
Typically, such a power supply would be a 5V wall adapter
output or the low voltage output of a high voltage buck
regulator (specifi cally, LT3480, LT3481 or LT3505). When
the wall adapter output (or buck regulator output) is con-
nected directly to the WALL pin, and the voltage exceeds
the WALL pin threshold, the USB power path (from VBUS
to VOUT) will be disconnected. Furthermore, the ACPR pin
will be pulled low. In order for the presence of an external
power supply to be acknowledged, both of the following
conditions must be satisfi ed:
1. The WALL pin voltage must exceed approximately
4.3V.
2. The WALL pin voltage must exceed 75mV above the
BAT pin voltage.
The input power path (between VBUS and VOUT) is
re-enabled and the ACPR pin is pulled high when either
of the following conditions is met:
1. The WALL pin voltage falls to within 25mV of the BAT
pin voltage.
2. The WALL pin voltage falls below 3.2V.
Each of these thresholds is suitably fi ltered in time to
prevent transient glitches on the WALL pin from falsely
triggering an event.
See the Applications Information section for an explanation
of high voltage buck regulator control using the VC pin.
Suspend Mode
When ILIM0 is pulled low and ILIM1 is pulled high the
LTC3557/LTC3557-1 enters Suspend mode to comply
with the USB specifi cation. In this mode, the power path
between VBUS and VOUT is put in a high impedance state to
reduce the VBUS input current to 50µA. If no other power
source is available to drive WALL and VOUT
, the system
load connected to VOUT is supplied through the ideal diodes
connected to BAT. If an external power source drives WALL
and VOUT such that VOUT < VBUS, the Suspend mode VBUS
input current can be as high as 200µA.
3.3V Always-On Supply
The LTC3557/LTC3557-1 includes an ultralow quiescent
current low dropout regulator that is always powered. This
LDO can be used to provide power to a system pushbutton
controller or standby microcontroller. Designed to deliver
up to 25mA, the always-on LDO requires a 1µF MLCC
bypass capacitor for compensation. The LDO is powered
from VOUT
, and therefore will enter dropout at loads less
than 25mA as VOUT falls near 3.3V. If the LDO3V3 output is
not used, it should be disabled by connecting it to VOUT.
VBUS Undervoltage Lockout (UVLO)
An internal undervoltage lockout circuit monitors VBUS
and keeps the input current limit circuitry off until VBUS
rises above the rising UVLO threshold (3.8V) and at least
50mV above VOUT. Hysteresis on the UVLO turns off the
input current limit if VBUS drops below 3.7V or 50mV below
VOUT. When this happens, system power at VOUT will be
drawn from the battery via the ideal diode. To minimize the
possibility of oscillation in and out of UVLO when using
resistive input supplies, the input current limit is reduced
as VBUS drops below 4.45V typical.
OPERATION
LTC3557/LTC3557-1
15
35571fc
Battery Charger
The LTC3557/LTC3557-1 includes a constant current/con-
stant voltage battery charger with automatic recharge,
automatic termination by safety timer, low voltage trickle
charging, bad cell detection and thermistor sensor input
for out of temperature charge pausing.
When a battery charge cycle begins, the battery charger
fi rst determines if the battery is deeply discharged. If the
battery voltage is below VTRKL, typically 2.85V, an automatic
trickle charge feature sets the battery charge current to
10% of the programmed value. If the low voltage persists
for more than 1/2 hour, the battery charger automatically
terminates and indicates via the CHRG pin that the battery
was unresponsive.
Once the battery voltage is above 2.85V, the battery charger
begins charging in full power constant current mode. The
current delivered to the battery will try to reach 1000V/
RPROG. Depending on available input power and external
load conditions, the battery charger may or may not be
able to charge at the full programmed rate. The external
load will always be prioritized over the battery charge
current. The USB current limit programming will always
be observed and only additional current will be available
to charge the battery. When system loads are light, battery
charge current will be maximized.
Charge Termination
The battery charger has a built-in safety timer. When the
battery voltage approaches the fl oat voltage (4.2V for
LTC3557 or 4.1V for LTC3557-1), the charge current begins
to decrease as the LTC3557/LTC3557-1 enters constant
voltage mode. Once the battery charger detects that it
has entered constant voltage mode, the four hour safety
timer is started. After the safety timer expires, charging
of the battery will terminate and no more current will be
delivered.
Automatic Recharge
After the battery charger terminates, it will remain off
drawing only microamperes of current from the battery.
If the portable product remains in this state long enough,
the battery will eventually self discharge. To ensure that the
battery is always topped off, a charge cycle will automati-
cally begin when the battery voltage falls below VRECHRG
(typically 4.1V for the LTC3557 or 4V for LTC3557-1). In
the event that the safety timer is running when the battery
voltage falls below VRECHRG, the timer will reset back to
zero. To prevent brief excursions below VRECHRG from re-
setting the safety timer, the battery voltage must be below
VRECHRG for more than 1.3ms. The charge cycle and safety
timer will also restart if the VBUS UVLO cycles low and then
high (e.g., VBUS, is removed and then replaced).
Charge Current
The charge current is programmed using a single resistor
from PROG to ground. 1/1000th of the battery charge
current is delivered to PROG which will attempt to servo
to 1.000V. Thus, the battery charge current will try to reach
1000 times the current in the PROG pin. The program
resistor and the charge current are calculated using the
following equations:
RPROG =1000V
ICHG
, ICHG =1000V
RPROG
In either the constant current or constant voltage charging
modes, the PROG pin voltage will be proportional to the
actual charge current delivered to the battery. Therefore,
the actual charge current can be determined at any
time by monitoring the PROG pin voltage and using the
following equation:
IBAT =VPROG
RPROG
• 1000
In many cases, the actual battery charge current, IBAT
, will
be lower than ICHG due to limited input current available and
prioritization with the system load drawn from VOUT
.
Thermal Regulation
To prevent thermal damage to the IC or surrounding
components, an internal thermal feedback loop will
automatically decrease the programmed charge current
if the die temperature rises to approximately 110°C.
Thermal regulation protects the LTC3557/LTC3557-1
from excessive temperature due to high power operation
OPERATION
LTC3557/LTC3557-1
16
35571fc
OPERATION
or high ambient thermal conditions and allows the user
to push the limits of the power handling capability with a
given circuit board design without risk of damaging the
LTC3557/LTC3557-1 or external components. The benefi t
of the LTC3557/LTC3557-1 thermal regulation loop is that
charge current can be set according to actual conditions
rather than worst-case conditions with the assurance that
the battery charger will automatically reduce the current
in worst-case conditions.
Charge Status Indication
The CHRG pin indicates the status of the battery charger.
Four possible states are represented by CHRG which
include charging, not charging, unresponsive battery and
battery temperature out of range.
The signal at the CHRG pin can be easily recognized as
one of the above four states by either a human or a mi-
croprocessor. An open-drain output, the CHRG pin can
drive an indicator LED through a current limiting resistor
for human interfacing or simply a pull-up resistor for
microprocessor interfacing.
To make the CHRG pin easily recognized by both humans
and microprocessors, the pin is either a DC signal of
ON for charging, OFF for not charging, or it is switched
at high frequency (35kHz) to indicate the two possible
faults, unresponsive battery, and battery temperature
out of range.
When charging begins, CHRG is pulled low and remains
low for the duration of a normal charge cycle. When charg-
ing is complete, i.e., the charger enters constant voltage
mode and the charge current has dropped to one-tenth
of the programmed value, the CHRG pin is released (high
impedance). The CHRG pin does not respond to the C/10
threshold if the LTC3557/LTC3557-1 is in input current
limit. This prevents false end of charge indications due to
insuffi cient power available to the battery charger. If a fault
occurs, the pin is switched at 35kHz. While switching, its duty
cycle is modulated between a high and low value at a very
low frequency. The low and high duty cycles are disparate
enough to make an LED appear to be on or off thus giving
the appearance of “blinking”. Each of the two faults has its
own unique “blink” rate for human recognition as well as
two unique duty cycles for machine recognition.
Table 2: illustrates the four possible states of the CHRG
pin when the battery charger is active.
Table 2: CHRG Output Pin
STATUS FREQUENCY
MODULATION
(BLINK)
FREQUENCY DUTY CYCLE
Charging 0Hz 0Hz (Lo-Z) 100%
IBAT < C/10 0Hz 0Hz (Hi-Z) 0%
NTC Fault 35kHz 1.5Hz at 50% 6.25% or 93.75%
Bad Battery 35kHz 6.1Hz at 50% 12.5% or 87.5%
An NTC fault is represented by a 35kHz pulse train whose
duty cycle toggles between 6.25% and 93.75% at a 1.5Hz
rate. A human will easily recognize the 1.5Hz rate as a
“slow” blinking which indicates the out-of-range battery
temperature while a microprocessor will be able to decode
either the 6.25% or 93.75% duty cycles as an NTC fault.
If a battery is found to be unresponsive to charging (i.e., its
voltage remains below VTRKL, typically 2.8V, for 1/2 hour),
the CHRG pin gives the battery fault indication. For this
fault, a human would easily recognize the frantic 6.1Hz
“fast” blink of the LED while a microprocessor would be
able to decode either the 12.5% or 87.5% duty cycles as
a bad battery fault. Note that the LTC3557/LTC3557-1 is
a 3-terminal PowerPath product where system load is
always prioritized over battery charging. Due to excessive
system load, there may not be suffi cient power to charge
the battery beyond the trickle charge threshold voltage
within the bad battery timeout period. In this case, the
battery charger will falsely indicate a bad battery. System
software may then reduce the load and reset the battery
charger to try again.
Although very improbable, it is possible that a duty cycle
reading could be taken at the bright-dim transition (low
duty cycle to high duty cycle). When this happens the
duty cycle reading will be precisely 50%. If the duty cycle
reading is 50%, system software should disqualify it and
take a new duty cycle reading.
LTC3557/LTC3557-1
17
35571fc
OPERATION
NTC Thermistor
The battery temperature is measured by placing a negative
temperature coeffi cient (NTC) thermistor close to the bat-
tery pack. The NTC circuitry is shown in Figure 8. To use
this feature connect the NTC thermistor, RNTC, between
the NTC pin and ground and a bias resistor, RNOM, from
VNTC to NTC. RNOM should be a 1% resistor with a value
equal to the value of the chosen NTC thermistor at 25°C
(R25). A 100k thermistor is recommended since thermistor
current is not measured by the LTC3557/LTC3557-1 and
will have to be considered for USB compliance.
The LTC3557/LTC3557-1 will pause charging when the
resistance of the NTC thermistor drops to 0.54 times the
value of R25 or approximately 54k (for a Vishay “Curve 1”
thermistor, this corresponds to approximately 40°C). If the
battery charger is in constant voltage (fl oat) mode, the
safety timer also pauses until the thermistor indicates a
return to a valid temperature. As the temperature drops,
the resistance of the NTC thermistor rises. The LTC3557/
LTC3557-1 is also designed to pause charging when the
value of the NTC thermistor increases to 3.25 times the value
of R25. For a Vishay “Curve 1” thermistor this resistance,
325k, corresponds to approximately 0°C. The hot and cold
comparators each have approximately 3°C of hysteresis
to prevent oscillation about the trip point. Grounding the
NTC pin disables all NTC functionality.
General Purpose Step-Down Switching Regulators
The LTC3557/LTC3557-1 includes three 2.25MHz constant
frequency current mode step-down switching regulators
providing 400mA, 400mA and 600mA each. All step-down
switching regulators can be programmed for a minimum
output voltage of 0.8V and can be used to power a micro-
controller core, microcontroller I/O, memory or other logic
circuitry. All step-down switching regulators support 100%
duty cycle operation (low dropout mode) when the input
voltage drops very close to the output voltage and are also
capable of Burst Mode operation for highest effi ciencies at
light loads (Burst Mode operation is pin selectable). The
step-down switching regulators also include soft-start to
limit inrush current when powering on, short-circuit current
protection, and switch node slew limiting circuitry to reduce
EMI radiation. No external compensation components are
required for the switching regulators.
A single MODE pin sets all step-down switching regulators
in Burst Mode or pulse-skip mode operation, while each
regulator is enabled individually through their respective
enable pins (EN1, EN2 and EN3). It is recommended that
the step-down switching regulator input supplies (VIN1 and
VIN2) be connected to the system supply pin (VOUT). This
allows the undervoltage lock out circuit on the VOUT pin
(VOUT UVLO)to disable the step-down switching regulators
when the VOUT voltage drops below VOUT UVLO threshold.
If driving the step-down switching regulator input supplies
from a voltage other than VOUT the regulators should
not be operated outside the specifi ed operating range as
operation is not guaranteed beyond this range.
Step-Down Switching Regulator Output Voltage
Programming
Figure 2 shows the step-down switching regulator
application circuit. The full-scale output voltage for each
step-down switching regulator is programmed using a
resistor divider from the step-down switching regulator
output connected to the feedback pins (FB1, FB2 and
FB3) such that:
VOUTx =0.8V • R1
R2 +1
⎛
⎝
⎜⎞
⎠
⎟
Typical values for R1 are in the range of 40k to 1M. The
capacitor CFB cancels the pole created by feedback resistors
and the input capacitance of the FB pin and also helps
to improve transient response for output voltages much
greater than 0.8V. A variety of capacitor sizes can be used
for CFB but a value of 10pF is recommended for most
applications. Experimentation with capacitor sizes between
2pF and 22pF may yield improved transient response.
Figure 2. Buck Converter Application Circuit
PWM
CONTROL
VIN
0.8V
MN
MP
EN
MODE
SWx L
FBx
GND
CFB
COUT
VOUTx
R1
R2
35571 F02
LTC3557/LTC3557-1
18
35571fc
Step-Down Switching Regulator RST2 Operation
The RST2 pin is an open-drain output used to indicate that
step-down switching regulator 2 has been enabled and
has reached its fi nal voltage. A 230ms delay is included
from the time switching regulator 2 reaches 92% of its
regulation value to allow a system controller ample time to
reset itself. RST2 may be used as a power-on reset to the
microprocessor powered by regulator 2 or may be used to
enable regulators 1 and/or 3 for supply sequencing. RST2
is an open-drain output and requires a pull-up resistor to
the output voltage of regulator 2 or another appropriate
power source.
Step-Down Switching Regulator Operating Modes
The step-down switching regulators include two possible
operating modes to meet the noise/power needs of a
variety of applications.
In pulse-skip mode, an internal latch is set at the start of
every cycle, which turns on the main P-channel MOSFET
switch. During each cycle, a current comparator compares
the peak inductor current to the output of an error amplifi er.
The output of the current comparator resets the internal
latch, which causes the main P-channel MOSFET switch to
turn off and the N-channel MOSFET synchronous rectifi er
to turn on. The N-channel MOSFET synchronous rectifi er
turns off at the end of the 2.25MHz cycle or if the current
through the N-channel MOSFET synchronous rectifi er
drops to zero. Using this method of operation, the error
amplifi er adjusts the peak inductor current to deliver the
required output power. All necessary compensation is
internal to the step-down switching regulator requiring only
a single ceramic output capacitor for stability. At light loads
in pulse-skip mode, the inductor current may reach zero
on each pulse which will turn off the N-channel MOSFET
synchronous rectifi er. In this case, the switch node (SW1,
SW2 or SW3) goes high impedance and the switch node
voltage will “ring”. This is discontinuous operation, and is
normal behavior for a switching regulator. At very light loads
in pulse-skip mode, the step-down switching regulators
will automatically skip pulses as needed to maintain
output regulation. At high duty cycle (VOUTX > VINX/2) it is
possible for the inductor current to reverse at light loads
causing the stepped down switching regulator to operate
continuously. When operating continuously, regulation
and low noise output voltage are maintained, but input
operating current will increase to a few milliamps.
In Burst Mode operation, the step-down switching regula-
tors automatically switch between fi xed frequency PWM
operation and hysteretic control as a function of the load
current. At light loads the step-down switching regulators
control the inductor current directly and use a hysteretic
control loop to minimize both noise and switching losses.
While operating in Burst Mode operation, the output capaci-
tor is charged to a voltage slightly higher than the regulation
point. The step-down switching regulator then goes into
sleep mode, during which the output capacitor provides
the load current. In sleep mode, most of the switching
regulator’s circuitry is powered down, helping conserve
battery power. When the output voltage drops below a
pre-determined value, the step-down switching regulator
circuitry is powered on and another burst cycle begins. The
sleep time decreases as the load current increases. Beyond
a certain load current point (about 1/4 rated output load
current) the step-down switching regulators will switch to
a low noise constant frequency PWM mode of operation,
much the same as pulse-skip operation at high loads. For
applications that can tolerate some output ripple at low
output currents, Burst Mode operation provides better
effi ciency than pulse-skip at light loads.
The step-down switching regulators allow mode transition
on-the-fl y, providing seamless transition between modes
even under load. This allows the user to switch back and
forth between modes to reduce output ripple or increase
low current effi ciency as needed. Burst Mode operation is
set by driving the MODE pin high, while pulse-skip mode
is achieved by driving the MODE pin low.
Step-Down Switching Regulator in Shutdown
The step-down switching regulators are in shutdown
when not enabled for operation. In shutdown all circuitry
in the step-down switching regulator is disconnected from
the switching regulator input supply leaving only a few
nanoamps of leakage current. The step-down switching
regulator outputs are individually pulled to ground through
a 10k resistor on the switch pin (SW1, SW2 or SW3) when
in shutdown.
OPERATION
LTC3557/LTC3557-1
19
35571fc
Step-down Switching Regulator Dropout Operation
It is possible for a step-down switching regulator’s input
voltage to approach its programmed output voltage (e.g., a
battery voltage of 3.4V with a programmed output voltage
of 3.3V). When this happens, the PMOS switch duty cycle
increases until it is turned on continuously at 100%. In this
dropout condition, the respective output voltage equals the
regulator’s input voltage minus the voltage drops across
the internal P-channel MOSFET and the inductor.
Step-Down Switching Regulator Soft-Start Operation
Soft-start is accomplished by gradually increasing the peak
inductor current for each step-down switching regulator
over a 500s period. This allows each output to rise slowly,
helping minimize inrush current required to charge up the
switching regulator output capacitor. A soft-start cycle
occurs whenever a given switching regulator is enabled,
or after a fault condition has occurred (thermal shutdown
or UVLO). A soft-start cycle is not triggered by changing
operating modes. This allows seamless output transition
when actively changing between operating modes.
Step-Down Switching Regulator Switching
Slew Rate Control
The step-down switching regulators contain new patent-
pending circuitry to limit the slew rate of the switch node
(SW1, SW2 and SW3). This new circuitry is designed to
transition the switch node over a period of a couple nano-
seconds, signifi cantly reducing radiated EMI and conducted
supply noise while maintaining high effi ciency.
Step-Down Switching Regulator Low Supply Operation
An undervoltage lockout (UVLO) circuit on VOUT shuts
down the step-down switching regulators when VOUT drops
below about 2.7V. It is recommended that the step-down
switching regulators input supplies be connected to
the power path output (VOUT). This UVLO prevents the
step-down switching regulators’ from operating at low
supply voltages where loss of regulation or other un-
desirable operation may occur. If driving the step-down
switching regulator input supplies from a voltage other
than the VOUT pin, the regulators should not be operate
OPERATION
outside the specifi ed operating range as operation is not
guaranteed beyond this range.
Step-Down Switching Regulator Inductor Selection
Many different sizes and shapes of inductors are avail-
able from numerous manufacturers. Choosing the right
inductor from such a large selection of devices can be
overwhelming, but following a few basic guidelines will
make the selection process much simpler.
The step-down converters are designed to work with
inductors in the range of 2.2µH to 10µH. For most
applications a 4.7µH inductor is suggested for step-down
switching regulators providing up to 400mA of output
current while a 3.3µH inductor is suggested for step-down
switching regulators providing up to 600mA. Larger value
inductors reduce ripple current, which improves output
ripple voltage. Lower value inductors result in higher
ripple current and improved transient response time,
but will reduce the available output current. To maximize
effi ciency, choose an inductor with a low DC resistance.
For a 1.2V output, effi ciency is reduced about 2% for
100m series resistance at 400mA load current, and
about 2% for 300m series resistance at 100mA load
current. Choose an inductor with a DC current rating at
least 1.5 times larger than the maximum load current to
ensure that the inductor does not saturate during normal
operation. If output short circuit is a possible condition,
the inductor should be rated to handle the maximum peak
current specifi ed for the step-down converters.
Different core materials and shapes will change the size/cur-
rent and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or Permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
electrical characteristics. Inductors that are very thin or
have a very small volume typically have much higher
core and DCR losses, and will not give the best effi ciency.
The choice of which style inductor to use often depends
more on the price vs size, performance, and any radiated
EMI requirements than on what the step-down switching
regulators requires to operate.
LTC3557/LTC3557-1
20
35571fc
OPERATION
The inductor value also has an effect on Burst Mode
operation. Lower inductor values will cause Burst Mode
switching frequency to increase.
Table 3 shows several inductors that work well with the
step-down switching regulators. These inductors offer a
good compromise in current rating, DCR and physical
size. Consult each manufacturer for detailed information
on their entire selection of inductors.
Step-Down Switching Regulator Input/Output
Capacitor Selection
Low ESR (equivalent series resistance) ceramic capacitors
should be used at both step-down switching regulator
outputs as well as at each step-down switching regulator
input supply. Only X5R or X7R ceramic capacitors should
be used because they retain their capacitance over wider
voltage and temperature ranges than other ceramic types.
A 10F output capacitor is suffi cient for the step-down
switching regulator outputs. For good transient response
and stability the output capacitor for step-down switching
regulators should retain at least 4F of capacitance over
operating temperature and bias voltage. Each switching
regulator input supply should be bypassed with a 2.2F
capacitor. Consult with capacitor manufacturers for
detailed information on their selection and specifi cations
of ceramic capacitors. Many manufacturers now offer
very thin (<1mm tall) ceramic capacitors ideal for use in
height-restricted designs. Table 4 shows a list of several
ceramic capacitor manufacturers.
Table 4. Ceramic Capacitor Manufacturers
AVX www.avxcorp.com
Murata www.murata.com
Taiyo Yuden www.t-yuden.com
Vishay Siliconix www.vishay.com
TDK www.tdk.com
Table 3. Recommended Inductors for Step-Down Switching Regulators
INDUCTOR TYPE L (μH) MAX IDC (A) MAX DCR (Ω)
SIZE in mm
(L × W × H) MANUFACTURER
DE2818C
D312C
DE2812C
4.7
3.3
4.7
3.3
4.7
3.3
1.25
1.45
0.79
0.90
1.2
1.4
0.072
0.053
0.24
0.20
0.13*
0.105*
3.0 × 2.8 × 1.8
3.0 × 2.8 × 1.8
3.6 × 3.6 × 1.2
3.6 × 3.6 × 1.2
3.0 × 2.8 × 1.2
3.0 × 2.8 × 1.2
Toko
www.toko.com
CDRH3D16
CDRH2D11
CLS4D09
4.7
3.3
4.7
3.3
4.7
0.9
1.1
0.5
0.6
0.75
0.11
0.085
0.17
0.123
0.19
4.0 × 4.0 × 1.8
4.0 × 4.0 × 1.8
3.2 × 3.2 × 1.2
3.2 × 3.2 × 1.2
4.9 × 4.9 × 1.0
Sumida
www.sumida.com
SD3118
SD3112
SD12
SD10
4.7
3.3
4.7
3.3
4.7
3.3
4.7
3.3
1.3
1.59
0.8
0.97
1.29
1.42
1.08
1.31
0.162
0.113
0.246
0.165
0.117*
0.104*
0.153*
0.108*
3.1 × 3.1 × 1.8
3.1 × 3.1 × 1.8
3.1 × 3.1 × 1.2
3.1 × 3.1 × 1.2
5.2 × 5.2 × 1.2
5.2 × 5.2 × 1.2
5.2 × 5.2 × 1.0
5.2 × 5.2 × 1.0
Cooper
www.cooperet.com
LPS3015 4.7
3.3
1.1
1.3
0.2
0.13
3.0 × 3.0 × 1.5
3.0 × 3.0 × 1.5
Coil Craft
www.coilcraft.com
*Typical DCR
LTC3557/LTC3557-1
21
35571fc
APPLICATIONS INFORMATION
External HV Buck Control Through the VC Pin
The WALL, ACPR and VC pins can be used in conjunction
with an external high voltage buck regulator such as the
LT
®
3480, LT3481 or LT3505 to provide power directly
to the VOUT pin through a power P-channel MOSFET as
shown in Figures 3-5 (consult the factory for a complete
list of approved high voltage buck regulators). When the
WALL pin voltage exceeds 4.3V, VC pin control circuitry
is enabled and drives the VC pin of the LT3480, LT3481 or
LT3505. The VC pin control circuitry is designed so that no
compensation components are required on the VC node.
The voltage at the VOUT pin is regulated to the larger of
(BAT + 300mV) or 3.6V as shown in Figures 6 and 7. The
feedback network of the high voltage regulator should be
set to generate an output voltage higher than 4.4V (be sure
to include the output voltage tolerance of the buck regula-
tor). The VC control of the LTC3557 overdrives the local
VC control of the external high voltage buck. Therefore,
once the VC control is enabled, the output voltage is set
independent of the buck regulator feedback network.
VIN
2
3
DFLS240L
0.47µF
22µF
COUT
VOUT
UP TO
2A
BAT
35571 F03
Li-Ion
Si2333DS
Si2333DS
(OPT)
6.8µH
4
5
6
7
NC
NC
10
BOOST
VC
26 3 25
23
21
22
LTC3557
LTC3557-1
WALL ACPR
GATE
VOUT
BAT
RUN/SS
150k
40.2k
68nF
4.7µF
HVIN
8V TO 38V
(TRANSIENTS
TO 60V)
499k
100k
SW
RT
1
BD 8
11 9
FB
LT3480
LT3480
HIGH VOLTAGE
BUCK CIRCUITRY
GND VC
+
VIN
2
3
7DFLS240L
0.47µF
22µF
COUT
UP TO
2A
VOUT
BAT
35571 F04
Li-Ion
Si2333DS
Si2333DS
(OPT)
6.8µH
4
5
6
NC
10
BOOST
VC
26 3 25
23
21
22
LTC3557
LTC3557-1
WALL ACPR
GATE
VOUT
BAT
RUN/SS
150k
60.4k
68nF
4.7µF
HVIN
8V TO 34V
549k
200k
SW
RTBIAS
1
BD 8
11 9
FB
LT3481
LT3481
HIGH VOLTAGE
BUCK CIRCUITRY
GND VC
+
Figure 3. LT3480 Buck Control Using VC (800kHz Switching)
Figure 4. LT3481 Buck Control Using VC (800kHz Switching)
LTC3557/LTC3557-1
22
35571fc
APPLICATIONS INFORMATION
This technique provides a signifi cant effi ciency advantage
over the use of a 5V buck to drive the battery charger. With
a simple 5V buck output driving VOUT
, battery charger
effi ciency is approximately:
ηCHARGER =η
BUCK •VBAT
5V
where ηBUCK is the effi ciency of the high voltage buck
regulator and 5V is the output voltage of the buck regulator.
With a typical buck effi ciency of 87% and a typical battery
voltage of 3.8V, the total battery charger effi ciency is
approximately 66%. Assuming a 1A charge current, this
works out to nearly 2W of power dissipation just to charge
the battery!
With the VC control technique, battery charger effi ciency
is approximately:
ηCHARGER =η
BUCK •VBAT
0.3V +VBAT
With the same assumptions as above, the total battery
charger effi ciency is approximately 81%. This example
works out to just 900mW of power dissipation. For
applications, component selection and board layout
information beyond those listed here please refer to the
respective LT3480, LT3481 or LT3505 data sheet.
VIN
RT
1
2
MBRM140
0.1µF
10µF
COUT
UP TO
1.2A
VOUT
BAT
35571 F05
Li-Ion
Si2333DS
Si2333DS
(OPT)
6.8µH
1N4148
3
4
6
BOOST
VC
26 3 25
23
21
22
LTC3557
LTC3557-1
WALL ACPR
GATE
VOUT
BAT
SHDN
150k
806k
BZT52C16T
20k
68nF
1µF
HVIN
8V TO 36V
49.9k
10.0k
SW
7
5, 9 8
FB
LT3505
LT3505
HIGH VOLTAGE
BUCK CIRCUITRY
GND VC
+
Figure 5. LT3505 Buck Control Using VC (2.2MHz Switching with Frequency Foldback)
BAT (V)
2.5
VOUT (V)
3.5
4.0
4.5
35571 F06
3.0
2.5 33.5 4
5.0
4.5
IO = 0.0A
IO = 0.75A
IO = 1.5A
BAT
BAT (V)
2.5
VOUT (V)
3.5
4.0
4.5
35571 F07
3.0
2.5 33.5 4
5.0
4.5
IO = 0.0A
IO = 0.6A
BAT
Figure 6. LTC3557 VOUT Voltage vs Battery Voltage
with the LT3480
Figure 7. LTC3557-1VOUT Voltage vs Battery Voltage
with the LT3505
LTC3557/LTC3557-1
23
35571fc
Alternate NTC Thermistors and Biasing
The LTC3557/LTC3557-1 provides temperature qualifi ed
charging if a grounded thermistor and a bias resistor
are connected to NTC. By using a bias resistor whose
value is equal to the room temperature resistance of
the thermistor (R25) the upper and lower temperatures
are pre-programmed to approximately 40°C and 0°C,
respectively (assuming a Vishay “Curve 1” thermistor).
The upper and lower temperature thresholds can be
adjusted by either a modifi cation of the bias resistor value
or by adding a second adjustment resistor to the circuit.
If only the bias resistor is adjusted, then either the upper
or the lower threshold can be modifi ed but not both. The
other trip point will be determined by the characteristics
of the thermistor. Using the bias resistor in addition to
an adjustment resistor, both the upper and the lower
temperature trip points can be independently programmed
with the constraint that the difference between the upper and
lower temperature thresholds cannot decrease. Examples
of each technique are given below.
NTC thermistors have temperature characteristics which
are indicated on resistance-temperature conversion tables.
The Vishay-Dale thermistor NTHS0603N011-N1003F, used
in the following examples, has a nominal value of 100k
and follows the Vishay “Curve 1” resistance-temperature
characteristic.
In the explanation below, the following notation is used.
R25 = Value of the Thermistor at 25°C
RNTC|COLD = Value of thermistor at the cold trip point
RNTC|HOT = Value of the thermistor at the hot trip
point
rCOLD = Ratio of RNTC|COLD to R25
rHOT= Ratio of RNTC|HOT to R25
RNOM = Primary thermistor bias resistor (see Figure 8)
R1 = Optional temperature range adjustment resistor
(see Figure 9)
The trip points for the LTC3557/LTC3557-1’s temperature
qualifi cation are internally programmed at 0.349 • VVNTC
for the hot threshold and 0.765 • VVNTC for the cold
threshold.
Therefore, the hot trip point is set when:
RNTC|HOT
RNOM +RNTC|HOT
•V
VNTC =0.349 • VVNTC
and the cold trip point is set when:
RNTC|COLD
RNOM +RNTC|COLD
•V
VNTC =0.765 • VVNTC
Solving these equations for RNTC|COLD and RNTC|HOT results
in the following:
R
NTC|HOT = 0.536 • RNOM
and
R
NTC|COLD = 3.25 • RNOM
By setting RNOM equal to R25, the above equations result
in rHOT = 0.536 and rCOLD = 3.25. Referencing these ratios
to the Vishay Resistance-Temperature Curve 1 chart gives
a hot trip point of about 40°C and a cold trip point of about
0°C. The difference between the hot and cold trip points
is approximately 40°C.
By using a bias resistor, RNOM, different in value from
R25, the hot and cold trip points can be moved in either
direction. The temperature span will change somewhat due
to the non-linear behavior of the thermistor. The following
equations can be used to easily calculate a new value for
the bias resistor:
RNOM =rHOT
0.536 •R25
RNOM =rCOLD
3.25 •R25
where rHOT and rCOLD are the resistance ratios at the
desired hot and cold trip points. Note that these equations
are linked. Therefore, only one of the two trip points can
be chosen, the other is determined by the default ratios
designed in the IC. Consider an example where a 60°C
hot trip point is desired.
APPLICATIONS INFORMATION
LTC3557/LTC3557-1
24
35571fc
From the Vishay Curve 1 R-T characteristics, rHOT is
0.2488 at 60°C. Using the above equation, RNOM should
be set to 46.4k. With this value of RNOM, the cold trip
point is about 16°C. Notice that the span is now 44°C
rather than the previous 40°C. This is due to the decrease
in “temperature gain” of the thermistor as absolute
temperature increases.
The upper and lower temperature trip points can be
independently programmed by using an additional bias
resistor as shown in Figure 9. The following formulas can
be used to compute the values of RNOM and R1:
RNOM =rCOLD –r
HOT
2.714 •R25
R1=0.536 •RNOM –r
HOT •R25
For example, to set the trip points to 0°C and 45°C with
a Vishay Curve 1 thermistor choose
RNOM =3.266 – 0.4368
2.714 • 100k =104.2k
the nearest 1% value is 105k.
R1 = 0.536 • 105k – 0.4368 • 100k = 12.6k
the nearest 1% value is 12.7k. The fi nal solution is shown
in Figure 9 and results in an upper trip point of 45°C and
a lower trip point of 0°C.
Battery Charger Stability Considerations
The LTC3557/LTC3557-1’s battery charger contains both a
constant voltage and a constant current control loop. The
constant voltage loop is stable without any compensation
when a battery is connected with low impedance leads.
Excessive lead length, however, may add enough series
inductance to require a bypass capacitor of at least 1µF from
BAT to GND. Furthermore, a 4.7µF capacitor in series with
a 0.2 to 1 resistor from BAT to GND is required to keep
ripple voltage low when the battery is disconnected.
High value, low ESR multilayer ceramic chip capacitors
reduce the constant voltage loop phase margin, possibly
resulting in instability. Ceramic capacitors up to 22µF may
be used in parallel with a battery, but larger ceramics should
be decoupled with 0.2 to 1 of series resistance.
In constant current mode, the PROG pin is in the feedback
loop rather than the battery voltage. Because of the
additional pole created by any PROG pin capacitance,
capacitance on this pin must be kept to a minimum. With
APPLICATIONS INFORMATION
Figure 8. Typical NTC Thermistor Circuit Figure 9. NTC Thermistor Circuit with Additional Bias Resistor
–
+
–
+
RNOM
100k
RNTC
100k
NTC
VNTC
18
0.017 • VVNTC
NTC_ENABLE
35571 F08
NTC BLOCK
TOO_COLD
TOO_HOT
0.765 • VVNTC
0.349 • VVNTC
–
+
19
–
+
–
+
RNOM
105k
RNTC
100k
R1
12.7k
NTC
VNTC
18
0.017 • VVNTC
NTC_ENABLE
35571 F09
TOO_COLD
TOO_HOT
0.765 • VVNTC
0.349 • VVNTC
–
+
19
NTC BLOCK
LTC3557/LTC3557-1
25
35571fc
APPLICATIONS INFORMATION
no additional capacitance on the PROG pin, the battery
charger is stable with program resistor values as high
as 25k. However, additional capacitance on this node
reduces the maximum allowed program resistor. The pole
frequency at the PROG pin should be kept above 100kHz.
Therefore, if the PROG pin has a parasitic capacitance,
CPROG, the following equation should be used to calculate
the maximum resistance value for RPROG:
RPROG ≤1
2π• 100kHz • CPROG
Printed Circuit Board Power Dissipation
Considerations
In order to be able to deliver maximum charge current
under all conditions, it is critical that the Exposed Pad on
the backside of the LTC3557/LTC3557-1 package is soldered
to a ground plane on the board. Correctly soldered to a
2500mm2 ground plane on a double-sided 1oz copper
board, the LTC3557/LTC3557-1 has a thermal resistance
(θJA) of approximately 37°C/W. Failure to make good
thermal contact between the Exposed Pad on the backside
of the package and an adequately sized ground plane will
result in thermal resistances far greater than 37°C/W.
The conditions that cause the LTC3557/LTC3557-1 to
reduce charge current due to the thermal protection
feedback can be approximated by considering the power
dissipated in the part. For high charge currents and a wall
adapter applied to VOUT
, the LTC3557/LTC3557-1 power
dissipation is approximately:
PD = (VOUT – BAT) • IBAT + PD(SW1) + PD(SW2) + PD(SW3)
where, PD is the total power dissipated, VOUT is the supply
voltage, BAT is the battery voltage and IBAT is the battery
charge current. PD(SWx) is the power loss by the step-down
switching regulators. The power loss for a step-down
switching regulator can be calculated as follows:
P
D(SWx) = (OUTx • IOUT) • (100 – Eff)/100
where OUTx is the programmed output voltage, IOUT is
the load current and Eff is the % effi ciency which can be
measured or looked up on an effi ciency graph for the
programmed output voltage.
It is not necessary to perform any worst-case power
dissipation scenarios because the LTC3557/LTC3557-1
will automatically reduce the charge current to maintain
the die temperature at approximately 110°C. However, the
approximate ambient temperature at which the thermal
feedback begins to protect the IC is:
T
A = 110°C – PD • θJA
Example: Consider the LTC3557/LTC3557-1 operating
from a wall adapter with 5V (VOUT) providing 1A (IBAT)
to charge a Li-Ion battery at 3.3V (BAT). Also assume
PD(SW1) = PD(SW2) = PD(SW3) = 0.05W, so the total power
dissipation is:
P
D = (5V – 3.3V) • 1A + 0.15W = 1.85W
The ambient temperature above which the LTC3557/
LTC3557-1 will begin to reduce the 1A charge current, is
approximately:
T
A = 110°C – 1.85W • 37°C/W = 42°C
The LTC3557/LTC3557-1 can be used above 42°C, but the
charge current will be reduced below 1A. The charge current
at a given ambient temperature can be approximated by:
PD=110°C–T
A
θJA
=VOUT – BAT
()
•IBAT +PD(SW1) +PD(SW 2) +PD(SW3)
thus:
IBAT =
110°C–T
A
θJA
−PD(SW1) –P
D(SW2) –P
D(SW3)
VOUT – BAT
Consider the above example with an ambient temperature of
55°C. The charge current will be reduced to approximately:
IBAT =
110°C–55°C
37°C/W −0.15W
5V – 3.3V
=1.49W – 0.15W
1.7V =786mA
LTC3557/LTC3557-1
26
35571fc
If an external buck switching regulator controlled by the
LTC3557/LTC3557-1 VC pin is used instead of a 5V wall
adapter we see a signifi cant reduction in power dissipated
by the LTC3557/LTC3557-1. This is because the external
buck switching regulator will drive the PowerPath output
(VOUT) to about 3.6V with the battery at 3.3V. If you go
through the example above and substitute 3.6V for VOUT
we see that thermal regulation does not kick in until about
93°C. Thus, the external regulator not only allows higher
charging currents, but lower power dissipation means a
cooler running application.
Printed Circuit Board Layout Considerations
When laying out the printed circuit board, the following
list should be followed to ensure proper operation of the
LTC3557/LTC3557-1:
1. The Exposed Pad of the package (Pin 29) should connect
directly to a large ground plane to minimize thermal and
electrical impedance.
2. The trace connecting the step-down switching regulator
input supply pins (VIN1 and VIN2) and their respective
decoupling capacitors should be kept as short as
possible. The GND side of these capacitors should
connect directly to the ground plane of the part. These
capacitors provide the AC current to the internal power
MOSFETs and their drivers. It’s important to minimize
inductance from these capacitors to the pins of the
LTC3557/LTC3557-1. Connect VIN1 and VIN2 to VOUT
through a short low impedance trace.
3. The switching power traces connecting SW1, SW2 and
SW3 to their respective inductors should be minimized
to reduce radiated EMI and parasitic coupling. Due to
the large voltage swing of the switching nodes, sensitive
nodes such as the feedback nodes (FB1, FB2 and FB3)
should be kept far away or shielded from the switching
nodes or poor performance could result.
4. Connections between the step-down switching regulator
inductors and their respective output capacitors should
be kept as short as possible. The GND side of the output
capacitors should connect directly to the thermal ground
plane of the part.
5. Keep the feedback pin traces (FB1, FB2 and FB3) as
short as possible. Minimize any parasitic capacitance
between the feedback traces and any switching node
(i.e., SW1, SW2, SW3 and logic signals). If necessary
shield the feedback nodes with a GND trace
6) Connections between the LTC3557/LTC3557-1
power path pins (VBUS and VOUT) and their respective
decoupling capacitors should be kept as short as pos-
sible. The GND side of these capacitors should connect
directly to the ground plane of the part. VOUT should be
decoupled with a 10µF or greater ceramic capacitor as
close as possible to the LTC3557/LTC3557-1.
APPLICATIONS INFORMATION
LTC3557/LTC3557-1
27
35571fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
TYPICAL APPLICATION
VIN
68nF
10µF
2.2µF
2.2µF
40.2k
4.7µF 0.47µF
22µF
6.8µH
3.3µH
4.7µH
4.7µH
OPTIONAL HIGH VOLTAGE
BUCK INPUT
DFLS240L
HVIN
8V TO 38V
(TRANSIENTS
TO 60V) 150k
499k
510
Li-Ion
3.3V
25mA
ALWAYS ON
100k
Si2333DS
Si2333DS
(OPT)
2.1k
BOOST
42
RUN/SS SW
LT3480
GND VC
VCWALL ACPR
VBUS VOUT
5
RT
10
PG
11 9
26
10µF
1µF
VOUT
BAT
VOUT1
3.3V
600mA
3
24
CLPROG
BVIN1
27
2k
100k
PROG
20
VNTC
NTC
LTC3557/
LTC3557-1
18
19
ILIM0
1
ILIM1
2
EN1
9
EN2
10
EN3
11
MODE
8
100k
NTC
PMIC
CONTROL
USB OR
5V WALL
ADAPTER
23
6
BVIN2
16
CHRG 28
GATE 21
LDO3V3 4
SW1 5
FB1 7
BAT 22
25
BDSYNC
FBNC 7
NC 6
3
1
8
+
1.02M 324k
10pF 10µF
VOUT3
1.8V
400mA
SW3 17
FB3 12 806k 649k
10pF 10µF
VOUT2
1.2V
400mA
SW2 15
RST2 14
FB2
GND
13
29
232k
100k
RST2
464k
10pF 10µF
35571 TA02
LTC3557/LTC3557-1
28
35571fc
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2007
LT 0808 REV C • PRINTED IN USA
PART NUMBER DESCRIPTION COMMENTS
Power Management
LTC3455 Dual DC/DC Converter with USB Power Management and
Li-Ion Battery Charger
Effi ciency >96%, Accurate USB Current Limiting (500mA/100mA),
4mm × 4mm 24-Pin QFN Package
LTC3456 2-Cell Multi-Output DC/DC Converter with USB Power
Manager
Seamless Transition Between 2-Cell Battery, USB and AC Wall Adapter
Input Power Sources, QFN Package
LTC3555 Switching USB Power Manager with Li-Ion/Polymer
Charger, Triple Synchronous Buck Converter + LDO
Complete Multifunction PMIC: Switch Mode Power Manager and Three
Buck Regulators + LDO, Charge Current Programmable up to 1.5A from
Wall Adapter Input, Thermal Regulation Synchronous Buck Converters
Effi ciency: >95%, ADJ Outputs: 0.8V to 3.6V at 400mA/400mA/1A
Bat-Track Adaptive Output Control, 200m Ideal Diode, 4mm × 5mm
28-Pin QFN Package
LTC3559 Linear USB Li-Ion/Polymer Battery Charger with Dual
Synchronous Buck Converter
Adjustable Synchronous Buck Converters, Effi ciency: >90%, Outputs:
Down to 0.8V at 400mA for each, Charge Current Programmable up to
950mA, USB Compatible, 3mm × 3mm 16-Pin QFN Package
Battery Chargers
LTC4055 USB Power Controller and Battery Charger Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal
Regulation, 200m Ideal Diode, 4mm × 4mm 16-Pin QFN Package
LTC4066 USB Power Controller and Li-Ion Battery Charger with
Low Loss Ideal Diode
Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal
Regulation, 50m Ideal Diode, 4mm × 4mm 24-Pin QFN Package
LTC4085 USB Power Manager with Ideal Diode Controller and
Li-Ion Charger
Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal
Regulation, 200m Ideal Diode with <50m Option, 4mm × 3mm
14-Pin DFN Package
LTC4088 High Effi ciency USB Power Manager and Battery Charger Maximizes Available Power from USB Port, Bat-Track, “Instant On”
Operation, 1.5A Max Charge Current, 180m Ideal Diode with <50m
Option, 3.3V/25mA Always On LDO, 4mm × 3mm 14-Pin DFN Package
LTC4089/LTC4089-5 USB Power Manager with Ideal Diode Controller and
High Effi ciency Li-Ion Battery Charger
1.2A Charger, 6V to 36V (40VMAX), 200m Ideal Diode with 50m
Option, 6mm × 3mm 22-Pin DFN Package
RELATED PARTS
4.00 p 0.10
(4 SIDES)
S NOT A JEDEC PACKAGE OUTLINE
N
OT TO SCALE
S
IONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE, IF PRESENT
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.40 p 0.05
2827
1
2
BOTTOM VIEW—EXPOSED PAD
2.64 p 0.10
(4-SIDES)
0.75 p 0.05 R = 0.115
TYP
0.20 p 0.05
0.40 BSC
0.200 REF
0.00 – 0.05
(UF28) QFN 0106 REVA
DED SOLDER PAD PITCH AND DIMENSIONS
R MASK TO AREAS THAT ARE NOT SOLDERED
0.70 p0.05
0.20 p0.05
0.40 BSC
PACKAGE
OUTLINE
PIN 1 NOTCH
R = 0.20 TYP
OR 0.35 s 45o
CHAMFER
R = 0.05
TYP
PACKAGE DESCRIPTION
UF Package
28-Lead Plastic QFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1721 Rev A)