Preconditioning of SMT Packages Introduction National Semiconductor, as an integrated circuit manufacturer, is compelled to provide high quality, reliable surface mount components to many industries such as automotive, telecommunications, avionics, and computing. The integrated circuit components are subjected to one common process of surface mounting. Surface mounting entails placing components on a printed circuit board (PCB) with flux, and then passing these boards through a furnace to a temperature great enough to melt the solder on the leads. Upon cooling the solder solidifies, attaching the components to the PCB. The surface mount process may seem simple, but many problems can arise. For instance, moisture absorbed by the plastic packages can induce cracking. Such cracking is caused by extreme internal pressure created by moisture vaporizing under the hot temperature of solder reflow conditions. Once cracked, the surface mount package reliability is compromised, leading to potential corrosion of the device by moisture and ionic contaminants. Start Electrical Test TMCL: 5 cycles -40/+60C Bake: 16 hours at 125C Moisture soak (see Table 1) Solder Reflow (see Tables 2 & 3): 3 passes Vapor Phase or 3 passes Convection/IR Preconditioning and Reliability Preconditioning is a simulation of the surface mount process that is typically done at the PCB assembly houses. At National Semiconductor preconditioning is done prior to the following reliability tests: temperature-humidity bias, autoclave, and temperature cycle. The preconditioning flow that is used is given in Figure 1. The moisture soak conditions for preconditioning are dependant on the moisture sensitivity level (MSL), as defined by the JEDEC/IPC joint industry standard, J-STD-020A. These soak conditions are given in Table 1. Flux Immersion Room Temperature, 10 seconds Rinse & Dry Electrical Test Reliability Testing FIGURE 1. Preconditioning Flow for Surface Mount Packages TABLE 1. Preconditioning Soak Requirements Moisture Sensitivity Level (MSL) Standard Soak Conditions Accelerated Soak Conditions Customer Floor Life 1 85C/85% RH, 168 hr Same as standard 2 85C/60% RH, 168 hr Same as standard Unlimited 1 year 2a 30C/60% RH, 840 hr (Note 1) 60C/60% RH, 150 hr (Note 1) 4 weeks 3 30C/60% RH, 336 hr (Note 1) 60C/60% RH, 70 hr (Note 1) 168 hours 4 30C/60% RH, 96 hr(Note 2) 60C/60% RH, 20 hr(Note 2) 72 hours Note 1: A Manufacturer's Exposure Time (MET) of 7 days is assumed for Levels 2a and 3. Note that this differs from the default value of 24 hours given in J-STD-020A. Note 2: An MET of 24 hours is assumed for Level 4. For a given reflow profile, the small packages on the PCB will reach a higher peak temperature than the large packages on the same PCB. This difference in peak temperature (c) 2000 National Semiconductor Corporation MS011825 is due to the fact that the large packages have greater thermal mass (heat capacity) than the small packages; thus their temperature rise is more limited. For preconditioning, the www.national.com Preconditioning of SMT Packages August 1999 Preconditioning of SMT Packages large packages are reflowed at a peak body temperature of 220C (or 215-219C if vapor phase reflow is used), whereas the small packages are reflowed at a peak temperature of 235C. Table 2 defines the peak temperature used for the various packages at National Semiconductor. Table 3 defines the details of the reflow profiles for each of the two possible peak reflow temperatures and for each of the two reflow methods. TABLE 2. Peak Reflow Temperatures Peak Reflow Temperature Package Types 220C (+5/-0C) - Conv./IR or 215 - 219C - VPR PQFP/TQFP 2mm thick OR 20x20mm body size, PLCC, SO /= 300 mil wide, SOJ 20 leads, PBGA, Multi-chip Packages 235C (+5/-0C) - Conv./IR PQFP/TQFP < 2mm thick AND < 20x20mm body size, SO < 300 mil width, SO-EIAJ, TSOP, TSSOP, SSOP, TO-263, SOT, MSOP, SC-70, CSP Note 3: Conv./IR refers to convection/infrared reflow; VPR refers to Vapor Phase Reflow TABLE 3. Reflow Profiles Convection or IR/Convection Average ramp-up rate (183C to Peak) 3C/second max Preheat temperature 125( 25)C 120 seconds max VPR (Note 4) 10C/second max Temperature maintained above 183C 60-150 seconds Time within 5C of actual peak temperature 10-20 seconds 60 seconds Peak temperature range 220 +5/-0C or 235 +5/-0C 215 - 219C Ramp-down rate 6C /second max 10C/second max Time 25C to peak temperature 6 minutes max Note 4: At National Semiconductor Vapor Phase Reflow (VPR) is only used for packages requiring the lower peak reflow temperature (see Table 3). LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com www.national.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Francais Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: sea.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.