TMS2732A 32,768-BIT UV ERASABLE PROGRAMMABLE READ-ONLY MEMORY Organization... 4096 x 8 Single 5-V Power Supply Max Access/Min Cycle Times TMS2732A-17. 170 ns TMS2732A-20 200 ns TMS2732A-25 250 ns TMS2732A-45 450 ns All Inputs/Outputs Fuly TTL Compatible @ Low Standby Power Dissipation .. . 158 mW (Maximum) @ JEDEC Approved Pinout... Standard @ 21-V Power Supply Required for Programming @ N-Channel Silicon-Gate Technology @ PEP4 Version Available with 168 Hour Burn-in, and Extended Guaranteed Operating Temperature Range from 10C to 85C (TMS2732A-_ _JP4) description Industry AUGUST 1983REVISED FEBRUARY 1988 J PACKAGE (TOP VIEW) A7(]1 V2aQ vec A6qj2 230s as(j3 22Djag A4f]4 21f}ait A3(]5 20f]G/vpp A2(]6 Bia AiQ77 18DE Aot}s 1708 aifj9 16fja7 Q2[j10 15)[Ja6 o3{]11 14705 GND (J12 130} 04 PIN NOMENCLATURE A0-A11 E Gvpp GND Q1-08 Vec Address Inputs Chip Enable Output Enable/21 V Ground Outputs 5-V Power Supply EPROMs/PROMs/EEPROMs The TMS2732A is an ultraviolet light-erasable, electrically programmable read-only memory. it has 32,768 bits organized as 4,096 words of 8-bit length. The TMS2732A only requires a single 5-volt power supply with a tolerance of +5%. The TMS2732A provides two output control lines: Output Enable (G/Vpp) and Chip Enable (E). This feature allows the G/Vpp control line to eliminate bus contention in multibus microprocessor systems. The TMS2732A has a power-down mode that reduces maximum power dissipation from 657 mW to 158 mW when the device is placed on standby. This EPROM is supplied in a 24-pin dual-in-line ceramic package and is designed for operation from 0C to 70C. The TMS2732A is also offered in the PEP4 version with an extended guaranteed operating temperature range of 10C to 85C and 168 hour burn-in (TMS2732A-_ _JP4). PRODUCTION DATA documents contain information current es of date. Products conform te specifications per the torms ef Texas Instruments stendard warranty. Production processing dees net necessarily include testing of all parameters. % TEXAS INSTRUMENTS POST OFFICE BOX 1443 @ HOUSTON, TEXAS 77001 Copyright 1983, Texas Instruments Incorporated 6-13TMS2732A 32,768-BIT UV ERASABLE PROGRAMMABLE READ-ONLY MEMORY a SIWOYd33/SINOUd/SINOUdS operation The six modes of operation for the TMS2732A are listed in the following table. FUNCTION MODE (PINS) Output Power Down Program Program Inhibit Disable (Standby) Verification Programming E t v v v (18) ViL x VIH IL IL . Vi SVpp Vv Vv xt 21V v 21V (20) IL 1H It vec . 5 Vv 5vV 5V 5V 5Vv (24) V 8 1-08 (9 to 11, Q HI-Z Hi-Z D Qa HI-Z 13 to 17) TX = Vin or ViL read/output disable The two control pins (E and G/Vpp) must have low-level TTL signals in order to provide data at the outputs Chip enable (E) should be used for device selection. Output enable (G/Vpp) should be used to gate data to the output pins. power down The power-down mode reduces the maximum power dissipation from 657 mW to 158 mW. ATTL high-leve signal applied to E selects the power-down mode. In this mode, the outputs assume a high-impedance state independent of G/Vpp. The TMS2732A is erased by exposing the chip to shortwave ultraviolet light that has a wavelength of 253... nanometers (2537 angstroms). The recommended minimum exposure dose (UV intensity x exposure time is fifteen watt-seconds per square centimeter. The lamp should be located about 2.5 centimeters (1 inch above the chip during erasure. After erasure, all bits are at a high level. It should be noted that normal ambien light contains the correct wavelength for erasure. Therefore, when using the TMS2732A, the window shoul be covered with an opaque label. programming : Note that the application of a voltage in excess of 22 V to G/Vpp may damage the TMS2732A. After erasure (all bits in logic 1 state), logic Os are programmed into the desired locations. A logic O can ont be erased by ultraviolet light. In the program mode, G/Vppis taken froma TTLiow level to 21 V and data tob programmed are applied in parallel to output pins 1 -Q8. The location to be programmed is addressed. Onc data and addresses are stable, a 10-millisecond TTL low-level pulse is applied to E. The maximum width c this pulse is 11 milliseconds. The programming pulse must be applied ateach location that is to be programmec Locations may be programmed in any order. Several TMS2732As can be programmed simultaneously by connecting them in parallel and following th programming sequence previously described. program inhibit The program inhibitis useful when programming multipie TMS2732As connected in parallel with different date Program inhibit can be implemented by applying a high-level signal to Eof the device thatis not to be programme program verify . After the EPROM has been programmed, the programmed bits should be verified. To verify bit states, G/Vp and E are set to VIL. 6-14 TEXAS 4% INSTRUMENTS POST OFFICE BOX 1443 @ HOUSTON, TEXAS 77001TMS2732A 32,768-BIT UV ERASABLE PROGRAMMABLE READ-ONLY MEMORY logic symbolt (8) _ EPROM AO 7 | OY 4096 x 8 Al 6) a2 2) ' (5) avye@_ a1 A3 __ (10) (4) Av}- 02 Aa) ayy) a3 ABT A as $a2- a7 r 4095 av} as 6 ag 123) av- a (22) Av} 07 9 9) ave) a8 A10 A11 i 11) E 8) [PWR DWN] & _ (20) EN G/Vpp tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. B EPROMs/PROMs/EEPROMs absolute maximum ratings over operating free-air temperature range (unless otherwise noted)* Supply voltage range, VCC ... 2... ee ence eet eens Supply voltage range, Vpp .... 2.0.0... oe ee eens Input voltage range (except program) ...........0.- 0.2 ee eee Output voltage range .. 62... eet teen eeee Operating free-air temperature range ........... 2. cc eee eee eee eee Storage temperature range ........ 0... 0... eee eee e eens -0.3Vto7V -0.3 V to 22 V -0.3 to 7 V -0.3Vto7V OC to 70C -65C to. 150C *Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating. onty, and functional operation of the device at these or any other conditions beyond those indicated in the Recommended Operating aE Conditions section of this specification is not impli p to absol: T tated conditions for extended periods may affect device reliability. Exas INSTRUMENTS POST OFFICE BOX 1443 @ HOUSTON, TEXAS 77001SINOUd34/SINOUd/SINOUdS TMS2732A 32,768-BIT UV ERASABLE PROGRAMMABLE READ-ONLY MEMORY recommended operating conditions ; PARAMETER MIN NOM MAX UNIT Vcc Supply vottage (see Note 1) 4.75 6 5.25 Vv Vpp Supply voltage (see Note 2) : Vec Vv Vin High-level input voltage 2 Vcec+1 v Vit _ Low-level input voltage -0.1 0.8 Vv Ta Operating free-air temperature 0 70 c NOTES: 1. Vcc must be applied before or at the same time as Vpp and removed after or at the same time as Vpp. The device must not be inserted into or removed from the board when Vpp or Vcc is applied. 2. Vpp can be connected to Vcc directly (except in the program mode). Vcc supply current in this case would be Icc + \pp. During programming, Vpp must be maintained at 21 V (+0.5 V). electrical characteristics over full ranges of recommended operating conditions PARAMETER TEST CONDITIONS MIN MAX | UNIT Vou High-level output voltage lon = 400 pA 2.4 v VoL Low-level output voltage lo. = 2.1 mA 0.45 Vv \ Input current (leakage) Vy = 0 V to 5.25 V +10 BA lo Output current (leakage) Vo = 0.4 V to 5.25 V #10 pA Icc1 Vcc supply current (standby) E at Vin. G/Vpp at Vit 30 | mA Icc2 Vcc supply current (active) E and G/Vpp at Vit 125 | mA capacitance. over recommended supply voltage range and operating free-air temperature range, f = 1 MHz : PARAMETER TEST CONDITIONS . Typ? MAX |. UNIT Al Input capecitanc except G/Vpp y= ov 6 9 oF Givpp 20 Cg Output capacitance Vo = OV 8 12 pF tThese parameters are tested on sample basis only. tTypical vatues are at Ta = 25C and nominal voltages. switching characteristics over recommended supply voltage range and operating free-air temperature range P, METER TEST TMS2732A-17| TMS2732A-20] TMS2732A-25| TMS2732A-45| UNIT CONDITIONS MIN MAX | MIN MAX | MIN MAX] MIN MAX ta(A) time mn c = 100 oF, 170 200 250 450 ns t 7 a(E) ccess time from 1 Series 74 170 200 250 450 ns ten(G)_Output enable time from Givpp TTL load 65 70 100 150 | ns Output disable time from E , o 60 0 60 o 85 o 130] ns tdis . ' ty s 20ns, or G, whichever occurs first te s 20ns, Output data valid time after See Figure 1 ty(A} change of address, E, or G/Vpp, 9 0 0 0 ns . and Note 3 whichever occurs first NOTE 3: For all switching characteristics and timing measurements, input pulse levels are 0.40 V and 2.4 V. input and output reference levels are 0.8 V and 2.0 V. tvalue calculated from 0.5 V delta to measured output level. This parameter is only sampled, not 100% tested. 6-16 TEXAS % INSTRUMENTS POST OFFICE BOX 1443 HOUSTON, TEXAS 77001TMS2732A 32,768-BIT UV ERASABLE PROGRAMMABLE READ-ONLY MEMORY recommended conditions for programming, TA = 25C (see Note 4) input Low-level input E duration Address setup time Data setup time setup time Address hold time Data hold time hold time 2s time rise time ns Delay time, data valid after E iow 1 Hs NOTE 4: When programming the TMS2732A, connect a 0.1 xF capacitor between G/Vpp and GND to suppress spurious voltage transients which may damage the device. a EPROMs/PROMs/EEPROMs programming characteristics, Ta = 25C PARAMETER Low-level . (verify) Low-level output (verify) current (all Supply current current disable time 6-17 TEXAS INSTRUMENTS POST OFFICE BOX 1443 @ HOUSTON, TEXAS 77001A SINOYd33/SINOUd/SINOUd3 TMS2732A 32,768-BIT UV ERASABLE PROGRAMMABLE READ-ONLY MEMORY PARAMETER MEASUREMENT INFORMATION 2.09 V Ry = 7800 OUTPUT UNDER TEST = 100 pF FIGURE 1. TYPICAL OUTPUT LOAD CIRCUIT AC testing input/output wave forms L 2.4V Nos v n 2.0 V 0.40 V 0.8 Vv 08 Vv A.C. testing inputs are driven at 2.4 V for logic 1 and 0.4 V for logic 0. Timing measurements are made at 2.0 V for logic 1 and 0.8 V for logic O for both inputs and outputs. read cycle timing | VIH AO-A11 x ; ' Vit ho tyia}eo] \ ten) | nn VI Givpp a Vit ta(A) tdis Vou Q1-a8 T VoL standby mode ViK A0-A11 Vit X 4 Vit tdis eta(E} Vou Q1-a8 HI-Z VoL NOTE 3: For ali switching characteristics and timing measurements, input pulse levels are 0.40 V and 2.4 V. Input and output timing reference levels are 0.8 V and 2.0 V. 6-18 TEXAS % INSTRUMENTS POST OFFICE BOX 1443 @ HOUSTON, TEXAS 77001TMS2732A 32,768-BIT UV ERASABLE PROGRAMMABLE READ-ONLY MEMORY program cycle timing Vin @ A0-A11 ADDRESS N ADDRESS N+1 = ViL Vin/VoH a Q1-08 uw Vit/Vou a tdis(PR) y = Givpp PP Vit _ Vin = E Oo ViL & Ww NOTE 3: For all switching characteristics and timing measurements, input pulse levels are 0.40 V and 2.4 V. Input and output timing na teference levels are 0.8 V and 2.0 V. 6-19 TEXAS INSTRUMENTS POST OFFICE BOX 1443 HOUSTON, TEXAS 77001