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PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 2001-2004, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
FEATURES
●4-WIRE TOUCH SCREEN INTERFACE AND
4-BY-4 KEYPAD INTERFACE
●RATIOMETRIC CONVERSION
●SINGLE 2.7V TO 3.6V SUPPLY
●SERIAL INTERFACE
●INTERNAL DETECTION OF SCREEN TOUCH
AND KEYPAD
●PROGRAMMABLE 8-, 10-, OR 12-BIT
RESOLUTION
●PROGRAMMABLE SAMPLING RATES
●DIRECT BATTERY MEASUREMENT (0.5V to 6V)
●ON-CHIP TEMPERATURE MEASUREMENT
●TOUCH-PRESSURE MEASUREMENT
●FULL POWER-DOWN CONTROL
●TSSOP-28 AND QFN-32 PACKAGES
APPLICATIONS
●PERSONAL DIGITAL ASSISTANTS
●CELLULAR PHONES
●MP3 PLAYERS
PDA ANALOG INTERFACE CIRCUIT
DESCRIPTION
The TSC2200 is a complete PDA analog interface circuit. It
contains a complete 12-bit, Analog-to-Digital (A/D) resistive
touch screen converter including drivers, the control to mea-
sure touch pressure, keyboard controller, and an 8-bit Digital-
to-Analog (D/A) converter output for LCD contrast control.
The TSC2200 interfaces to the host controller through a
standard SPI™ serial interface. The TSC2200 offers program-
mable resolution and sampling rates from 8- to 12-bits and up
to 125kHz to accommodate different screen sizes.
The TSC2200 also offers two battery-measurement inputs
capable of reading battery voltages up to 6V, while operating
at only 2.7V. It also has an on-chip temperature sensor
capable of reading 0.3°C resolution. The TSC2200 is available
in a TSSOP-28 and a QFN-32 package.
TSC2200
SBAS191F – FEBRUARY 2001 – REVISED APRIL 2004
SPI is a registered trademark of Motorola.
US Patent No. 624639.
A/D Converter
Internal 2.5V
Reference
MUX
Serial
Interface
and
Control
Logic
D/A Converter
MISO
SS
SCLK
MOSI
DAV
PENIRQ
KBIRQ
Touch Panel
Drivers
Temp Sensor
Battery Monitor
Battery Monitor
X+
X–
Y+
Y–
VBAT1
VBAT2
Clock
AUX1
AUX2
VREF
ARNG
AOUT
Keyboard Scanner
and State Control
C1 C2 C3 C4 R1 R2 R3 R4
TSC2200
TSC2200
2www.ti.com TSC2200
SBAS191F
ABSOLUTE MAXIMUM RATINGS(1)
VDD to GND........................................................................ –0.3V to +6.0V
VBAT Input Voltage to GND ............................................... –0.3V to +6.0V
Analog Input Voltage to GND (except VBAT) ........... –0.3V to VDD + 0.3V
Digital Input Voltage to GND ................................... –0.3V to VDD + 0.3V
Operating Temperature Range ......................................–40°C to +105°C
Storage Temperature Range .........................................–65°C to +150°C
Junction Temperature (TJ Max) .................................................... +150°C
TSSOP Package
Power Dissipation.................................................... (TJ Max – TA)/
θ
JA
θ
JA Thermal Impedance .......................................................... 90°C/W
Lead Temperature, Soldering
Vapor Phase (60s) ............................................................ +215°C
Infrared (15s)..................................................................... +220°C
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
INTEGRAL SPECIFIED
LINEARITY PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT
PRODUCT ERROR (LSB) PACKAGE-LEAD
DESIGNATOR
(1)
RANGE MARKING NUMBER MEDIA, QUANTITY
TSC2200 ±2 TSSOP-28 PW –40°C to +85°C TSC2200I TSC2200IPW Rails, 50
"" " " " "TSC2200IPWR Tape and Reel, 2000
TSC2200 ±2 QFN-32 RHB –40°C to +85°C TSC2200I TSC2200IRHB Tubes, 72
"" " " " "TSC2200IRHBR Tape and Reel, 2500
NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper han-
dling and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
TIMING DIAGRAM
All specifications typical at –40°C to +85°C, +VDD = +2.7V.
t
td
t
Lag
t
dis
t
Lead
t
sck
t
wsck
t
wsck
t
hi
t
su
t
ho
t
a
t
v
t
r
t
f
SS
SCLK
MSB OUT
MSB IN LSB IN
LSB OUTBIT 6 ... 1
BIT 6 ... 1
MISO
MOSI
PARAMETER CONDITIONS MIN TYP MAX UNITS
SCLK Period tsck 30 ns
Enable Lead Time tLead 15 ns
Enable Lag Time tLag 15 ns
Sequential Transfer Delay ttd 30 ns
Data Setup Time tsu 10 ns
Data Hold Time (inputs) thi 10 ns
Data Hold Time (outputs) tho 0ns
Slave Access Time ta15 ns
Slave DOUT Disable Time tdis 15 ns
Data Valid tv10 ns
Rise Time tr30 ns
Fall Time tf30 ns
TIMING CHARACTERISTICS(1)(2)
At –40°C to +85°C, +VDD = +2.7V, VREF = +2.5V, unless otherwise noted.
TSC2200
NOTES: (1) All input signals are specified with tr = tf = 5ns (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2. (2) See timing diagram below.
3
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TSC2200
SBAS191F
ELECTRICAL CHARACTERISTICS
At –40°C to +85°C, +VDD = +2.7V, internal VREF = +2.5V, conversion clock = 2MHz, and 12-bit mode, unless otherwise noted.
TSC2200IPW TSC2200IRHB
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
AUXILIARY ANALOG INPUT
Input Voltage Range 0 +VREF ✻✻V
Input Capacitance 25 ✻pF
Input Leakage Current ±1✻µA
BATTERY MONITOR INPUT
Input Voltage Range 0.5 6.0 ✻✻V
Input Capacitance 25 ✻pF
Input Leakage Current ±1✻µA
Accuracy –3+3✻✻%
TEMPERATURE MEASUREMENT
Temperature Range –40 +85 ✻✻°C
Temperature Resolution 0.3 ✻°C
Accuracy ±2✻°C
A/D CONVERTER
Resolution Programmable: 8-, 10-, or 12-Bits 12 ✻Bits
No Missing Codes 12-Bit Resolution 11 ✻Bits
Integral Linearity ±2±3LSB
Offset Error ±6✻LSB
Gain Error Excluding Reference Error ±6✻LSB
Noise 30 ✻µVrms
Power-Supply Rejection 80 ✻dB
D/A CONVERTER
Output Current Range Set by Resistor from ARNG to GND 650 500 µA
Resolution 8✻Bits
Integral Linearity ±2✻LSB
VOLTAGE REFERENCE
Voltage Range Internal 2.5V 2.45 2.5 2.55 ✻✻✻ V
Internal 1.25V 1.225 1.25 1.275 ✻✻1.285 V
Reference Drift 20 ✻ppm/°C
External Reference Input Range 1.0 VDD ✻✻V
Current Drain 20 ✻µA
DIGITAL INPUT/OUTPUT
Internal Clock Frequency 8✻MHz
Logic Family CMOS ✻
Logic Levels:VIH IIH = +5µA0.7V
DD ✻V
VIL IIL = +5µA–0.3 0.3VDD ✻✻V
VOH IOH = 2 TTL Loads 0.8VDD ✻V
VOL IOL = 2 TTL Loads 0.4 ✻V
POWER-SUPPLY REQUIREMENTS
Power-Supply Voltage, +VDD Specified Performance 2.7 3.6 ✻✻V
Quiescent Current
See Note (1) 1.25 2.3
✻2.5
mA
See Note (2) 500
✻
µA
Power-Down 3 ✻µA
TEMPERATURE RANGE
Specified Performance –40 +85 ✻✻°C
✻ Specifications same as TSC2200IPW.
NOTES: (1)
AUX1 conversion, no averaging, no REF power down, 50µs conversion. (2) AUX1 conversion, no averaging,
external reference
, 50µs conversion.
4www.ti.com TSC2200
SBAS191F
PIN DESCRIPTION
PIN
TSSOP QFN NAME DESCRIPTION
1 29, 30 VDD Power Supply
2 31 X+ X+ Position Input
3 32 Y+ Y+ Position Input
41X–X– Position Input
52Y–Y– Position Input
6 3 GND Ground
74V
BAT1 Battery Monitor Input 1
85V
BAT2 Battery Monitor Input 2
96V
REF Voltage Reference Input/Output
10 7
KBIRQ
Keyboard Interrupt (active LOW)
11 8 R1 Row 1
12 10 R2 Row 2
13 11 R3 Row 3
14 12 R4 Row 4
15 13 C1 Column 1
16 14 C2 Column 2
17 15 C3 Column 3
18 16 C4 Column 4
19 17 SCLK Serial Clock Input
20 18
SS
Slave Select Input (active LOW). Data will not be clocked in to MOSI unless
SS
is LOW. When
SS
is HIGH, MISO is high impedance.
21 19 MOSI Serial Data Input. Data is clocked in at SCLK falling edge.
22 20 DAV Data Available (active LOW)
23 21 MISO Serial Data Output. Data is clocked out at SCLK falling edge. High impedance when
SS
is HIGH.
24 22
PENIRQ
Pen Interrupt
25 23 AOUT Analog Output Current from D/A Converter
26 26 ARNG D/A Converter Analog Output Range Set
27 27 AUX2 Auxiliary A/D Converter Input 2
28 28 AUX1 Auxiliary A/D Converter Input 1
—
9,
24,
25
NC No Connection
PIN CONFIGURATION
Top View TSSOP
+VDD
X+
Y+
X–
Y–
GND
VBAT1
VBAT2
VREF
KBIRQ
R1
R2
R3
R4
AUX1
AUX2
ARNG
AOUT
PENIRQ
MISO
DAV
MOSI
SS
SCLK
C4
C3
C2
C1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
TSC2200
Top View QFN
X–
Y–
GND
VBAT1
VBAT2
VREF
KBIRQ
R1
NC
AOUT
PENIRQ
MISO
DAV
MOSI
SS
SCLK
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
TSC2200
Y+
X+
VDD
VDD
AUX1
AUX2
ARNG
NC
32
31
30
29
28
27
26
25
NC
R2
R3
R4
C1
C2
C3
C4
9
10
11
12
13
14
15
16
5
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TSC2200
SBAS191F
TYPICAL CHARACTERISTICS
At TA = +25°C, +VDD = +2.7V, conversion clock = 2MHz, 12-bit mode, and VREF = +2.5V, unless otherwise noted.
CONVERSION SUPPLY CURRENT vs TEMPERATURE
0–60 100–40 –20 20
Temperature (°C)
I
DD
(mA)
1.86
1.85
1.84
1.83
1.82
1.81
1.80
1.79
1.78 40 60 80
POWER-DOWN SUPPLY CURRENT
vs TEMPERATURE
20–40 100–20 0 40
Temperature (°C)
I
DD
(nA)
10
8
6
4
2
060 80
POWER-DOWN SUPPLY CURRENT vs
SUPPLY VOLTAGE
3.12.7 3.73.3
Supply Voltage (V)
Supply Current
(nA)
0.30
0.25
0.20
0.15
0.10
0.05
03.52.9
INTERNAL OSCILLATOR FREQUENCY vs V
DD
3.12.5 3.72.7 3.3
V
DD
(V)
Frequency (MHz)
8.7
8.6
8.5
8.4
8.3
8.2
8.1 3.52.9
CHANGE IN GAIN ERROR vs TEMPERATURE
0
–60 100–40 –20 20
Temperature (°C)
Change in Gain Error (LSB)
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5 40 60 80
CHANGE IN OFFSET ERROR vs TEMPERATURE
0–60 100–40 –20 20
Temperature (°C)
Change in Offset (LSB)
40 60 80
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
6www.ti.com TSC2200
SBAS191F
TYPICAL CHARACTERISTICS (Cont.)
At TA = +25°C, +VDD = +2.7V, conversion clock = 2MHz, 12-bit mode, and VREF = +2.5V, unless otherwise noted.
INTERNAL REFERENCE vs TEMPERATURE
20 40–60 100–40 –20 0 60 80
Temperature (°C)
VREF (V)
2.55
2.54
2.53
2.52
2.51
2.50
2.49
2.48
2.47
2.46
2.45
VREF (V)
1.275
1.270
1.265
1.260
1.255
1.250
1.245
1.240
1.235
1.230
1.225
2.5V Reference
1.25V Reference
INTERNAL REFERENCE vs V
DD
3.3 3.52.5 3.72.7 2.9 3.1
V
DD
(V)
V
REF
(V)
2.55
2.54
2.53
2.52
2.51
2.50
2.49
2.48
2.47
2.46
2.45
V
REF
(V)
1.275
1.270
1.265
1.260
1.255
1.250
1.245
1.240
1.235
1.230
1.225
2.5V Reference
1.25V Reference
INTERNAL OSCILLATOR FREQUENCY
vs TEMPERATURE
0–60 100–40 –20 20
Temperature (°C)
Frequency (MHz)
8.8
8.6
8.4
8.2
8.0
7.8
7.6
7.4 40 60 80
TOUCH SCREEN DRIVER ON-RESISTANCE
vs TEMPERATURE
0–60 100–40 –20 20
Temperature (°C)
Resistance (Ω)
8.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0 40 60 80
SWITCH-ON RESISTANCE vs V
DD
3.12.5 3.72.7 3.3
Supply Voltage (V)
Resistance
(Ω)
6.2
6.1
6.0
5.9
5.8
5.7
5.6
5.5
5.4
5.3 3.52.9
TEMP1 DIODE VOLTAGE vs TEMPERATURE
0–60 100–40 –20 20
Temperature (°C)
Voltage (mV)
800
750
700
650
600
550
500
450
400 40 60 80
7
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TSC2200
SBAS191F
TYPICAL CHARACTERISTICS (Cont.)
At TA = +25°C, +VDD = +2.7V, conversion clock = 2MHz, 12-bit mode, and VREF = +2.5V, unless otherwise noted.
900
800
700
600
500
Voltage (mV)
Temperature (°C)
–60 –40 –20 0 20 40 60 80 100
TEMP2 DIODE VOLTAGE vs TEMPERATURE
TEMP1 DIODE VOLTAGE vs SUPPLY VOLTAGE
3.12.5 3.72.7 3.3
V
DD
(V)
Diode Voltage
(mV)
612.0
611.8
611.6
611.4
611.2
611.0
610.8
610.6
610.4
610.2
610.0 3.52.9
TEMP2 DIODE VOLTAGE vs SUPPLY VOLTAGE
3.12.5 3.72.7 3.3
V
DD
(V)
Diode Voltage (mV)
727.06
727.04
727.02
727.00
727.98
727.96
727.94
727.92
727.90 3.52.9
DAC OUTPUT CURRENT vs TEMPERATURE
0–60 100–40 –20 20
Temperature (°C)
Current (mA)
1.00
0.95
0.90
0.85
0.80
0.75
0.70
0.65
0.60 40 60 80
DAC MAX CURRENT vs V
DD
3.12.5 3.72.7 3.3
VDD (V)
Current
(mA)
0.895
0.890
0.885
0.880
0.875
0.870
0.865
0.860
0.855 3.52.9
8www.ti.com TSC2200
SBAS191F
FIGURE 1. Typical Circuit Configuration.
OVERVIEW
The TSC2200 is an analog interface circuit for human inter-
face devices. A register-based architecture eases integration
with microprocessor-based systems through a standard SPI
bus. All peripheral functions are controlled through the reg-
isters and onboard state machines.
The TSC2200 consists of the following blocks (refer to the
block diagram on the front page):
•Touch Screen Interface
•Keypad Interface
•Battery Monitors
•Auxiliary Inputs
•Temperature Monitor
•Current Output D/A Converter
Communication to the TSC2200 is via a standard SPI serial
interface. This interface requires that the Slave Select signal be
driven LOW to communicate with the TSC2200. Data is then
shifted into or out of the TSC2200 under control of the host
microprocessor, which also provides the serial data clock.
Control of the TSC2200 and its functions is accomplished by
writing to different registers in the TSC2200. A simple com-
mand protocol is used to address the 16-bit registers. Reg-
isters control the operation of the A/D converter, D/A con-
verter, and keypad scanner.
The result of measurements made will be placed in the
TSC2200’s memory map and may be read by the host at any
time. Three signals are available from the TSC2200 to indicate
that data is available for the host to read. The
DAV
output
indicates that an A/D conversion has completed and that data
is available. The
KBIRQ
output indicates that a key on the
keypad has been pressed. The
PENIRQ
output indicates that
a touch has been detected on the touch screen. A typical
application of the TSC2200 is shown in Figure 1.
+
Auxiliary Input
Auxiliary Input
Pen Interrupt Request
Serial Data Out
Data Available
Serial Data In
Slave Select
Serial Clock
1µF
to
10µF
(Optional)
+2.7V to +3.3V
Touch
Screen
0.1µF
+V
DD
X+
Y+
X–
Y–
GND
V
BAT1
V
BAT2
V
REF
KBIRQ
R1
R2
R3
R4
AUX1
AUX2
ARNG
A
OUT
PENIRQ
MISO
DAV
MOSI
SS
SCLK
C4
C3
C2
C1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
TSC2200IPW
+
1µF
to
10µF
(Optional)
0.1µF
Main
Battery Secondary
Battery
Keypad
Keyboard Interrupt Request
LCD Contrast
Voltage
Regulator
RRNG
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TSC2200
SBAS191F
FIGURE 2. 4-Wire Touch Screen Construction.
FIGURE 3. Pressure Measurement.
OPERATION—TOUCH SCREEN
A resistive touch screen works by applying a voltage across
a resistor network and measuring the change in resistance at
a given point on the matrix where a screen is touched by an
input stylus, pen, or finger. The change in the resistance ratio
marks the location on the touch screen.
The TSC2200 supports the resistive 4-wire configurations
(see Figure 1). The circuit determines location in two coordi-
nate pair dimensions, although a third dimension can be
added for measuring pressure.
THE 4-WIRE TOUCH SCREEN COORDINATE
PAIR MEASUREMENT
A 4-wire touch screen is constructed as shown in Figure 2.
It consists of two transparent resistive layers separated by
insulating spacers.
The 4-wire touch screen panel works by applying a voltage
across the vertical or horizontal resistive network. The A/D
converter converts the voltage measured at the point the
panel is touched. A measurement of the Y-position of the
pointing device is made by connecting the X+ input to a data
converter chip, turning on the Y+ and Y– drivers, and
digitizing the voltage seen at the X+ input. The voltage
measured is determined by the voltage divider developed at
the point of touch. For this measurement, the horizontal
panel resistance in the X+ lead does not affect the conver-
sion due to the high input impedance of the A/D converter.
Voltage is then applied to the other axis, and the A/D
converter converts the voltage representing the X-position on
the screen. This provides the X- and Y-coordinates to the
associated processor.
Measuring touch pressure (Z) can also be done with the
TSC2200. To determine pen or finger touch, the pressure of
the “touch” needs to be determined. Generally, it is not
necessary to have very high performance for this test, there-
fore, the 8-bit resolution mode is recommended (however,
calculations will be shown with the 12-bit resolution mode).
There are several different ways of performing this measure-
ment. The TSC2200 supports two methods. The first method
requires knowing the X-plate resistance, measurement of the
X-position, and two additional cross panel measurements (Z2
and Z1) of the touch screen, as seen in Figure 3. Using
Equation 1 will calculate the touch resistance:
RRX-Position
4096 Z
Z–1
TOUCH X-Plate 2
1
=
•
(1)
The second method requires knowing both the X-plate and
Y-plate resistance, measurement of X-position and Y-posi-
tion, and Z1. Using Equation 2 will also calculate the touch
resistance: (2)
RRX Position ZRY Position
TOUCH X Plate Y Plate
=• −
−•−
--
--
4096 4096 11
4096
1
When the touch panel is pressed or touched, and the drivers
to the panel are turned on, the voltage across the touch panel
will often overshoot and then slowly settle (decay) down to a
stable DC value. This is due to mechanical bouncing which
is caused by vibration of the top layer sheet of the touch
panel when the panel is pressed. This settling time must be
accounted for, or else the converted value will be in error.
Therefore, a delay must be introduced between the time the
driver for a particular measurement is turned on, and the time
measurement is made.
Conductive Bar
Insulating
Material
(Glass)
Silver
Ink
Transparent
Conductor (ITO)
Bottom Side
Transparent
Conductor (ITO)
Top Side
X+
X–
Y+
Y–
ITO = Indium Tin Oxide
X-Position
Measure X-Position
Measure Z
1
-Position
Touch
X+ Y+
X–Y–
Z
1
-Position
Touch
X+ Y+
Y–X–
Measure Z
2
-Position
Z
2
-Position
Touch
X+ Y+
Y–X–
10 www.ti.com TSC2200
SBAS191F
FIGURE 4. Simplified Diagram of the Analog Input Section.
Converter
–REF
+REF
+IN
–IN
V
BAT1
AUX1
Battery
On
AUX2
GND
2.5V
Reference
Ref ON/OFF
X+
X–
+V
DD
TEMP1
Y+
Y–
V
REF
TEMP0
7.5kΩ
V
BAT2
7.5kΩ
2.5kΩ
Battery
On
2.5kΩ
In some applications, external capacitors may be required
across the touch screen for filtering noise picked up by the
touch screen; i.e., noise generated by the LCD panel or
back-light circuitry. The value of these capacitors will provide
a low-pass filter to reduce the noise, but will cause an
additional settling time requirement when the panel is touched.
Several solutions to this problem are available in the TSC2200.
A programmable delay time is available that sets the delay
between turning the drivers on and making a conversion.
This is referred to as the Panel Voltage Stabilization time,
and is used in some of the modes available in the TSC2200.
In other modes, the TSC2200 can be commanded to turn on
the drivers only without performing a conversion. Time can
then be allowed before a conversion is started.
The TSC2200 touch screen interface can measure position (X
and Y) and pressure (Z). Determination of these coordinates
is possible under three different modes of the A/D converter:
conversion controlled by the TSC2200, initiated by detection
of a touch; conversion controlled by the TSC2200, initiated by
the host responding to the
PENIRQ
signal; or conversion
completely controlled by the host processor.
A/D CONVERTER
The analog inputs of the TSC2200 are shown in Figure 4. The
analog inputs (X, Y, and Z touch panel coordinates, battery
voltage monitors, chip temperature, and auxiliary inputs) are
provided via a multiplexer to the Successive Approximation
Register (SAR) A/D converter. The A/D converter architecture
is based on capacitive redistribution architecture that inher-
ently includes a sample-and-hold function.
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TSC2200
SBAS191F
FIGURE 5. Ideal Input Voltages and Output Codes.
FIGURE 6.
PENIRQ
Functional Block Diagram.
Output Code
0V
FS = Full-Scale Voltage = V
REF(1)
1LSB = V
REF(1)
/4096
FS – 1LSB
11...111
11...110
11...101
00...010
00...001
00...000
1LSB
NOTES: (1) Reference voltage at converter: +REF – (–REF). See Figure 4.
(2) Input voltage at converter, after multiplexer: +IN – (–IN). See Figure 4.
Input Voltage
(2)
(V)
VDD VDD
50kΩ
ON
Y+ or X+ Drivers On,
or TEMP1, TEMP2
Measurements Activated
Y+
X+
Y–
HIGH Except
when TEMP1,
TEMP2 Activated
PENIRQ
TEMP2TEMP1
TEMP
DIODE
A unique configuration of low on-resistance switches allows
an unselected A/D converter input channel to provide power
and an accompanying pin to provide ground for driving the
touch panel. By maintaining a differential input to the con-
verter and a differential reference input architecture, it is
possible to negate errors caused by the driver switch on-
resistances.
The A/D converter is controlled by an A/D Converter Control
Register. Several modes of operation are possible, depend-
ing upon the bits set in the control register. Channel selec-
tion, scan operation, averaging, resolution, and conversion
rate may all be programmed through this register. These
modes are outlined in the sections below for each type of
analog input. The results of conversions made are stored in
the appropriate result register.
Data Format
The TSC2200 output data is in Straight Binary format, as
shown in Figure 5. This figure shows the ideal output code for
the given input voltage and does not include the effects of
offset, gain, or noise.
Reference
The TSC2200 has an internal voltage reference that can be
set to 1.25V or 2.5V, through the Reference Control Register.
The internal reference voltage is only used in the single-
ended mode for battery monitoring, temperature measure-
ment, and for utilizing the auxiliary inputs. Optimal touch
screen performance is achieved when using a ratiometric
conversion, thus all touch screen measurements are done
automatically in the differential mode. An external reference
can also be applied to the VREF pin, and the internal refer-
ence can be turned off.
Variable Resolution
The TSC2200 provides three different resolutions for the A/D
converter: 8-, 10-, or 12-bits. Lower resolutions are often
practical for measurements such as touch pressure. Perform-
ing the conversions at lower resolutions reduces the amount of
time it takes for the A/D converter to complete its conversion
process, which lowers power consumption.
Conversion Clock and Conversion Time
The TSC2200 contains an internal 8MHz clock, which is used
to drive the state machines inside the device that perform the
many functions of the part. This clock is divided down to
provide a clock to run the A/D converter. The division ratio for
this clock is set in the A/D Converter Control Register. The
ability to change the conversion clock rate allows the user to
choose the optimal value for resolution, speed, and power. If
the 8MHz clock is used directly, the A/D converter is limited to
8-bit resolution; using higher resolutions at this speed will not
result in accurate conversions. Using a 4MHz conversion
clock is suitable for 10-bit resolution; 12-bit resolution requires
that the conversion clock run at 1MHz or 2MHz.
Regardless of the conversion clock speed, the internal clock
will run nominally at 8MHz. The conversion time of the
TSC2200 is dependent upon several functions. Although the
conversion clock speed plays an important role in the time it
takes for a conversion to complete, a certain number of
internal clock cycles is needed for proper sampling of the
signal. Moreover, additional times, such as the Panel Voltage
Stabilization time, can add significantly to the time it takes to
perform a conversion. Conversion time can vary depending
upon the mode in which the TSC2200 is used. Throughout
this data sheet, internal and conversion clock cycles will be
used to describe the times that many functions take. In
considering the total system design, these times must be
taken into account by the user.
Touch Detect
The pen interrupt (
PENIRQ
) output function is detailed in
Figure 6. While in the power-down mode, the Y– driver is ON
and connected to GND and the
PENIRQ
output is connected
to the X+ input. When the panel is touched, the X+ input is
12 www.ti.com TSC2200
SBAS191F
MSB LSB
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
R/W PG3 PG2 PG1 PG0 ADDR5 ADDR4 ADDR3 ADDR2 ADDR1 ADDR0 X X X X X
TABLE I. TSC2200 Command Word.
PG3 PG2 PG1 PG0 PAGE ADDRESSED
0000 0
0001 1
0 0 1 0 Reserved
0 0 1 1 Reserved
0 1 0 0 Reserved
0 1 0 1 Reserved
0 1 1 0 Reserved
0 1 1 1 Reserved
1 0 0 0 Reserved
1 0 0 1 Reserved
1 0 1 0 Reserved
1 0 1 1 Reserved
1 1 0 0 Reserved
1 1 0 1 Reserved
1 1 1 0 Reserved
1 1 1 1 Reserved
TABLE II. Page Addressing.
pulled to ground through the touch screen and
PENIRQ
output goes LOW due to the current path through the panel
to GND, initiating an interrupt to the processor. During the
measurement cycles for the X- and Y-positions, the X+ input
will be disconnected from the
PENIRQ
pull-down transistor to
eliminate any leakage current from the pull-up resistor to flow
through the touch screen, thus causing no errors.
In modes where the TSC2200 needs to detect if the screen
is still touched (for example, when doing a
PENIRQ
-initiated
X, Y, and Z conversion), the TSC2200 must reset the drivers
so that the 50kΩ resistor is connected again. Due to the high
value of this pull-up resistor, any capacitance on the touch
screen inputs will cause a long delay time, and may prevent
the detection from occurring correctly. To prevent this, the
TSC2200 has a circuit that allows any screen capacitance to
be “precharged”, so that the pull-up resistor does not have to
be the only source for the charging current. The time allowed
for this precharge, as well as the time needed to sense if the
screen is still touched, can be set in the Configuration Control
register.
This illustrates the need to use the minimum capacitor values
possible on the touch screen inputs. These capacitors may
be needed to reduce noise, but too large a value will increase
the needed precharge and sense times, as well as panel
voltage stabilization time.
DIGITAL INTERFACE
The TSC2200 communicates through a standard SPI bus.
The SPI allows full-duplex, synchronous, serial communica-
tion between a host processor (the master) and peripheral
devices (slaves). The SPI master generates the synchroniz-
ing clock and initiates transmissions. The SPI slave devices
depend on a master to start and synchronize transmissions.
A transmission begins when initiated by a master SPI. The
byte from the master SPI begins shifting in on the slave
MOSI pin under the control of the master serial clock. As the
byte shifts in on the MOSI pin, a byte shifts out on the MISO
pin to the master shift register.
The idle state of the serial clock for the TSC2200 is LOW,
which corresponds to a clock polarity setting of 0 (typical
microprocessor SPI control bit CPOL = 0). The TSC2200
interface is designed so that with a clock phase bit setting of
1 (typical microprocessor SPI control bit CPHA = 1), the
master begins driving its MOSI pin and the slave begins
driving its MISO pin on the first serial clock edge. The
SS
pin
should idle HIGH between transmissions. The TSC2200 will
only interpret command words that are transmitted after the
falling edge of
SS
.
TSC2200 COMMUNICATION PROTOCOL
The TSC2200 is entirely controlled by registers. Reading and
writing these registers is accomplished by the use of a 16-bit
command, which is sent prior to the data for that register. The
command is constructed as shown in Table I.
The command word begins with an R/W bit, which specifies
the direction of data flow on the serial bus. The following four
bits specify the page of memory this command is directed to,
as shown in Table II. The next six bits specify the register
address on that page of memory to which the data is
directed. The last five bits are reserved for future use.
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TSC2200
SBAS191F
ADDR REGISTER
00 X
01 Y
02 Z1
03 Z2
04 KPDATA
05 BAT1
06 BAT2
07 AUX1
08 AUX2
09 TEMP1
0A TEMP2
0B DAC
0C Reserved
0D Reserved
0E Reserved
0F Reserved
10 ZERO
11 Reserved
12 Reserved
13 Reserved
14 Reserved
15 Reserved
16 Reserved
17 Reserved
18 Reserved
19 Reserved
1A Reserved
1B Reserved
1C Reserved
1D Reserved
1E Reserved
1F Reserved
PAGE 0: DATA REGISTERS PAGE 1: CONTROL REGISTERS
ADDR REGISTER
00 ADC
01 KEY
02 DACCTL
03 REF
04 RESET
05 CONFIG
06 Reserved
07 Reserved
08 Reserved
09 Reserved
0A Reserved
0B Reserved
0C Reserved
0D Reserved
0E Reserved
0F Reserved
10 KPMASK
11 Reserved
12 Reserved
13 Reserved
14 Reserved
15 Reserved
16 Reserved
17 Reserved
18 Reserved
19 Reserved
1A Reserved
1B Reserved
1C Reserved
1D Reserved
1E Reserved
1F Reserved
TABLE III. TSC2200 Memory Map.
FIGURE 7. Write and Read Operation of TSC2200 Interface.
Write Operation Read Operation
Command Word Command Word
Data
Data Data
SS
SCLK
MOSI
MISO
To read all the first page of memory, for example, the host
processor must send the TSC2200 the command 8000
H
—this
specifies a read operation beginning at Page 0, Address 0. The
processor can then start clocking data out of the TSC2200. The
TSC2200 will automatically increment its address pointer to the
end of the page; if the host processor continues clocking data
out past the end of a page, the TSC2200 will simply send back
the value FFFF
H
.
Likewise, writing to Page 1 of memory would consist of the
processor writing the command 0800H, which would specify a
write operation, with PG0 set to 1, and all the ADDR bits set
to 0. This would result in the address pointer pointing at the
first location in memory on Page 1. See the TSC2200 Memory
Map section for details of register locations. Figure 7 shows an
example of a complete data transaction between the host
processor and the TSC2200.
TSC2200 MEMORY MAP
The TSC2200 has several 16-bit registers that allow control of
the device as well as provide a location for results from the
TSC2200 to be stored until read by the host microprocessor.
These registers are separated into two pages of memory in the
TSC2200: a Data page (Page 0) and a Control page (Page 1).
The memory map is shown in Table III.
14 www.ti.com TSC2200
SBAS191F
RESET
ADDR REGISTER VALUE
PAGE (HEX) NAME D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 (HEX)
0 00 X 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000
0 01 Y 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000
002 Z
10 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000
003 Z
20 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000
0 04 KPDATA K15 K14 K13 K12 K11 K10 K9 K8 K7 K6 K5 K4 K3 K2 K1 K0 0000
0 05 BAT1 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000
0 06 BAT2 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000
0 07 AUX1 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000
0 08 AUX2 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000
0 09 TEMP1 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000
0 0A TEMP2 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000
0 0B DAC X X X X X X X X D7 D6 D5 D4 D3 D2 D1 D0 007F
0 0C Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 0D Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 0E Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 0F Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 10 ZERO 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0000
0 11 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 12 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 13 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 14 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 15 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 16 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 17 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 18 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 19 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 1A Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 1B Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 1C Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 1D Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 1E Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
0 1F Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 00 ADC PSM STS AD3 AD2 AD1 AD0 RS1 RS0 AV1 AV0 CL1 CL0 PV2 PV1 PV0 x 4000
1 01 KEY STC SCS DB2 DB1 DB0 X X X X X X X X X X X 4000
1 02 DACCTL DPD 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8000
1 03 REF X X X X X X X X X X X INT DL1 DL0 PND RFV 0002
1 04 RESET 1 0 1 1 1 0 1 1 X X X X X X X X FFFF
1 05 CONFIG 1 1 1 1 1 1 1 1 1 DAVB PR2 PR1 PR0 SN2 SN1 SN0 FFC0
1 06 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 07 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 08 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 09 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 0A Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 0B Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 0C Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 0D Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 0E Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 0F Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 10 KPMASK M15 M14 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0 0000
1 11 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 12 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 13 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 14 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 15 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 16 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 17 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 18 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 19 Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 1A Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 1B Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 1C Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 1D Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 1E Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
1 1F Reserved 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
NOTE: X = Don’t Care.
TABLE IV. Register Summary for TSC2200.
TSC2200 CONTROL REGISTERS
This section will describe each of the registers that were
shown in the memory map of Table III. The registers are
grouped according to the function they control. Note that in
the TSC2200, bits in control registers may refer to slightly
different functions depending upon if you are reading the
register or writing to it. A summary of all registers and bit
locations is shown in Table IV.
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TSC2200
SBAS191F
TABLE VII. STS Bit Operation.
STS
READ/WRITE VALUE DESCRIPTION
Read 0 Converter is Busy
Read 1 Conversions are Complete, Data is Available
Write 0 Normal Operation
Write 1 Stop Conversion and Power Down
A/D3 A/D2 A/D1 A/D0 FUNCTION
0 0 0 0 Invalid. No registers will be updated. This is the default state after a reset.
0 0 0 1 Touch screen scan function: X and Y coordinates converted and the results returned to the X and Y data registers.
Scan continues until either the pen is lifted or a stop bit is sent.
0 0 1 0 Touch screen scan function: X, Y, Z1, and Z2 coordinates converted and the results returned to the X, Y, Z1, and Z2
data registers. Scan continues until either the pen is lifted or a stop bit is sent.
0 0 1 1 Touch screen scan function: X coordinate converted and the results returned to the X data register.
0 1 0 0 Touch screen scan function: Y coordinate converted and the results returned to the Y data register.
0101
Touch screen scan function: Z
1
and Z
2
coordinates converted and the results returned to the Z
1
and Z
2
data registers.
0 1 1 0 Battery Input 1 converted and the results returned to the BAT1 data register.
0 1 1 1 Battery Input 2 converted and the results returned to the BAT2 data register.
1 0 0 0 Auxiliary Input 1 converted and the results returned to the AUX1 data register.
1 0 0 1 Auxiliary Input 2 converted and the results returned to the AUX2 data register.
1 0 1 0 A temperature measurement is made and the results returned to the temperature measurement 1 data register.
1 0 1 1 Port scan function: Battery Input 1, Battery Input 2, Auxiliary Input 1, and Auxiliary Input measurements are made
and the results returned to the appropriate data registers.
1 1 0 0 A differential temperature measurement is made and the results returned to the temperature measurement 2 data
register.
1 1 0 1 Turn on X+, X– drivers.
1 1 1 0 Turn on Y+, Y– drivers.
1 1 1 1 Turn on Y+, X– drivers.
TABLE VIII. A/D Converter Function Select.
PSM
READ/WRITE VALUE DESCRIPTION
Read 0 No Screen Touch Detected
Read 1 Screen Touch Detected
Write 0 Conversions Controlled by Host
Write 1 Conversions Controlled by TSC2200
TABLE V. PSM Bit Operation.
MSB LSB
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
PSM STS AD3 AD2 AD1 AD0 RS1 RS0 AV1 AV0 CL1 CL0 PV2 PV1 PV0 X
TABLE VI. A/D Converter Control Register.
RS1 RS0 FUNCTION
0 0 12-Bit Resolution. Power up and reset default.
0 1 8-Bit Resolution
1 0 10-Bit Resolution
1 1 12-Bit Resolution
TABLE IX. A/D Converter Resolution Control.
TSC2200 A/D CONVERTER CONTROL REGISTER
(PAGE 1, ADDRESS 00H)
The A/D converter in the TSC2200 is shared between all the
different functions. A control register determines which input
is selected, as well as other options. The result of the
conversion is placed in one of the result registers in Page 0
of memory, depending upon the function selected.
The A/D Converter Control Register controls several aspects
of the A/D converter. The register is formatted as shown in
Table VI.
Bit 15: PSM—Pen Status/Control Mode. Reading this bit
allows the host to determine if the screen is touched. Writing
to this bit determines the mode used to read coordinates:
host controlled, or under control of the TSC2200 responding
to a screen touch. When reading, the PENSTS bit indicates
if the pen is down or not. When writing to this register, this bit
determines if the TSC2200 controls the reading of coordi-
nates, or if the coordinate conversions are host-controlled.
The default state is host-controlled conversions (0).
Bit 14: STS—A/D Converter Status. When reading, this bit
indicates if the converter is busy, or if conversions are
complete and data is available. Writing a 0 to this bit will
cause touch screen scans to continue until either the pen is
lifted or the process is stopped. Continuous scans or conver-
sions can be stopped by writing a 1 to this bit. This will
immediately halt a conversion (even if the pen is still down)
and cause the A/D converter to power down. The default
state is continuous conversions, but if this bit is read after a
reset or power-up, it will read 1.
Bits [13:10]: AD3–AD0—A/D Converter Function Select.
These bits control which input is to be converted, and what
mode the converter is placed in. These bits are the same
whether reading or writing. A complete listing of how these
bits are used is shown in Table VIII.
Bits[9:8]: RS1, RS0—Resolution Control. The A/D converter
resolution is specified with these bits. A description of these
bits is shown in Table IX. These bits are the same whether
reading or writing.
16 www.ti.com TSC2200
SBAS191F
AV1 AV0 FUNCTION
0 0 None
0 1 4 Data Averages
1 0 8 Data Averages
1 1 16 Data Averages
TABLE X. A/D Conversion Averaging Control.
CL1 CL0 FUNCTION
0 0 8MHz Internal Clock Rate—8-Bit Resolution Only
0 1 4MHz Internal Clock Rate—10-Bit Resolution Only
1 0 2MHz Internal Clock Rate
1 1 1MHz Internal Clock Rate
TABLE XI. A/D Converter Clock Control.
MSB LSB
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
DPDXXXXXXXXX XXXXXX
TABLE XIII. D/A Converter Control Register.
MSB LSB
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
XXXXXXXXXX XINTDL1DL0PDNRFV
TABLE XV. Reference Register.
PV2 PV1 PV0 FUNCTION
00 00µs Stabilization Time
0 0 1 100µs Stabilization Time
0 1 0 500µs Stabilization Time
0 1 1 1ms Stabilization Time
1 0 0 5ms Stabilization Time
1 0 1 10ms Stabilization Time
1 1 0 50ms Stabilization Time
1 1 1 100ms Stabilization Time
TABLE XII. Panel Voltage Stabilization Time Control.
DPD
VALUE DESCRIPTION
0 D/A Converter is Powered and Operational
1 D/A Converter is Powered Down
TABLE XIV. DPD Bit Operation.
INT
VALUE DESCRIPTION
0 External Reference Selected
1 Internal Reference Selected
TABLE XVI. INT Bit Operation.
Bits[7:6]: AV1, AV0—Converter Averaging Control. These
two bits allow you to specify the number of averages the
converter will perform, as shown in Table X. Note that when
averaging is used, the STS bit and the
DAV
output will
indicate that the converter is busy until all conversions
necessary for the averaging are complete. The default state
for these bits is 00, selecting no averaging. These bits are the
same whether reading or writing.
Bits[5:4]: CL1, CL0—Conversion Clock Control. These two
bits specify the internal clock rate which the A/D converter uses
when performing a single conversion, as shown in Table XI.
These bits are the same whether reading or writing.
Bits [3:1]: PV2 – PV0—Panel Voltage Stabilization Time
control. These bits allow you to specify a delay time from the
time a pen touch is detected to the time a conversion is
started. This allows you to select the appropriate settling time
for the touch panel used. Table XII shows the settings of
these bits. The default state is 000, indicating a 0ms stabili-
zation time. These bits are the same whether reading or
writing.
Bit 0: This bit is not used, and is a “don’t care” when writing.
It will always read as a zero.
D/A CONVERTER CONTROL REGISTER
(PAGE 1, ADDRESS 02H)
The single bit in this register controls the power down control
of the onboard D/A converter. This register is formatted as
shown in Table XIII.
Bit 15: DPD—D/A Converter Power Down. This bit controls
whether the D/A converter is powered up and operational, or
powered down. If the D/A converter is powered down, the
A
OUT
pin will neither sink nor source current.
REFERENCE REGISTER
(PAGE 1, ADDRESS 03H)
The TSC2200 has a register to control the operation of the
internal reference. This register is formatted as shown in
Table XV.
Bit 4:
INT
—Internal Reference Mode. If this bit is written to a
1, the TSC2200 will use its internal reference; if this bit is a
zero, the part will assume an external reference is being
supplied. The default state for this bit is to select an external
reference (0). This bit is the same whether reading or writing.
Bits [3:2]: DL1, DL0—Reference Power-Up Delay. When
the internal reference is powered up, a finite amount of time
is required for the reference to settle. If measurements are
made before the reference has settled, these measurements
will be in error. These bits allow for a delay time for measure-
ments to be made after the reference powers up, thereby
assuring that the reference has settled. Longer delays will be
necessary depending upon the capacitance present at the
REF pin (see Typical Characteristics).
See Table XVII for the delays. The default state for these bits
is 00, selecting a 0µs delay. These bits are the same whether
reading or writing.
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TSC2200
SBAS191F
DL1 DL0 DELAY TIME
000µs
0 1 100µs
1 0 500µs
1 1 1000µs
TABLE XVII. Reference Power-Up Delay Settings.
PDN
VALUE DESCRIPTION
0 Internal Reference is Powered at All Times
1 Internal Reference is Powered Down Between Conversions
TABLE XVIII. PDN Bit Operation.
INT PDN REFERENCE BEHAVIOR
0 0 External Reference Used, Internal Reference Powered Down
0 1 External Reference Used, Interenal Reference Powered Down
1 0 Internal Reference Used, Always Powered Up
1 1 Internal Reference Used, Will Power Up During Conversions
and Then Power Down
TABLE XIX. Reference Behavior Possibilities.
MSB LSB
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
X X X X X X X X X X PRE2 PRE1 PRE0 SNS2 SNS1 SNS0
TABLE XXI. Configuration Control Register.
PRE[2:0]
PRE2 PRE1 PRE0 TIME
00 020µs
00 184µs
0 1 0 276µs
0 1 1 340µs
1 0 0 1.044ms
1 0 1 1.108ms
1 1 0 1.300ms
1 1 1 1.364ms
TABLE XXIII. Precharge Times.
SNS[2:0]
SNS2 SNS1 SNS0 TIME
00 032µs
00 196µs
0 1 0 544µs
0 1 1 608µs
1 0 0 2.080ms
1 0 1 2.144ms
1 1 0 2.592ms
1 1 1 2.656ms
TABLE XXIV. Sense Times.
RFV
VALUE DESCRIPTION
0 1.25V Reference Voltage
1 2.5V Reference Voltage
TABLE XX. RFV Bit Operation.
DAVB
VALUE DESCRIPTION
0 Data from A/D conversion is available. This will stay at 0
until the host has read all updated registers.
1 No new data is available.
TABLE XXII. PDN Bit Operation.
Bit 1: PDN—Reference Power Down. If a 1 is written to this
bit, the internal reference will be powered down between
conversions. If this bit is a zero, the internal reference will be
powered at all times. The default state is to power down the
internal reference, so this bit will be a 1. This bit is the same
whether reading or writing.
Note that the PDN bit, in concert with the INT bit, creates a
few possibilities for reference behavior. These are detailed in
Table XIX.
Bit 0: RFV—Reference Voltage control. This bit selects the
internal reference voltage, either 1.25V or 2.5V. The default
value is 1.25V. This bit is the same whether reading or writing.
TSC2200 CONFIGURATION CONTROL REGISTER
(PAGE 1, ADDRESS 05H)
This control register controls the configuration of the precharge
and sense times for the touch detect circuit. The register is
formatted as shown in Table XXI.
Bit 6: DAVB = Data Available. This bit mirrors the operation
of the
DAV
pin. When any conversion is complete, the
DAV
pin and this bit will be a logic 0 (LOW). It will stay LOW until
the register(s) updated by the conversion have been read.
When all updated data has been read by the host, the
DAV
pin and this bit will return to a logic 1 (HIGH).
Bits [5:3]: PRE[2:0]—Precharge Time Selection. These bits
set the amount of time allowed for precharging any pin
capacitance on the touch screen prior to sensing if a screen
touch is happening.
Bits [2:0]: SNS[2:0]—Sense Time Selection. These bits set
the amount of time the TSC2200 will wait to sense a screen
touch between coordinate axis conversions in
PENIRQ
-
controlled mode.
TSC2200 KEYPAD REGISTERS
The Keypad scanner hardware in the TSC2200 is controlled
by two registers: the Keypad Control register and the Keypad
Mask register. The Keypad Control register controls general
keypad functions such as scanning and de-bouncing, whereas
the Keypad Mask register allows certain keys to be masked
from being detected at all.
18 www.ti.com TSC2200
SBAS191F
C1 C2 C3 C4
R1 K0 K1 K2 K3
R2 K4 K5 K6 K7
R3 K8 K9 K10 K11
R4 K12 K13 K14 K15
TABLE XXX. Keypad to Key Bit Mapping.
STC
VALUE DESCRIPTION
0 No Keys Are Pressed
1 Keys Pressed and De-Bounced
TABLE XXVI. STC Bit Operation.
SCS
READ/WRITE VALUE DESCRIPTION
Read 0 Scanner or De-Bouncer Busy
Read 1 Scans are Complete, Data is Available
Write 0 Normal Operation
Write 1 Stop Scans
TABLE XXVII. SCS Bit Operation.
TABLE XXVIII. Keypad De-Bounce Control.
KBDB2 KBDB1 KBDB0 FUNCTION
0 0 0 De-Bounce: 2ms
0 0 1 De-Bounce: 10ms
0 1 0 De-Bounce: 20ms
0 1 1 De-Bounce: 50ms
1 0 0 De-Bounce: 60ms
1 0 1 De-Bounce: 80ms
1 1 0 De-Bounce: 100ms
1 1 1 De-Bounce: 120ms
MSB LSB
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
STC SCS DB2 DB1 DB0 X X X X X X X X X X X
TABLE XXV. Keypad Control Register.
MSB LSB
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
M15 M14 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0
TABLE XXIX. Keypad Mask Register.
KEYPAD CONTROL REGISTER
(PAGE 1, ADDRESS 01H)
The Keypad Control register is formatted as shown in Table XXV.
Bit 15: STC = Keyboard Status. This bit reflects the opera-
tion of the
KBIRQ
pin, with inverted logic. This bit will go
HIGH when a key is pressed and de-bounced. The default
value for this bit is zero.
Bit 14: SCS = Keyboard Scan Status. When reading, this bit
indicates if the scanner or de-bouncer is busy or if scans are
complete and data is available. Writing a zero to this bit will
cause keyboard scans to continue until either the key is lifted
or the process is stopped. Continuous scans can be stopped
by writing a 1 to this bit. This will immediately halt a conver-
sion (even if a key is still down). The default value for this bit
when read is 1.
Bits [13:11]: KBDB2-KBDB0 = Keyboard De-Bounce Con-
trol. These bits set the length of the de-bounce time for the
keypad, as shown in Table XXVIII. The default setting is a
2ms de-bounce time (000).
KEYPAD MASK REGISTER
(PAGE 1, ADDRESS 10H)
The Keypad Mask register is formatted as shown in Table XXI X.
This is the same format as used in the Keypad Data register
(Page 0, Address 04
H
). Each bit in these registers represents
one key on the keypad. In the Mask register, if a bit is set (1),
then that key will not be detected in keyboard scans. Pressing
that key on the keypad will also not cause a
KBIRQ
, if the bit is
set. If the bit is cleared (0), the corresponding key will be
detected. A 16-key keypad is mapped into the Keypad Mask
(and Keypad Data) register, as shown in Table XXX. The default
value for this register is 0000
H
, detecting all key presses.
The result of a keypad scan will appear in the Keypad Data
register. Each bit will be set in this register, corresponding to
the key(s) actually pressed. For example, if only KEY1 was
pressed on a particular scan, the data in the register would
read as 0002H; however, if keys 6, 8, and 13 were all pressed
simultaneously on that scan, the data would read as 2140H.
Multiple keys may be pressed simultaneously, and will generally
be decoded correctly by the keypad scan circuitry. However,
keys that land on three corners of a rectangle may cause a false
reading of a key on the fourth corner of the rectangle. For
example, if 0, 3, and 11 were pressed simultaneously, the
KEY0, KEY3, and KEY11 bits will be set, but the KEY8 bit will
also be set. Thus, when considering using multiple-key combi-
nations in an application, try to avoid combinations that put
three keys on the corners of a rectangle.
RESET REGISTER
(PAGE 1, ADDRESS 04H)
The TSC2200 has a special register, the RESET register, which
allows a software reset of the device. Writing the code BBXXH,
as shown in Table XXXI, to this register will cause the TSC2200
to reset all its registers to their default, power-up values.
Writing any other values to this register will do nothing.
Reading this register or any reserved register will result in
reading back all 1’s, or FFFFH.
19
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TSC2200
SBAS191F
MSB LSB
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
1 0111 011X X X X XXXX
TABLE XXXI. Reset Register.
MSB LSB
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
K15 K14 K13 K12 K11 K10 K9 K8 K7 K6 K5 K4 K3 K2 K1 K0
TABLE XXXIII. Keypad Data Register.
MSB LSB
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
X X X X X X X X D7 D6 D5 D4 D3 D2 D1 D0
TABLE XXXIV. D/A Converter Register.
TABLE XXXII. Result Data Format.
MSB LSB
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0
MSB LSB
TSC2200 DATA REGISTERS
The data registers of the TSC2200 hold data results from
conversions or keypad scans, or the value of the D/A converter
output current. All of these registers default to 0000H upon
reset, except the D/A converter register, which is set to 0080H,
representing the midscale output of the D/A converter.
X, Y, Z1, Z2, BAT1, BAT2, AUX1, AUX2, TEMP1,
AND TEMP2 REGISTERS
The results of all A/D conversions are placed in the appro-
priate data register (see Tables III and VIII). The data format
of the result word, R, of these registers is right-justified, as
shown in Table XXXII.
KEYPAD DATA REGISTER
(PAGE 0, ADDRESS 04H)
The Keypad Data register (Page 0, Address 04H) is format-
ted as shown in Table XXXIII.
This is the same format as used in the Keypad Mask register
(Page 1, Address 10H). Each bit in these registers represents
one key on the keypad. A 16-key keypad is mapped into the
Keypad Data register, see Table XXIX.
D/A CONVERTER DATA REGISTER
(PAGE 0, ADDRESS 0BH)
The data to be written to the D/A converter is written into the
D/A converter data register, which is formatted as shown in
Table XXXIV.
ZERO REGISTER
(PAGE 0, ADDRESS 10H)
This is a reserved data register, but instead of reading all 1’s
(FFFFH), when read will return all 0’s (0000H).
OPERATION—TOUCH SCREEN MEASUREMENTS
As noted previously in the discussion of the A/D converter,
several operating modes can be used, which allow great
flexibility for the host processor. These different modes will
now be examined.
Conversion Controlled by TSC2200 Initiated at
Touch Detect
In this mode, the TSC2200 will detect when the touch panel is
touched and cause the
PENIRQ
line to go LOW. At the same
time, the TSC2200 will start up its internal clock. It will then turn
on the Y-drivers, and after a programmed Panel Voltage
Stabilization time, power up the A/D converter and convert the
Y-coordinate. If averaging is selected, several conversions
may take place; when data averaging is complete, the Y-
coordinate result will be stored in the Y-register.
If the screen is still touched at this time, the X-drivers will be
enabled, and the process will repeat, but instead measuring
the X-coordinate and storing the result in the X-register.
If only X- and Y-coordinates are to be measured, then the
conversion process is complete. See Figure 8 for a flowchart
for this process. The time it takes to go through this process
depends upon the selected resolution, internal conversion
clock rate, averaging selected, panel voltage stabilization
time, and precharge and sense times.
20 www.ti.com TSC2200
SBAS191F
FIGURE 8. X- and Y-Coordinate Touch Screen Scan, Initiated by Touch.
The time needed to get a complete X/Y-coordinate reading
can be calculated by: (3)
t 2.5 s + 2 t + t + t 2N N 1
fs
COORDINATE PVS PRE SNS AVG BITS CONV
=
(
)
+•+µ
µ
44.
where,
tCOORDINATE = Time to Complete X/Y-Coordinate Reading
tPVS = Panel Voltage Stabilization time (see Table XII)
tPRE = Precharge time (see Table XXII)
tSNS = Sense time (see Table XXIII)
NAVG = Number of Averages (see Table X); for no averag-
ing, NAVG = 1
NBITS = Number of Bits of Resolution (see Table IX)
fCONV = A/D Converter Clock Frequency (see Table XI)
If the pressure of the touch is also to be measured, the
process will continue in the same way, but measuring the Z1
and Z2 values, and placing them in the Z1 and Z2 registers
(see Figure 9). As before, this process time depends upon
the settings described above. The time for a complete X, Y,
Z1, and Z2 coordinate reading is given by: (4)
t4.75s+3t+t+t4NN
1
fs
COORDINATE PVS PRE SNS AVG BITS CONV
=µ
(
)
+•+µ
44.
Screen
Touch
Issue Interrupt
PENIRQ
Go to Host-Controlled
Conversion
Touch Screen Scan
X and Y
PENIRQ Initiated
Done Done
No
No
Yes
Yes
Yes
No
No
Yes
Is Data
Averaging Done
Is Screen
Touched
Is Panel Voltage
Stabilization Done
Turn On Drivers: Y+, Y–
Start Clock
Store X-Coordinates in
X-Register
Power Down A/D Converter
Power Up A/D Converter
Reset PENIRQ and
Scan Trigger
Turn Off Clock
Convert X-Coordinates
Is PSM = 1
No
Yes
No
Is Screen
Touched
Is Data
Averaging Done
No
Yes
Yes
Is Panel Voltage
Stabilization Done
Convert Y-Coordinates
Turn On Drivers: X+, X–
Power Up A/D Converter
Store Y-Coordinates in
Y-Register
Reset PENIRQ and
Scan Trigger
Power Down A/D Converter
Turn Off Clock
Issue Data Available
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TSC2200
SBAS191F
FIGURE 9. X- Y- and Z-Coordinate Touch Screen Scan, Initiated by Touch.
Screen
Touch
Issue Interrupt
PENIRQ
Go to Host-Controlled
Conversion
Touch Screen Scan
X, Y, and Z
PENIRQ Initiated
Done
No
No
Yes
Yes
Yes
No
No
Yes
Is Data
Averaging Done
Is Screen
Touched
Is Panel Voltage
Stabilization Done
Turn On Drivers: Y+, Y–
Start Clock
Store X-Coordinates in
X-Register
Power Down A/D Converter
Power Up A/D Converter
Reset PENIRQ and
Scan Trigger
Turn Off Clock
Done
Reset PENIRQ and
Scan Trigger
Turn Off Clock
Convert X-Coordinates
Is PSM = 1
No
Yes
Is Panel Voltage
Stabilization Done
Convert Z
1
-Coordinates
Turn On Drivers: Y+, X–
Power Up A/D Converter
No
Yes
Is Data
Averaging Done
Done
No
Yes
No
Is Screen
Touched
Is Data
Averaging Done
Yes
Convert Z
2
-Coordinates
Store Z
2
-Coordinates
in Z
2
-Register
Reset PENIRQ and
Scan Trigger
Power Down A/D Converter
Turn Off Clock
Issue Data Available
Is Screen
Touched
No
Yes
Yes
Is Panel Voltage
Stabilization Done
Convert Y-Coordinates
Turn On Drivers: X+, X–
Power Up A/D Converter
No
Is Data
Averaging Done
Store Y-Coordinates
in Y-Register
Power Down A/D Converter
Store Z
1
-Coordinates
in Z
1
-Register
22 www.ti.com TSC2200
SBAS191F
FIGURE 10. X- and Y-Coordinate Touch Screen Scan, Initiated by Host.
Conversion Controlled by TSC2200 Initiated By
Host Responding to
PENIRQ
In this mode, the TSC2200 will detect when the touch panel is
touched and cause the
PENIRQ
line to go LOW. The host will
recognize the interrupt request, and then write to the A/D
Converter Control register to select one of the touch screen
scan functions. The conversion process then proceeds as
described above, and as outlined in Figures 10 through 14.
The main difference between this mode and the previous
mode is that the host, not the TSC2200, decides when the
touch screen scan begins.
Screen
Touch
Issue Interrupt
PENIRQ
Go to Host-Controlled
Conversion
Touch Screen Scan
X and Y
Host Initiated
Done Done
No
No
Yes
Yes
No
No
Yes
Is Data
Averaging Done
Is Screen
Touched
Is Panel Voltage
Stabilization Done
Turn On Drivers: Y+, Y–
Start Clock
Reset PENIRQ
Store X-Coordinates in
X-Register
Power Down A/D Converter
Power Up A/D Converter
Reset PENIRQ and
Scan Trigger
Turn Off Clock
Convert X-Coordinates
Is PSM = 1
Yes
No
Is Screen
Touched
No
Yes
Is Panel Voltage
Stabilization Done
Convert Y-Coordinates
Turn On Drivers: X+, X–
Power Up A/D Converter
No
Yes
Is Data
Averaging Done
Store Y-Coordinates
in Y-Register
Power Down A/D Converter
Turn Off Clock
Issue Data Available
Done
Host Writes A/D
Converter
Control Register
23
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TSC2200
SBAS191F
FIGURE 11. X-, Y-, and Z-Coordinate Touch Screen Scan, Initiated by Host.
Screen
Touch
Issue Interrupt
PENIRQ
Go to Host-Controlled
Conversion
Touch Screen Scan
X, Y, and Z
Host Initiated
Done Done
No
No
Yes
Yes
No
No
Yes
Is Data
Averaging Done
Is Screen
Touched
Is Panel Voltage
Stabilization Done
Turn On Drivers: Y+, Y–
Start Clock
Reset PENIRQ
Store X-Coordinates in
X-Register
Power Down A/D Converter
Power Up A/D Converter
Reset PENIRQ and
Scan Trigger
Turn Off Clock
Done
Reset PENIRQ and
Scan Trigger
Turn Off Clock
Convert X-Coordinates
Is PSM = 1
No
Yes
No
Is Screen
Touched
Is Data
Averaging Done
No
Yes
Yes
Is Panel Voltage
Stabilization Done
Convert Z2-Coordinates
Convert Z1-Coordinates
Turn On Drivers: Y+, X–
Power Up A/D Converter
No
Yes
Is Data
Averaging Done
Store Z2-Coordinates
in Z2-Register
Store Z1-Coordinates
in Z1-Register
Power Down A/D Converter
Turn Off Clock
Issue Data Available
Is Screen
Touched
No
Yes
Yes
Is Panel Voltage
Stabilization Done
Convert Y-Coordinates
Turn On Drivers: X+, X–
Power Up A/D Converter
No
Yes
No
Is Data
Averaging Done
Store Y-Coordinates
in Y-Register
Power Down A/D Converter
Done
Host Writes A/D
Converter
Control Register
24 www.ti.com TSC2200
SBAS191F
FIGURE 12. X-Coordinate Reading Initiated by Host.
Screen
Touch
Issue Interrupt
PENIRQ
Go to Host-Controlled
Conversion
Touch Screen Scan
X-Coordinate
Host Initiated
Done
No
Reset PENIRQ
No
Yes
Are Drivers On
Start Clock No
Yes
Is Panel Voltage
Stabilization Done
Turn On Drivers: Y+, Y–
Start Clock
Power Up A/D Converter
Is PSM = 1 Convert X-Coordinates
No
Yes
Is Data
Averaging Done
Store X-Coordinates
in X-Register
Power Down A/D Converter
Turn Off Clock
Issue Data Available
Done
Host Writes A/D
Converter
Control Register
25
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TSC2200
SBAS191F
FIGURE 13. Y-Coordinate Reading Initiated by Host.
Screen
Touch
Issue Interrupt
PENIRQ
Go to Host-Controlled
Conversion
Touch Screen Scan
Y-Coordinate
Host Initiated
Done
No
Reset PENIRQ
Start Clock
No
Is Panel Voltage
Stabilization Done
Turn On Drivers: X+, X–
No
Is Data
Averaging Done
No
Yes
Yes
Yes
Are Drivers On
Convert Y-Coordinates
Start Clock
Power Up A/D Converter
Is PSM = 1 Store Y-Coordinates
in Y-Register
Power Down A/D Converter
Turn Off Clock
Issue Data Available
Done
Host Writes A/D
Converter
Control Register
26 www.ti.com TSC2200
SBAS191F
FIGURE 14. Z-Coordinate Reading Initiated by Host.
Screen
Touch
Host Writes A/D
Converter
Control Register
Issue Interrupt
PENIRQ
Go to Host-Controlled
Conversion
Touch Screen Scan
Z-Coordinate
Host Initiated
No
No
Yes
Yes
Yes
No
No
Is Data
Averaging Done
Is Panel Voltage
Stabilization Done
Turn On Drivers: Y+, X–
Start Clock
Reset PENIRQ
Store Z
1
-Coordinates
in Z
1
-Register
Power Up A/D Converter
Are Drivers On
Start Clock
Convert Z
1
-Coordinates
Yes
No Is Data
Averaging Done
Store Z
2
-Coordinates
in Z
2
-Register
Power Down A/D Converter
Issue Data Available
Convert Z
2
-Coordinates
Is PSM = 1
Done
Done
Turn Off Clock
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TSC2200
SBAS191F
FIGURE 15. X-Coordinate Reading Controlled by Host.
Screen
Touch
Issue Interrupt
PENIRQ
Go to Host-Controlled
Conversion
Host-Controlled
X-Coordinate
No
Start Clock
Reset PENIRQ No
Is Panel Voltage
Stabilization Done
Turn On Drivers: Y+, Y–
Turn On Drivers: Y+, Y–
No
Yes
Yes
Yes
No
Is Data
Averaging Done
Convert X-Coordinates
Start Clock
Power Up A/D Converter
Is PSM = 1
Are Drivers On
Done
Done
Host Writes A/D
Converter
Control Register
Host Writes A/D
Converter-
Control Register
Done
Power Down A/D Converter
Turn Off Clock
Issue Data Available
Store X-Coordinates
in X-Register
Conversion Controlled by the Host
In this mode, the TSC2200 will detect when the touch panel
is touched and cause the
PENIRQ
line to go LOW. The host
will recognize the interrupt request. Instead of starting a
sequence in the TSC2200 which then reads each coordinate
in turn, the host now must control all aspects of the conver-
sion. Generally, upon receiving the interrupt request, the host
will turn on the Y-drivers. After waiting for the settling time,
the host will then address the TSC2200 again, this time
requesting an X-coordinate conversion.
The process is then repeated for Y- and Z-coordinates. The
processes are outlined in Figures 15 through 17.
The time needed to convert any single coordinate under host
control (not including the time needed to send the command
over the SPI bus) is given by: (5)
t 2.125 s + t N N 1
fs
COORDINATE PVS AVG BITS CONV
=µ + • +µ
44.
28 www.ti.com TSC2200
SBAS191F
FIGURE 16. Y-Coordinate Reading Controlled by Host.
Screen
Touch
Issue Interrupt
PENIRQ
Go to Host-Controlled
Conversion
Host-Controlled
Y-Coordinate
No
Start Clock
Reset PENIRQ No
Is Panel Voltage
Stabilization Done
Turn On Drivers: X+, X–
Turn On Drivers: X+, X–
No
Yes
Yes
Yes
No
Is Data
Averaging Done
Convert Y-Coordinate
Start Clock
Power Up A/D Converter
Is PSM = 1
Are Drivers On
Done
Done
Host Writes A/D
Converter
Control Register
Host Writes A/D
Converter
Control Register
Done
Power Down A/D Converter
Turn Off Clock
Issue Data Available
Store Y-Coordinates
in Y-Register
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TSC2200
SBAS191F
FIGURE 17. Z-Coordinate Reading Controlled by Host.
Screen
Touch
Issue Interrupt
PENIRQ
Go to Host-Controlled
Conversion
Host-Controlled
Z-Coordinate
No
Reset PENIRQ
No
Is Panel Voltage
Stabilization Done
Turn On Drivers: Y+, X–
Turn On Drivers: Y+, X–
No
Yes
Yes
Yes
Is Data
Averaging Done
No
Is Data
Averaging Done
Convert Z1-Coordinates
Start Clock
Start Clock
Power Up A/D Converter
Is PSM = 1
Done
Done
Host Writes A/D
Converter
Control Register
Reset PENIRQ
Host Writes A/D
Converter
Control Register
Done
Convert Z2-Coordinates
No
Yes
Is Data
Averaging Done
Store Z2-Coordinates
in Z2-Register
Power Down A/D Converter
Turn Off Clock
Issue Data Available
Store Z1-Coordinates
in Z1-Register
30 www.ti.com TSC2200
SBAS191F
FIGURE 18. Functional Block Diagram of Temperature
Measurement Mode.
FIGURE 19. Single Temperature Measurement Mode.
FIGURE 20. Additional Temperature Measurement for Differential
Temperature Reading.
OPERATION—TEMPERATURE MEASUREMENT
In some applications, such as battery recharging, a measure-
ment of ambient temperature is required. The temperature
measurement technique used in the TSC2200 relies on the
characteristics of a semiconductor junction operating at a
fixed current level. The forward diode voltage (VBE) has a
well-defined characteristic versus temperature. The ambient
temperature can be predicted in applications by knowing the
25°C value of the VBE voltage and then monitoring the delta
of that voltage as the temperature changes.
The TSC2200 offers two modes of temperature measurement.
The first mode requires calibration at a known temperature, but
only requires a single reading to predict the ambient tempera-
ture. A diode, shown in Figure 18, is used during this measure-
ment cycle. This voltage is typically 600mV at +25°C with a
20µA current through it. The absolute value of this diode voltage
can vary by a few millivolts; the temperature coefficient (TC) of
this voltage is very consistent at –2.1mV/°C. During the final test
of the end product, the diode voltage would be stored at a
known room temperature, in system memory, for calibration
purposes by the user. The result is an equivalent temperature
measurement resolution of 0.3°C/LSB. This measurement of
what is referred to as Temperature 1 is illustrated in Figure 19.
The second mode does not require a test temperature
calibration, but uses a two-measurement (differential) method
to eliminate the need for absolute temperature calibration
and for achieving 2°C/LSB accuracy. This mode requires a
second conversion with a 91 times larger current. The
voltage difference between the first (TEMP1) and second
(TEMP2) conversion, using 91 times the bias current, will be
represented by kT/q • ln (N), where N is the current
ratio = 91, k = Boltzmann’s constant (1.38054 • 10-23
electrons volts/degrees Kelvin), q = the electron charge
(1.602189 • 10-19 °C), and T = the temperature in degrees
Kelvin. This method can provide much improved absolute
temperature measurement, but less resolution of 2°C/LSB.
The resultant equation for solving for °K is:
°= •
•
KqV
k ln(N)
∆(6)
where,
∆=
(
)
−
(
)
(
)
∴° = ∆ °
°= •∆
(
)
−°
VVI VI inmV
K 2.573 V K/mV
C 2.573 V mV 273 K
91 1
Figure 20 shows the Temperature 2 measurement.
A/D
Converter
MUX
X+
Temperature Select
TEMP0 TEMP1
Host Writes
A/D Converter
Control Register
Start Clock
Temperature Input 1
Done
Yes
No Is Data
Averaging Done
Store Temperature
Input 1 in TEMP1
Register
Power Down
A/D Converter
Power Up
A/D Converter
Power Up Reference
Convert
Temperature Input 1
Issue Data Available
Power Down Reference
Turn Off Clock
Host Writes
A/D Converter
Control Register
Start Clock
Temperature Input 2
Done
Yes
No Is Data
Averaging Done
Store Temperature
Input 2 in TEMP2
Register
Power Down
A/D Converter
Power Up
A/D Converter
Power Up Reference
Convert
Temperature Input 2
Issue Data Available
Power Down Reference
Turn Off Clock
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TSC2200
SBAS191F
FIGURE 21. Battery Measurement Functional Block Diagram.
FIGURE 22. VBAT1 Measurement Process.
FIGURE 23. VBAT2 Measurement Process.
OPERATION—BATTERY MEASUREMENT
An added feature of the TSC2200 is the ability to monitor the
battery voltage on the other side of a voltage regulator
(DC/DC converter), as shown in Figure 21. The battery
voltage can vary from 0.5V to 6V while maintaining the
voltage to the TSC2200 at 2.7V, 3.3V, etc. The input voltage
(VBAT1 or VBAT2 ) is divided down by 4 so that a 6.0V battery
voltage is represented as 1.5V to the A/D converter. This
simplifies the multiplexer and control logic. In order to mini-
mize the power consumption, the divider is only ON during
the sampling of the battery input.
Flowcharts that detail the process of making a battery input
reading are shown in Figures 22 and 23.
The time needed to make temperature, auxiliary, or battery
measurements is given by: (7)
t 2.625 s + t N N 1
fs
READING REF AVG BITS CONV
=µ + • +µ
44.
where tREF is the reference delay time as given in Table XVII.
V
DD
V
BAT
7.5kΩ
2.5kΩ
DC/DC
Converter
Battery
0.5V
to
6.0V
0.125V to 1.5V
2.7V
+
Host Writes
A/D Converter
Control Register
Start Clock
Battery Input 1
Done
Yes
No Is Data
Averaging Done
Store Battery Input 1
in BAT1 Register
Power Down
A/D Converter
Power Up
A/D Converter
Power Up Reference
Convert
Battery Input 1
Issue Data Available
Power Down Reference
Turn Off Clock
Host Writes
A/D Converter
Control Register
Start Clock
Battery Input 2
Done
Yes
No Is Data
Averaging Done
Store Battery Input 2
in BAT2 Register
Power Down
A/D Converter
Power Up
A/D Converter
Power Up Reference
Convert
Battery Input 2
Issue Data Available
Power Down Reference
Turn Off Clock
32 www.ti.com TSC2200
SBAS191F
FIGURE 24. AUX1 Measurement Process.
FIGURE 25. AUX2 Measurement Process. FIGURE 26. Port Scan Mode.
OPERATION—AUXILIARY MEASUREMENT
The two auxiliary voltage inputs can be measured in much
the same way as the battery inputs, as shown in Figures 24
and 25. Applications might include external temperature
sensing, ambient light monitoring for controlling the back-
light, or sensing the current drawn from the battery.
OPERATION—PORT SCAN
If making measurements of all the analog inputs (except the
touch screen) is desired on a periodic basis, the Port Scan
mode can be used. This mode causes the TSC2200 to
sample and convert both battery inputs and both auxiliary
inputs. At the end of this cycle, the battery and auxiliary result
registers will contain the latest values. Thus, with one write
to the TSC2200, the host can cause four different measure-
ments to be made.
The flowchart for this process is shown in Figure 26. The time
needed to make a complete port scan is given by:
t 7.5 s+ t + 4N N 1
f4.4 s
READING REF AVG BITS CONV
=µ +µ
•
(8)
Host Writes
A/D Converter
Control Register
Start Clock
Port Scan
Done
Yes
No Is Data
Averaging Done
Yes
No Is Data
Averaging Done
Store Battery Input 1
in BAT1 Register
Power Down
A/D Converter
Power Up
A/D Converter
Power Up Reference
Convert
Battery Input 1
Store Battery Input 2
in BAT2 Register
Convert
Battery Input 2
Yes
No Is Data
Averaging Done
Yes
No Is Data
Averaging Done
Store Auxiliary Input 1
in AUX1 Register
Convert
Auxiliary Input 1
Store Auxiliary Input 2
in AUX2 Register
Convert
Auxiliary Input 2
Issue Data Available
Power Down Reference
Turn Off Clock
Host Writes
A/D Converter
Control Register
Start Clock
Auxiliary Input 2
Done
Yes
No Is Data
Averaging Done
Store Auxiliary Input 2
in AUX2 Register
Power Down
A/D Converter
Power Up
A/D Converter
Power Up Reference
Convert
Auxiliary Input 2
Issue Data Available
Power Down Reference
Turn Off Clock
Host Writes
A/D Converter
Control Register
Start Clock
Auxiliary Input 1
Done
Yes
No Is Data
Averaging Done
Store Auxiliary Input 1
in AUX1 Register
Power Down
A/D Converter
Power Up
A/D Converter
Power Up Reference
Convert
Auxiliary Input 1
Issue Data Available
Power Down Reference
Turn Off Clock
33
www.ti.com
TSC2200
SBAS191F
FIGURE 27. D/A Converter Configuration.
FIGURE 28. D/A Converter Output Current Range versus
RRNG Resistor Value.
OPERATION—D/A CONVERTER
The TSC2200 has an onboard 8-bit D/A converter, config-
ured as shown in Figure 27. This configuration yields a
current sink (AOUT) controlled by the value of a resistor
connected between the ARNG pin and ground. The D/A
converter has a control register that controls whether or not
the converter is powered up. The 8-bit data is written to the
D/A converter through the D/A converter data register.
This circuit is designed for flexibility in the output voltage at the
VBIAS point shown in Figure 27 to accommodate the widely
varying requirements for LCD contrast control bias. V+ can be
a higher voltage than the supply voltage for the TSC2200. The
only restriction is that the voltage on the AOUT pin can never go
above the absolute maximum ratings for the device, and
should stay above 1.5V for linear operation.
The D/A converter has an output sink range tha t is limited to
1mA. This range can be adjusted by changing the value of
RRNG shown in Figure 27. As this D/A converter is not
designed to be a precision device, the actual output current
range can vary as much as ±20%. Furthermore, the current
output will change due to variations in temperature; the D/A
converter has a temperature coefficient of approximately
–2µA/°C. To set the full-scale current, RRNG can be deter-
mined from the graph shown in Figure 28.
For example, consider an LCD that has a contrast control
voltage VBIAS that can range from 2V to 4V, which draws
400µA when used, and an available +5V supply. Note that
this is higher than the TSC2200 supply voltage, but it is within
the absolute maximum ratings.
The maximum VBIAS voltage is 4V, and this occurs when the
D/A converter current is 0, so only the 400µA load current
ILOAD will be flowing from 5V to VBIAS. This means 1V will be
dropped across R1, so R1 = 1V/400µA = 2.5kΩ.
The minimum VBIAS is 2V, which occurs when the D/A
converter current is at its full scale value, IMAX. In this case,
5V – 2V = 3V will be dropped across R1, so the current
through R1 will be 3V/2.5K = 1.2mA. This current is
IMAX + ILOAD = IMAX + 400uA, so IMAX must be set to 800µA.
Looking at Figure 28, this means that RRNG should be
around 1MΩ.
Since the voltage at the AOUT pin should not go below 1.5V,
this limits the voltage at the bottom of R2 to be 1.5V minimum;
this occurs when the D/A converter is providing its maximum
current, IMAX. In this case, IMAX + ILOAD flows through R1, and
IMAX flows through R2. Thus,
R2IMAX + R1(IMAX + ILOAD) = 5V – 1.5V = 3.5V (8)
We already have found R1 = 2.5kΩ, IMAX = 800µA,
ILOAD = 400µA, so we can solve this for R2 and find that it
should be 625Ω.
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
010k 100k 1M 10M 100M
I
OUT
(Full-Scale) (mA)
ARNG Resistor (Ω)
D/A Converter
V+
VBIAS
AOUT
ARNG
RRNG
R2
R1
8 Bits
34 www.ti.com TSC2200
SBAS191F
FIGURE 29. D/A Converter Circuit when Using V+ Higher
than VSUPPLY.
FIGURE 30. Keypad Scan Initiated by Keypress.
In the previous example, when the D/A converter current is
zero, the voltage on the AOUT pin will rise above the TSC2200
supply voltage. This is not a problem, however, since V+ was
within the absolute maximum ratings of the TSC2200, so no
special precautions are necessary. Many LCD displays re-
quire voltages much higher than the absolute maximum
ratings of the TSC2200. In this case, the addition of an NPN
transistor, as shown in Figure 29, will protect the AOUT pin
from damage.
OPERATION—KEYPAD INTERFACE
The TSC2200 contains a keypad interface that is suitable for
use with matrix keypads up to 4-by-4 keys. A control register,
the Keypad Control Register, is used to set the scan rate for
the keypad and de-bounce times. There is also a Keypad
Mask register which allows certain keys to be masked from
being read or causing the TSC2200 to detect a key press.
The results of keyboard scans are placed in the Keypad Data
register.
When a key press is detected, the TSC2200 automatically
scans the keypad and de-bounces the key press. It will then
drive the
KBIRQ
LOW. All keys pressed at the time of the
scan will then be reflected in the Keypad Data Register. This
mode is shown in Figure 30.
D/A Converter
V+
V
SUPPLY
V
BIAS
A
OUT
ARNG
RRNG
R
2
R
1
8 Bits
Keypad Touch
Issue Interrupt KBIRQ
Reset KBIRQ
Keypad Scan
KBIRQ Initiated
Done
Start Clock Read KPDATA
Register
Store Keypad Scan
Results in KPData Register
Scan and De-Bounce
Keys
Turn Off Clock
35
www.ti.com
TSC2200
SBAS191F
LAYOUT
The following layout suggestions should provide optimum
performance from the TSC2200. However, many portable
applications have conflicting requirements concerning power,
cost, size, and weight. In general, most portable devices
have fairly “clean” power and grounds because most of the
internal components are very low power. This situation would
mean less bypassing for the converter’s power and less
concern regarding grounding. Still, each situation is unique
and the following suggestions should be reviewed carefully.
For optimum performance, care should be taken with the
physical layout of the TSC2200 circuitry. The basic SAR
architecture is sensitive to glitches or sudden changes on the
power supply, reference, ground connections, and digital
inputs that occur just prior to latching the output of the analog
comparator. Therefore, during any single conversion for an
‘n-bit’ SAR converter, there are n ‘windows’ in which large
external transient voltages can easily affect the conversion
result. Such glitches might originate from switching power
supplies, nearby digital logic, and high power devices. The
degree of error in the digital output depends on the reference
voltage, layout, and the exact timing of the external event.
The error can change if the external event changes in time
with respect to the SCL input.
With this in mind, power to the TSC2200 should be clean and
well bypassed. A 0.1µF ceramic bypass capacitor should be
placed as close to the device as possible. A 1µF to 10µF
capacitor may also be needed if the impedance of the
connection between +VDD and the power supply is HIGH.
A bypass capacitor is generally not needed because the
reference is buffered by an internal op amp. If an external
reference voltage originates from an op amp, make sure that
it can drive any bypass capacitor that is used without oscil-
lation.
The TSC2200 architecture offers no inherent rejection of
noise or voltage variation in regards to using an external
reference input. This is of particular concern when the
reference input is tied to the power supply. Any noise and
ripple from the supply will appear directly in the digital
results. While high-frequency noise can be filtered out,
voltage variation due to line frequency (50Hz or 60Hz) can
be difficult to remove.
The GND pin should be connected to a clean ground point.
In many cases, this will be the “analog” ground. Avoid
connections that are too near the grounding point of a
microcontroller or digital signal processor. If needed, run a
ground trace directly from the converter to the power-supply
entry or battery-connection point. The ideal layout will in-
clude an analog ground plane dedicated to the converter and
associated analog circuitry.
In the specific case of use with a resistive touch screen, care
should be taken with the connection between the converter
and the touch screen. Since resistive touch screens have
fairly low resistance, the interconnection should be as short
and robust as possible. Loose connections can be a source
of error when the contact resistance changes with flexing or
vibrations.
As indicated previously, noise can be a major source of error
in touch screen applications (e.g., applications that require a
back-lit LCD panel). This EMI noise can be coupled through
the LCD panel to the touch screen and cause “flickering” of
the converted data. Several things can be done to reduce
this error, such as utilizing a touch screen with a bottom-side
metal layer connected to ground. This will couple the major-
ity of noise to ground. Additionally, filtering capacitors, from
Y+, Y–, X+, and X– to ground, can also help. Note, however,
that the use of these capacitors will increase screen settling
time and require longer panel voltage stabilization times, as
well as increased precharge and sense times for the
PENIRQ
circuitry of the TSC2200.
PACKAGE OPTION ADDENDUM
www.ti.com 30-Apr-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TSC2200IPW ACTIVE TSSOP PW 28 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TSC2200IPWG4 ACTIVE TSSOP PW 28 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TSC2200IPWR ACTIVE TSSOP PW 28 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TSC2200IPWRG4 ACTIVE TSSOP PW 28 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TSC2200IRHB ACTIVE QFN RHB 32 73 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TSC2200IRHBG4 ACTIVE QFN RHB 32 73 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TSC2200IRHBR ACTIVE QFN RHB 32 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TSC2200IRHBRG4 ACTIVE QFN RHB 32 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 30-Apr-2011
Addendum-Page 2
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TSC2200IPWR TSSOP PW 28 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1
TSC2200IRHBR QFN RHB 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TSC2200IPWR TSSOP PW 28 2000 367.0 367.0 38.0
TSC2200IRHBR QFN RHB 32 3000 338.1 338.1 20.6
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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